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drm/amdgpu: add PASID mapping for GMC v8

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This way we can see the PASID in VM faults.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Chunming Zhou <david1.zhou@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2018-01-16 20:26:03 +01:00 committed by Alex Deucher
parent 0da63bbb5b
commit 86ea2ff698
2 changed files with 3 additions and 1 deletions
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2
drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
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@ -623,6 +623,8 @@ static uint64_t gmc_v8_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,
reg = mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8; reg = mmVM_CONTEXT8_PAGE_TABLE_BASE_ADDR + vmid - 8;
amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12);
amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid);
/* bits 0-15 are the VM contexts0-15 */ /* bits 0-15 are the VM contexts0-15 */
amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid);

2
drivers/gpu/drm/amd/amdgpu/vi.h
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@ -24,7 +24,7 @@
#ifndef __VI_H__ #ifndef __VI_H__
#define __VI_H__ #define __VI_H__
#define VI_FLUSH_GPU_TLB_NUM_WREG 2 #define VI_FLUSH_GPU_TLB_NUM_WREG 3
void vi_srbm_select(struct amdgpu_device *adev, void vi_srbm_select(struct amdgpu_device *adev,
u32 me, u32 pipe, u32 queue, u32 vmid); u32 me, u32 pipe, u32 queue, u32 vmid);