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ARM: dts: sunxi: Revert SRAM controller drivers patches

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This patch reverts commit ccb4ada2f1 ("ARM: dts: sun7i: Add A20 SRAM and
SRAM controller"), commit e6f51e4bd2 ("ARM: dts: sun5i: Add A13 and A10s
SRAM and SRAM controller") and commit 6d92b80f35 ("ARM: dts: sun4i: Add
A10 SRAM and SRAM controller").

The bindings have been changed in the SRAM driver, and we need to
change the DT accordingly.

Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
This commit is contained in:
Maxime Ripard 2015-06-01 11:10:14 +02:00
parent 6d6693c8a7
commit 860c186c7d
3 changed files with 0 additions and 102 deletions
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34
arch/arm/boot/dts/sun4i-a10.dtsi
View File

@ -448,46 +448,12 @@
};
};
/*
* Note we use the address where the mmio registers start, not where
* the SRAM blocks start, this cannot be changed because that would be
* a devicetree ABI change.
*/
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram@00000000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00000000 0x4000>;
allwinner,sram-name = "A1";
};
sram@00004000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00004000 0x4000>;
allwinner,sram-name = "A2";
};
sram@00008000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00008000 0x4000>;
allwinner,sram-name = "A3-A4";
};
sram@00010000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00010000 0x1000>;
allwinner,sram-name = "D";
};
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
};
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;

34
arch/arm/boot/dts/sun5i.dtsi
View File

@ -293,46 +293,12 @@
};
};
/*
* Note we use the address where the mmio registers start, not where
* the SRAM blocks start, this cannot be changed because that would be
* a devicetree ABI change.
*/
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram@00000000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00000000 0x4000>;
allwinner,sram-name = "A1";
};
sram@00004000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00004000 0x4000>;
allwinner,sram-name = "A2";
};
sram@00008000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00008000 0x4000>;
allwinner,sram-name = "A3-A4";
};
sram@00010000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00010000 0x1000>;
allwinner,sram-name = "D";
};
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
};
dma: dma-controller@01c02000 {
compatible = "allwinner,sun4i-a10-dma";
reg = <0x01c02000 0x1000>;

34
arch/arm/boot/dts/sun7i-a20.dtsi
View File

@ -528,46 +528,12 @@
};
};
/*
* Note we use the address where the mmio registers start, not where
* the SRAM blocks start, this cannot be changed because that would be
* a devicetree ABI change.
*/
soc@01c00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
sram@00000000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00000000 0x4000>;
allwinner,sram-name = "A1";
};
sram@00004000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00004000 0x4000>;
allwinner,sram-name = "A2";
};
sram@00008000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00008000 0x4000>;
allwinner,sram-name = "A3-A4";
};
sram@00010000 {
compatible = "allwinner,sun4i-a10-sram";
reg = <0x00010000 0x1000>;
allwinner,sram-name = "D";
};
sram-controller@01c00000 {
compatible = "allwinner,sun4i-a10-sram-controller";
reg = <0x01c00000 0x30>;
};
nmi_intc: interrupt-controller@01c00030 {
compatible = "allwinner,sun7i-a20-sc-nmi";
interrupt-controller;