ARM: dts: r8a7791: Add SYSC PM Domains
Add a device node for the System Controller. Hook up the Cortex-A15 CPU cores and the Cortex-A15 L2 cache/SCU to their respective PM Domains. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -13,6 +13,7 @@
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#include <dt-bindings/clock/r8a7791-clock.h>
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#include <dt-bindings/clock/r8a7791-clock.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/power/r8a7791-sysc.h>
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/ {
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/ {
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compatible = "renesas,r8a7791";
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compatible = "renesas,r8a7791";
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@ -51,6 +52,7 @@
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voltage-tolerance = <1>; /* 1% */
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voltage-tolerance = <1>; /* 1% */
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clocks = <&cpg_clocks R8A7791_CLK_Z>;
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clocks = <&cpg_clocks R8A7791_CLK_Z>;
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clock-latency = <300000>; /* 300 us */
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clock-latency = <300000>; /* 300 us */
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power-domains = <&sysc R8A7791_PD_CA15_CPU0>;
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next-level-cache = <&L2_CA15>;
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next-level-cache = <&L2_CA15>;
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/* kHz - uV - OPPs unknown yet */
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/* kHz - uV - OPPs unknown yet */
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@ -67,6 +69,7 @@
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compatible = "arm,cortex-a15";
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compatible = "arm,cortex-a15";
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reg = <1>;
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reg = <1>;
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clock-frequency = <1500000000>;
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clock-frequency = <1500000000>;
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power-domains = <&sysc R8A7791_PD_CA15_CPU1>;
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next-level-cache = <&L2_CA15>;
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next-level-cache = <&L2_CA15>;
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};
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};
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};
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};
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@ -92,6 +95,7 @@
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L2_CA15: cache-controller@0 {
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L2_CA15: cache-controller@0 {
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compatible = "cache";
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compatible = "cache";
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power-domains = <&sysc R8A7791_PD_CA15_SCU>;
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cache-unified;
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cache-unified;
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cache-level = <2>;
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cache-level = <2>;
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};
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};
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@ -1466,6 +1470,12 @@
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};
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};
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};
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};
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sysc: system-controller@e6180000 {
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compatible = "renesas,r8a7791-sysc";
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reg = <0 0xe6180000 0 0x0200>;
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#power-domain-cells = <1>;
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};
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qspi: spi@e6b10000 {
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qspi: spi@e6b10000 {
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compatible = "renesas,qspi-r8a7791", "renesas,qspi";
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compatible = "renesas,qspi-r8a7791", "renesas,qspi";
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reg = <0 0xe6b10000 0 0x2c>;
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reg = <0 0xe6b10000 0 0x2c>;
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