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drm/amd/powerplay: enable mmhub pg

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mmhub pg can be obvserved from PCTL_CTRL

Signed-off-by: Kenneth Feng <kenneth.feng@amd.com>
Reviewed-by: Likun Gao <Likun.Gao@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kenneth Feng
2020-03-27 12:23:14 +08:00
committed by Alex Deucher
parent b794616d1f
commit 846938c223
2 changed files with 5 additions and 1 deletions
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3
drivers/gpu/drm/amd/amdgpu/nv.c
View File

@@ -704,7 +704,8 @@ static int nv_common_early_init(void *handle)
adev->pg_flags = AMD_PG_SUPPORT_VCN | adev->pg_flags = AMD_PG_SUPPORT_VCN |
AMD_PG_SUPPORT_VCN_DPG | AMD_PG_SUPPORT_VCN_DPG |
AMD_PG_SUPPORT_JPEG | AMD_PG_SUPPORT_JPEG |
AMD_PG_SUPPORT_ATHUB; AMD_PG_SUPPORT_ATHUB |
AMD_PG_SUPPORT_MMHUB;
/* guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0, /* guest vm gets 0xffffffff when reading RCC_DEV0_EPF0_STRAP0,
* as a consequence, the rev_id and external_rev_id are wrong. * as a consequence, the rev_id and external_rev_id are wrong.
* workaround it by hardcoding rev_id to 0 (default value). * workaround it by hardcoding rev_id to 0 (default value).

3
drivers/gpu/drm/amd/powerplay/sienna_cichlid_ppt.c
View File

@@ -335,6 +335,9 @@ sienna_cichlid_get_allowed_feature_mask(struct smu_context *smu,
if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB) if (smu->adev->pg_flags & AMD_PG_SUPPORT_ATHUB)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT); *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_ATHUB_PG_BIT);
if (smu->adev->pg_flags & AMD_PG_SUPPORT_MMHUB)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT);
if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN || if (smu->adev->pg_flags & AMD_PG_SUPPORT_VCN ||
smu->adev->pg_flags & AMD_PG_SUPPORT_JPEG) smu->adev->pg_flags & AMD_PG_SUPPORT_JPEG)
*(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MM_DPM_PG_BIT); *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MM_DPM_PG_BIT);