staging: ccree: Fix alignment issues in ssi_driver.c
Fixes checkpatch.pl alignment warnings. Signed-off-by: Simon Sandström <simon@nikanor.nu> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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22aa4c93ee
commit
8426423407
@ -85,8 +85,7 @@ void dump_byte_array(const char *name, const u8 *the_array, unsigned long size)
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return;
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}
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ret = snprintf(line_buf, sizeof(line_buf), "%s[%lu]: ",
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name, size);
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ret = snprintf(line_buf, sizeof(line_buf), "%s[%lu]: ", name, size);
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if (ret < 0) {
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SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret);
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return;
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@ -95,8 +94,8 @@ void dump_byte_array(const char *name, const u8 *the_array, unsigned long size)
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for (i = 0, cur_byte = the_array;
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(i < size) && (line_offset < sizeof(line_buf)); i++, cur_byte++) {
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ret = snprintf(line_buf + line_offset,
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sizeof(line_buf) - line_offset,
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"0x%02X ", *cur_byte);
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sizeof(line_buf) - line_offset,
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"0x%02X ", *cur_byte);
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if (ret < 0) {
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SSI_LOG_ERR("snprintf returned %d . aborting buffer array dump\n", ret);
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return;
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@ -193,11 +192,11 @@ int init_cc_regs(struct ssi_drvdata *drvdata, bool is_probe)
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#ifdef DX_IRQ_DELAY
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/* Set CC IRQ delay */
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CC_HAL_WRITE_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL),
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DX_IRQ_DELAY);
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DX_IRQ_DELAY);
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#endif
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if (CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL)) > 0) {
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SSI_LOG_DEBUG("irq_delay=%d CC cycles\n",
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CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL)));
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CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_IRQ_TIMER_INIT_VAL)));
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}
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#endif
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@ -252,9 +251,9 @@ static int init_cc_resources(struct platform_device *plat_dev)
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goto init_cc_res_err;
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}
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SSI_LOG_DEBUG("Got MEM resource (%s): start=0x%llX end=0x%llX\n",
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new_drvdata->res_mem->name,
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(unsigned long long)new_drvdata->res_mem->start,
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(unsigned long long)new_drvdata->res_mem->end);
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new_drvdata->res_mem->name,
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(unsigned long long)new_drvdata->res_mem->start,
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(unsigned long long)new_drvdata->res_mem->end);
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/* Map registers space */
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req_mem_cc_regs = request_mem_region(new_drvdata->res_mem->start, resource_size(new_drvdata->res_mem), "arm_cc7x_regs");
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if (unlikely(!req_mem_cc_regs)) {
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@ -266,7 +265,8 @@ static int init_cc_resources(struct platform_device *plat_dev)
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cc_base = ioremap(new_drvdata->res_mem->start, resource_size(new_drvdata->res_mem));
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if (unlikely(!cc_base)) {
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SSI_LOG_ERR("ioremap[CC](0x%08X,0x%08X) failed\n",
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(unsigned int)new_drvdata->res_mem->start, (unsigned int)resource_size(new_drvdata->res_mem));
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(unsigned int)new_drvdata->res_mem->start,
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(unsigned int)resource_size(new_drvdata->res_mem));
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rc = -ENOMEM;
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goto init_cc_res_err;
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}
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@ -284,15 +284,15 @@ static int init_cc_resources(struct platform_device *plat_dev)
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IRQF_SHARED, "arm_cc7x", new_drvdata);
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if (unlikely(rc != 0)) {
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SSI_LOG_ERR("Could not register to interrupt %llu\n",
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(unsigned long long)new_drvdata->res_irq->start);
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(unsigned long long)new_drvdata->res_irq->start);
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goto init_cc_res_err;
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}
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init_completion(&new_drvdata->icache_setup_completion);
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irq_registered = true;
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SSI_LOG_DEBUG("Registered to IRQ (%s) %llu\n",
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new_drvdata->res_irq->name,
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(unsigned long long)new_drvdata->res_irq->start);
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new_drvdata->res_irq->name,
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(unsigned long long)new_drvdata->res_irq->start);
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new_drvdata->plat_dev = plat_dev;
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@ -310,7 +310,7 @@ static int init_cc_resources(struct platform_device *plat_dev)
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signature_val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, HOST_SIGNATURE));
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if (signature_val != DX_DEV_SIGNATURE) {
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SSI_LOG_ERR("Invalid CC signature: SIGNATURE=0x%08X != expected=0x%08X\n",
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signature_val, (u32)DX_DEV_SIGNATURE);
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signature_val, (u32)DX_DEV_SIGNATURE);
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rc = -EINVAL;
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goto init_cc_res_err;
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}
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@ -431,7 +431,7 @@ init_cc_res_err:
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new_drvdata->cc_base = NULL;
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}
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release_mem_region(new_drvdata->res_mem->start,
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resource_size(new_drvdata->res_mem));
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resource_size(new_drvdata->res_mem));
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new_drvdata->res_mem = NULL;
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}
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kfree(new_drvdata);
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@ -474,7 +474,7 @@ static void cleanup_cc_resources(struct platform_device *plat_dev)
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if (drvdata->cc_base) {
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iounmap(drvdata->cc_base);
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release_mem_region(drvdata->res_mem->start,
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resource_size(drvdata->res_mem));
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resource_size(drvdata->res_mem));
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drvdata->cc_base = NULL;
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drvdata->res_mem = NULL;
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}
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@ -519,12 +519,12 @@ static int cc7x_probe(struct platform_device *plat_dev)
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asm volatile("mrc p15, 0, %0, c0, c0, 1" : "=r" (ctr));
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cacheline_size = 4 << ((ctr >> 16) & 0xf);
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SSI_LOG_DEBUG("CP15(L1_CACHE_BYTES) = %u , Kconfig(L1_CACHE_BYTES) = %u\n",
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cacheline_size, L1_CACHE_BYTES);
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cacheline_size, L1_CACHE_BYTES);
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asm volatile("mrc p15, 0, %0, c0, c0, 0" : "=r" (ctr));
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SSI_LOG_DEBUG("Main ID register (MIDR): Implementer 0x%02X, Arch 0x%01X,"
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" Part 0x%03X, Rev r%dp%d\n",
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(ctr >> 24), (ctr >> 16) & 0xF, (ctr >> 4) & 0xFFF, (ctr >> 20) & 0xF, ctr & 0xF);
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SSI_LOG_DEBUG("Main ID register (MIDR): Implementer 0x%02X, Arch 0x%01X, Part 0x%03X, Rev r%dp%d\n",
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(ctr >> 24), (ctr >> 16) & 0xF, (ctr >> 4) & 0xFFF,
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(ctr >> 20) & 0xF, ctr & 0xF);
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#endif
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/* Map registers space */
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