drm/amd/display: Implement AMD VSIF V3

[Why]
To support V3

[How]
Generate new VSIF for V3

Signed-off-by: Reza Amini <Reza.Amini@amd.com>
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Reza Amini 2020-07-02 16:10:31 -04:00 committed by Alex Deucher
parent c06e09b766
commit 831010da1b
4 changed files with 73 additions and 0 deletions

View File

@ -244,6 +244,25 @@ struct dc_stream_status *dc_stream_get_status(
return dc_stream_get_status_from_state(dc->current_state, stream);
}
#ifndef TRIM_FSFT
/**
* dc_optimize_timing() - dc to optimize timing
*/
bool dc_optimize_timing(
struct dc_crtc_timing *timing,
unsigned int max_input_rate_in_khz)
{
//optimization is expected to assing a value to these:
//timing->pix_clk_100hz
//timing->v_front_porch
//timing->v_total
//timing->fast_transport_output_rate_100hz;
timing->fast_transport_output_rate_100hz = timing->pix_clk_100hz;
return true;
}
#endif
/**
* dc_stream_set_cursor_attributes() - Update cursor attributes and set cursor surface address

View File

@ -713,6 +713,9 @@ struct dc_crtc_timing_flags {
uint32_t LTE_340MCSC_SCRAMBLE:1;
uint32_t DSC : 1; /* Use DSC with this timing */
#ifndef TRIM_FSFT
uint32_t FAST_TRANSPORT: 1;
#endif
};
enum dc_timing_3d_format {
@ -772,6 +775,10 @@ struct dc_crtc_timing {
enum dc_aspect_ratio aspect_ratio;
enum scanning_type scan_type;
#ifndef TRIM_FSFT
uint32_t fast_transport_output_rate_100hz;
#endif
struct dc_crtc_timing_flags flags;
struct dc_dsc_config dsc_cfg;
};

View File

@ -419,6 +419,12 @@ struct dc_stream_status *dc_stream_get_status_from_state(
struct dc_stream_status *dc_stream_get_status(
struct dc_stream_state *dc_stream);
#ifndef TRIM_FSFT
bool dc_optimize_timing(
struct dc_crtc_timing *timing,
unsigned int max_input_rate_in_khz);
#endif
/*******************************************************************************
* Cursor interfaces - To manages the cursor within a stream
******************************************************************************/

View File

@ -760,9 +760,35 @@ static void build_vrr_infopacket_v2(enum signal_type signal,
infopacket->valid = true;
}
#ifndef TRIM_FSFT
static void build_vrr_infopacket_fast_transport_data(
bool ftActive,
unsigned int ftOutputRate,
struct dc_info_packet *infopacket)
{
/* PB9 : bit7 - fast transport Active*/
unsigned char activeBit = (ftActive) ? 1 << 7 : 0;
infopacket->sb[1] &= ~activeBit; //clear bit
infopacket->sb[1] |= activeBit; //set bit
/* PB13 : Target Output Pixel Rate [kHz] - bits 7:0 */
infopacket->sb[13] = ftOutputRate & 0xFF;
/* PB14 : Target Output Pixel Rate [kHz] - bits 15:8 */
infopacket->sb[14] = (ftOutputRate >> 8) & 0xFF;
/* PB15 : Target Output Pixel Rate [kHz] - bits 23:16 */
infopacket->sb[15] = (ftOutputRate >> 16) & 0xFF;
}
#endif
static void build_vrr_infopacket_v3(enum signal_type signal,
const struct mod_vrr_params *vrr,
#ifndef TRIM_FSFT
bool ftActive, unsigned int ftOutputRate,
#endif
enum color_transfer_func app_tf,
struct dc_info_packet *infopacket)
{
@ -773,6 +799,13 @@ static void build_vrr_infopacket_v3(enum signal_type signal,
build_vrr_infopacket_fs2_data(app_tf, infopacket);
#ifndef TRIM_FSFT
build_vrr_infopacket_fast_transport_data(
ftActive,
ftOutputRate,
infopacket);
#endif
build_vrr_infopacket_checksum(&payload_size, infopacket);
infopacket->valid = true;
@ -795,7 +828,15 @@ void mod_freesync_build_vrr_infopacket(struct mod_freesync *mod_freesync,
switch (packet_type) {
case PACKET_TYPE_FS_V3:
#ifndef TRIM_FSFT
build_vrr_infopacket_v3(
stream->signal, vrr,
stream->timing.flags.FAST_TRANSPORT,
stream->timing.fast_transport_output_rate_100hz,
app_tf, infopacket);
#else
build_vrr_infopacket_v3(stream->signal, vrr, app_tf, infopacket);
#endif
break;
case PACKET_TYPE_FS_V2:
build_vrr_infopacket_v2(stream->signal, vrr, app_tf, infopacket);