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i.MX SoC update for 5.12:

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- Drop unused IMX_GPIO_NR() macro.
 - Remove KSZ8081 PHY fixup from i.MX6UL machine code, because it only
   applies for KSZ8081RNA with 50MHz clock source, but breaks other
   KSZ8081 PHY configurations.
 - Add a print of CPU type and SOC revision for i.MX6UL during boot.
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Merge tag 'imx-soc-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/soc

i.MX SoC update for 5.12:

- Drop unused IMX_GPIO_NR() macro.
- Remove KSZ8081 PHY fixup from i.MX6UL machine code, because it only
  applies for KSZ8081RNA with 50MHz clock source, but breaks other
  KSZ8081 PHY configurations.
- Add a print of CPU type and SOC revision for i.MX6UL during boot.

* tag 'imx-soc-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx: Remove unused IMX_GPIO_NR() macro
  ARM: mach-imx: imx6ul: Print SOC revision on boot
  ARM: imx: mach-imx6ul: remove 14x14 EVK specific PHY fixup

Link: https://lore.kernel.org/r/20210204120150.26186-2-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-02-10 00:07:21 +01:00
commit 82e754b1ba
2 changed files with 4 additions and 25 deletions
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4
arch/arm/mach-imx/hardware.h
View File

@ -106,8 +106,4 @@
.type = _type, \ .type = _type, \
} }
/* There's an off-by-one between the gpio bank number and the gpiochip */
/* range e.g. GPIO_1_5 is gpio 5 under linux */
#define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr))
#endif /* __ASM_ARCH_MXC_HARDWARE_H__ */ #endif /* __ASM_ARCH_MXC_HARDWARE_H__ */

25
arch/arm/mach-imx/mach-imx6ul.c
View File

@ -14,6 +14,7 @@
#include "common.h" #include "common.h"
#include "cpuidle.h" #include "cpuidle.h"
#include "hardware.h"
static void __init imx6ul_enet_clk_init(void) static void __init imx6ul_enet_clk_init(void)
{ {
@ -27,34 +28,16 @@ static void __init imx6ul_enet_clk_init(void)
pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n"); pr_err("failed to find fsl,imx6ul-iomux-gpr regmap\n");
} }
static int ksz8081_phy_fixup(struct phy_device *dev)
{
if (dev && dev->interface == PHY_INTERFACE_MODE_MII) {
phy_write(dev, 0x1f, 0x8110);
phy_write(dev, 0x16, 0x201);
} else if (dev && dev->interface == PHY_INTERFACE_MODE_RMII) {
phy_write(dev, 0x1f, 0x8190);
phy_write(dev, 0x16, 0x202);
}
return 0;
}
static void __init imx6ul_enet_phy_init(void)
{
if (IS_BUILTIN(CONFIG_PHYLIB))
phy_register_fixup_for_uid(PHY_ID_KSZ8081, MICREL_PHY_ID_MASK,
ksz8081_phy_fixup);
}
static inline void imx6ul_enet_init(void) static inline void imx6ul_enet_init(void)
{ {
imx6ul_enet_clk_init(); imx6ul_enet_clk_init();
imx6ul_enet_phy_init();
} }
static void __init imx6ul_init_machine(void) static void __init imx6ul_init_machine(void)
{ {
imx_print_silicon_rev(cpu_is_imx6ull() ? "i.MX6ULL" : "i.MX6UL",
imx_get_soc_revision());
of_platform_default_populate(NULL, NULL, NULL); of_platform_default_populate(NULL, NULL, NULL);
imx6ul_enet_init(); imx6ul_enet_init();
imx_anatop_init(); imx_anatop_init();