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ARM: OMAP4: hwmod data: remove bandgap hwmod

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Commit 407a6888f7 ("OMAP4: hwmod data:
Add AESS, McPDM, bandgap, counter_32k, MMC, KBD, ISS & IPU") adds a
hwmod for the bandgap die temperature sensor IP block.  This IP block
has no interconnect port or firewall region, nor does it have an
independent register space or OCP control registers.  Its registers
are embedded in the System Control Module (SCM) IP block.  So it
appears that the bandgap device should be created by the SCM driver.

Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Benoît Cousson <b-cousson@ti.com>
This commit is contained in:
Paul Walmsley 2012-04-19 04:03:54 -06:00
parent 4308570581
commit 8291113f82
1 changed files with 0 additions and 30 deletions
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30
arch/arm/mach-omap2/omap_hwmod_44xx_data.c
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@ -823,33 +823,6 @@ static struct omap_hwmod omap44xx_aess_hwmod = {
.masters_cnt = ARRAY_SIZE(omap44xx_aess_masters),
};
/*
* 'bandgap' class
* bangap reference for ldo regulators
*/
static struct omap_hwmod_class omap44xx_bandgap_hwmod_class = {
.name = "bandgap",
};
/* bandgap */
static struct omap_hwmod_opt_clk bandgap_opt_clks[] = {
{ .role = "fclk", .clk = "bandgap_fclk" },
};
static struct omap_hwmod omap44xx_bandgap_hwmod = {
.name = "bandgap",
.class = &omap44xx_bandgap_hwmod_class,
.clkdm_name = "l4_wkup_clkdm",
.prcm = {
.omap4 = {
.clkctrl_offs = OMAP4_CM_WKUP_BANDGAP_CLKCTRL_OFFSET,
},
},
.opt_clks = bandgap_opt_clks,
.opt_clks_cnt = ARRAY_SIZE(bandgap_opt_clks),
};
/*
* 'counter' class
* 32-bit ordinary counter, clocked by the falling edge of the 32 khz clock
@ -5467,9 +5440,6 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
/* aess class */
/* &omap44xx_aess_hwmod, */
/* bandgap class */
&omap44xx_bandgap_hwmod,
/* counter class */
/* &omap44xx_counter_32k_hwmod, */