forked from Minki/linux
KVM: Move irqchip declarations into new ioapic.h and lapic.h
This allows reuse of ioapic in ia64. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
This commit is contained in:
Zhang Xiantao
Avi Kivity
parent
0fce5623ba
commit
82470196fa
@ -36,7 +36,10 @@
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/current.h>
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#include "irq.h"
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#include "ioapic.h"
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#include "lapic.h"
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#if 0
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#define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg)
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#else
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95
arch/x86/kvm/ioapic.h
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95
arch/x86/kvm/ioapic.h
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@ -0,0 +1,95 @@
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#ifndef __KVM_IO_APIC_H
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#define __KVM_IO_APIC_H
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#include <linux/kvm_host.h>
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#include "iodev.h"
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struct kvm;
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struct kvm_vcpu;
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#define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
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#define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
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#define IOAPIC_EDGE_TRIG 0
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#define IOAPIC_LEVEL_TRIG 1
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#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
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#define IOAPIC_MEM_LENGTH 0x100
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/* Direct registers. */
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#define IOAPIC_REG_SELECT 0x00
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#define IOAPIC_REG_WINDOW 0x10
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#define IOAPIC_REG_EOI 0x40 /* IA64 IOSAPIC only */
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/* Indirect registers. */
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#define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
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#define IOAPIC_REG_VERSION 0x01
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#define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
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/*ioapic delivery mode*/
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#define IOAPIC_FIXED 0x0
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#define IOAPIC_LOWEST_PRIORITY 0x1
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#define IOAPIC_PMI 0x2
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#define IOAPIC_NMI 0x4
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#define IOAPIC_INIT 0x5
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#define IOAPIC_EXTINT 0x7
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struct kvm_ioapic {
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u64 base_address;
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u32 ioregsel;
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u32 id;
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u32 irr;
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u32 pad;
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union ioapic_redir_entry {
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u64 bits;
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struct {
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u8 vector;
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u8 delivery_mode:3;
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u8 dest_mode:1;
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u8 delivery_status:1;
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u8 polarity:1;
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u8 remote_irr:1;
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u8 trig_mode:1;
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u8 mask:1;
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u8 reserve:7;
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u8 reserved[4];
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u8 dest_id;
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} fields;
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} redirtbl[IOAPIC_NUM_PINS];
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struct kvm_io_device dev;
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struct kvm *kvm;
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};
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#ifdef DEBUG
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#define ASSERT(x) \
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do { \
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if (!(x)) { \
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printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
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__FILE__, __LINE__, #x); \
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BUG(); \
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} \
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} while (0)
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#else
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#define ASSERT(x) do { } while (0)
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#endif
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static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm)
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{
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return kvm->arch.vioapic;
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}
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#ifdef CONFIG_IA64
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static inline int irqchip_in_kernel(struct kvm *kvm)
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{
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return 1;
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}
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#endif
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struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
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unsigned long bitmap);
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void kvm_ioapic_update_eoi(struct kvm *kvm, int vector);
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int kvm_ioapic_init(struct kvm *kvm);
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void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level);
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void kvm_ioapic_reset(struct kvm_ioapic *ioapic);
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#endif
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@ -25,7 +25,10 @@
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#include <linux/mm_types.h>
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#include <linux/hrtimer.h>
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#include <linux/kvm_host.h>
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#include "iodev.h"
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#include "ioapic.h"
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#include "lapic.h"
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struct kvm;
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struct kvm_vcpu;
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@ -65,131 +68,23 @@ void kvm_pic_set_irq(void *opaque, int irq, int level);
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int kvm_pic_read_irq(struct kvm_pic *s);
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void kvm_pic_update_irq(struct kvm_pic *s);
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#define IOAPIC_NUM_PINS KVM_IOAPIC_NUM_PINS
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#define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */
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#define IOAPIC_EDGE_TRIG 0
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#define IOAPIC_LEVEL_TRIG 1
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#define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000
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#define IOAPIC_MEM_LENGTH 0x100
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/* Direct registers. */
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#define IOAPIC_REG_SELECT 0x00
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#define IOAPIC_REG_WINDOW 0x10
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#define IOAPIC_REG_EOI 0x40 /* IA64 IOSAPIC only */
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/* Indirect registers. */
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#define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */
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#define IOAPIC_REG_VERSION 0x01
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#define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */
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/*ioapic delivery mode*/
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#define IOAPIC_FIXED 0x0
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#define IOAPIC_LOWEST_PRIORITY 0x1
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#define IOAPIC_PMI 0x2
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#define IOAPIC_NMI 0x4
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#define IOAPIC_INIT 0x5
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#define IOAPIC_EXTINT 0x7
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struct kvm_ioapic {
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u64 base_address;
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u32 ioregsel;
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u32 id;
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u32 irr;
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u32 pad;
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union ioapic_redir_entry {
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u64 bits;
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struct {
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u8 vector;
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u8 delivery_mode:3;
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u8 dest_mode:1;
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u8 delivery_status:1;
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u8 polarity:1;
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u8 remote_irr:1;
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u8 trig_mode:1;
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u8 mask:1;
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u8 reserve:7;
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u8 reserved[4];
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u8 dest_id;
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} fields;
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} redirtbl[IOAPIC_NUM_PINS];
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struct kvm_io_device dev;
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struct kvm *kvm;
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};
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struct kvm_lapic {
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unsigned long base_address;
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struct kvm_io_device dev;
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struct {
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atomic_t pending;
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s64 period; /* unit: ns */
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u32 divide_count;
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ktime_t last_update;
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struct hrtimer dev;
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} timer;
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struct kvm_vcpu *vcpu;
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struct page *regs_page;
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void *regs;
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};
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#ifdef DEBUG
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#define ASSERT(x) \
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do { \
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if (!(x)) { \
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printk(KERN_EMERG "assertion failed %s: %d: %s\n", \
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__FILE__, __LINE__, #x); \
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BUG(); \
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} \
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} while (0)
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#else
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#define ASSERT(x) do { } while (0)
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#endif
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static inline struct kvm_pic *pic_irqchip(struct kvm *kvm)
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{
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return kvm->arch.vpic;
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}
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static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm)
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{
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return kvm->arch.vioapic;
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}
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static inline int irqchip_in_kernel(struct kvm *kvm)
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{
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return pic_irqchip(kvm) != NULL;
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}
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void kvm_vcpu_kick(struct kvm_vcpu *vcpu);
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int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
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int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
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int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
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int kvm_create_lapic(struct kvm_vcpu *vcpu);
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void kvm_lapic_reset(struct kvm_vcpu *vcpu);
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void kvm_pic_reset(struct kvm_kpic_state *s);
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void kvm_ioapic_reset(struct kvm_ioapic *ioapic);
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void kvm_free_lapic(struct kvm_vcpu *vcpu);
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u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
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void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
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void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
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struct kvm_vcpu *kvm_get_lowest_prio_vcpu(struct kvm *kvm, u8 vector,
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unsigned long bitmap);
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u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
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void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
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int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
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void kvm_ioapic_update_eoi(struct kvm *kvm, int vector);
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int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
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int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig);
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void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
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int kvm_ioapic_init(struct kvm *kvm);
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void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level);
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int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
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int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
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void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
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void kvm_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
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void kvm_inject_pending_timer_irqs(struct kvm_vcpu *vcpu);
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void kvm_inject_apic_timer_irqs(struct kvm_vcpu *vcpu);
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void kvm_migrate_apic_timer(struct kvm_vcpu *vcpu);
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void kvm_vcpu_kick(struct kvm_vcpu *vcpu);
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#endif
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44
arch/x86/kvm/lapic.h
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44
arch/x86/kvm/lapic.h
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@ -0,0 +1,44 @@
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#ifndef __KVM_X86_LAPIC_H
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#define __KVM_X86_LAPIC_H
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#include "iodev.h"
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#include <linux/kvm_host.h>
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struct kvm_lapic {
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unsigned long base_address;
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struct kvm_io_device dev;
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struct {
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atomic_t pending;
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s64 period; /* unit: ns */
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u32 divide_count;
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ktime_t last_update;
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struct hrtimer dev;
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} timer;
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struct kvm_vcpu *vcpu;
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struct page *regs_page;
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void *regs;
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};
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int kvm_create_lapic(struct kvm_vcpu *vcpu);
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void kvm_free_lapic(struct kvm_vcpu *vcpu);
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int kvm_apic_has_interrupt(struct kvm_vcpu *vcpu);
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int kvm_apic_accept_pic_intr(struct kvm_vcpu *vcpu);
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int kvm_get_apic_interrupt(struct kvm_vcpu *vcpu);
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void kvm_lapic_reset(struct kvm_vcpu *vcpu);
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u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu);
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void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8);
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void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value);
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int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest);
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int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda);
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int kvm_apic_set_irq(struct kvm_vcpu *vcpu, u8 vec, u8 trig);
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u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
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void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data);
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void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu);
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int kvm_lapic_enabled(struct kvm_vcpu *vcpu);
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int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
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void kvm_apic_timer_intr_post(struct kvm_vcpu *vcpu, int vec);
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#endif
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