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ath9k: Remove hw capability bit meant for btcoex

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We don't need a hw cap bit for btcoex anymore as btcoex scheme type
is enough to do this.

Signed-off-by: Vasanthakumar Thiagarajan <vasanth@atheros.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Vasanthakumar Thiagarajan 2009-08-26 21:08:48 +05:30 committed by John W. Linville
parent 22f25d0d5e
commit 81fa16fbe0
3 changed files with 3 additions and 7 deletions
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1
drivers/net/wireless/ath/ath9k/hw.c
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@ -3666,7 +3666,6 @@ void ath9k_hw_fill_cap_info(struct ath_hw *ah)
ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ); ah->eep_ops->get_num_ant_config(ah, ATH9K_HAL_FREQ_BAND_2GHZ);
if (AR_SREV_9280_10_OR_LATER(ah) && btcoex_enable) { if (AR_SREV_9280_10_OR_LATER(ah) && btcoex_enable) {
pCap->hw_caps |= ATH9K_HW_CAP_BT_COEX;
btcoex_info->btactive_gpio = ATH_BTACTIVE_GPIO; btcoex_info->btactive_gpio = ATH_BTACTIVE_GPIO;
btcoex_info->wlanactive_gpio = ATH_WLANACTIVE_GPIO; btcoex_info->wlanactive_gpio = ATH_WLANACTIVE_GPIO;

1
drivers/net/wireless/ath/ath9k/hw.h
View File

@ -151,7 +151,6 @@ enum ath9k_hw_caps {
ATH9K_HW_CAP_ENHANCEDPM = BIT(14), ATH9K_HW_CAP_ENHANCEDPM = BIT(14),
ATH9K_HW_CAP_AUTOSLEEP = BIT(15), ATH9K_HW_CAP_AUTOSLEEP = BIT(15),
ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(16), ATH9K_HW_CAP_4KB_SPLITTRANS = BIT(16),
ATH9K_HW_CAP_BT_COEX = BIT(17)
}; };
enum ath9k_capability_type { enum ath9k_capability_type {

8
drivers/net/wireless/ath/ath9k/main.c
View File

@ -440,7 +440,7 @@ static void ath_start_ani(struct ath_softc *sc)
void ath_update_chainmask(struct ath_softc *sc, int is_ht) void ath_update_chainmask(struct ath_softc *sc, int is_ht)
{ {
if ((sc->sc_flags & SC_OP_SCANNING) || is_ht || if ((sc->sc_flags & SC_OP_SCANNING) || is_ht ||
(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX)) { (sc->btcoex_info.btcoex_scheme != ATH_BTCOEX_CFG_NONE)) {
sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask; sc->tx_chainmask = sc->sc_ah->caps.tx_chainmask;
sc->rx_chainmask = sc->sc_ah->caps.rx_chainmask; sc->rx_chainmask = sc->sc_ah->caps.rx_chainmask;
} else { } else {
@ -1509,8 +1509,7 @@ static int ath_init_softc(u16 devid, struct ath_softc *sc)
ARRAY_SIZE(ath9k_5ghz_chantable); ARRAY_SIZE(ath9k_5ghz_chantable);
} }
if ((ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX) && if (sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_2WIRE)
(sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_2WIRE))
ath9k_hw_btcoex_init(ah); ath9k_hw_btcoex_init(ah);
return 0; return 0;
@ -1993,8 +1992,7 @@ static int ath9k_start(struct ieee80211_hw *hw)
ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0); ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_BT_COEX) && if ((sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) &&
(sc->btcoex_info.btcoex_scheme == ATH_BTCOEX_CFG_2WIRE) &&
!(sc->sc_flags & SC_OP_BTCOEX_ENABLED)) !(sc->sc_flags & SC_OP_BTCOEX_ENABLED))
ath9k_hw_btcoex_enable(sc->sc_ah); ath9k_hw_btcoex_enable(sc->sc_ah);