forked from Minki/linux
Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
* 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus: MIPS: Octeon: Place cnmips_cu2_setup in __init memory. MIPS: Don't place cu2 notifiers in __cpuinitdata MIPS: Calculate VMLINUZ_LOAD_ADDRESS based on the length of vmlinux.bin MIPS: Alchemy: Resolve prom section mismatches MIPS: Fix syscall 64 bit number comments. MIPS: Hookup fanotify_init, fanotify_mark, and prlimit64 syscalls. MIPS: TX49xx: Rename ARCH_KMALLOC_MINALIGN to ARCH_DMA_MINALIGN MIPS: N32: Fix getdents64 syscall for n32 MIPS: Remove pr_<level> uses of KERN_<level> MIPS: PNX8550: Sort out machine halt, restart and powerdown functions. MIPS: GIC: Remove dependencies from Malta files. MIPS: Kconfig: Fix and clarify kconfig help text for VSMP and SMTC. MIPS: DMA: Fix computation of DMA flags from device's coherent_dma_mask. MIPS: Audit: Fix hang in entry.S. MIPS: Document why RELOC_HIDE is there. MIPS: Octeon: Determine if helper needs to be built MIPS: Use generic atomic64 for 32-bit kernels MIPS: RM7000: Symbol should be static MIPS: kspd: Adjust confusing if indentation MIPS: Fix a typo.
This commit is contained in:
Linus Torvalds
commit
81c20b96e5
@ -13,6 +13,7 @@ config MIPS
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select HAVE_KPROBES
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select HAVE_KRETPROBES
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select RTC_LIB if !MACH_LOONGSON
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select GENERIC_ATOMIC64 if !64BIT
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mainmenu "Linux/MIPS Kernel Configuration"
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@ -1646,8 +1647,16 @@ config MIPS_MT_SMP
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select SYS_SUPPORTS_SMP
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select SMP_UP
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help
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This is a kernel model which is also known a VSMP or lately
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has been marketesed into SMVP.
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This is a kernel model which is known a VSMP but lately has been
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marketesed into SMVP.
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Virtual SMP uses the processor's VPEs to implement virtual
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processors. In currently available configuration of the 34K processor
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this allows for a dual processor. Both processors will share the same
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primary caches; each will obtain the half of the TLB for it's own
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exclusive use. For a layman this model can be described as similar to
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what Intel calls Hyperthreading.
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For further information see http://www.linux-mips.org/wiki/34K#VSMP
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config MIPS_MT_SMTC
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bool "SMTC: Use all TCs on all VPEs for SMP"
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@ -1664,6 +1673,14 @@ config MIPS_MT_SMTC
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help
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This is a kernel model which is known a SMTC or lately has been
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marketesed into SMVP.
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is presenting the available TC's of the core as processors to Linux.
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On currently available 34K processors this means a Linux system will
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see up to 5 processors. The implementation of the SMTC kernel differs
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significantly from VSMP and cannot efficiently coexist in the same
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kernel binary so the choice between VSMP and SMTC is a compile time
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decision.
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For further information see http://www.linux-mips.org/wiki/34K#SMTC
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endchoice
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@ -43,7 +43,7 @@ int prom_argc;
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char **prom_argv;
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char **prom_envp;
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void prom_init_cmdline(void)
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void __init prom_init_cmdline(void)
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{
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int i;
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@ -104,7 +104,7 @@ static inline void str2eaddr(unsigned char *ea, unsigned char *str)
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}
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}
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int prom_get_ethernet_addr(char *ethernet_addr)
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int __init prom_get_ethernet_addr(char *ethernet_addr)
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{
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char *ethaddr_str;
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@ -123,7 +123,6 @@ int prom_get_ethernet_addr(char *ethernet_addr)
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return 0;
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}
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EXPORT_SYMBOL(prom_get_ethernet_addr);
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void __init prom_free_prom_memory(void)
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{
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@ -59,7 +59,7 @@ $(obj)/piggy.o: $(obj)/dummy.o $(obj)/vmlinux.bin.z FORCE
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hostprogs-y := calc_vmlinuz_load_addr
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VMLINUZ_LOAD_ADDRESS = $(shell $(obj)/calc_vmlinuz_load_addr \
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$(objtree)/$(KBUILD_IMAGE) $(VMLINUX_LOAD_ADDRESS))
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$(obj)/vmlinux.bin $(VMLINUX_LOAD_ADDRESS))
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vmlinuzobjs-y += $(obj)/piggy.o
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@ -83,3 +83,7 @@ config ARCH_SPARSEMEM_ENABLE
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def_bool y
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select SPARSEMEM_STATIC
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depends on CPU_CAVIUM_OCTEON
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config CAVIUM_OCTEON_HELPER
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def_bool y
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depends on OCTEON_ETHERNET || PCI
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@ -41,7 +41,7 @@ static int cnmips_cu2_call(struct notifier_block *nfb, unsigned long action,
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return NOTIFY_OK; /* Let default notifier send signals */
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}
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static int cnmips_cu2_setup(void)
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static int __init cnmips_cu2_setup(void)
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{
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return cu2_notifier(cnmips_cu2_call, 0);
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}
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@ -11,4 +11,4 @@
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obj-y += cvmx-bootmem.o cvmx-l2c.o cvmx-sysinfo.o octeon-model.o
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obj-$(CONFIG_PCI) += cvmx-helper-errata.o cvmx-helper-jtag.o
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obj-$(CONFIG_CAVIUM_OCTEON_HELPER) += cvmx-helper-errata.o cvmx-helper-jtag.o
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@ -782,6 +782,10 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u)
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*/
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#define atomic64_add_negative(i, v) (atomic64_add_return(i, (v)) < 0)
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#else /* !CONFIG_64BIT */
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#include <asm-generic/atomic64.h>
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#endif /* CONFIG_64BIT */
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/*
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@ -24,7 +24,7 @@ extern int cu2_notifier_call_chain(unsigned long val, void *v);
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#define cu2_notifier(fn, pri) \
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({ \
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static struct notifier_block fn##_nb __cpuinitdata = { \
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static struct notifier_block fn##_nb = { \
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.notifier_call = fn, \
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.priority = pri \
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}; \
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@ -321,6 +321,7 @@ struct gic_intrmask_regs {
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*/
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struct gic_intr_map {
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unsigned int cpunum; /* Directed to this CPU */
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#define GIC_UNUSED 0xdead /* Dummy data */
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unsigned int pin; /* Directed to this Pin */
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unsigned int polarity; /* Polarity : +/- */
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unsigned int trigtype; /* Trigger : Edge/Levl */
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@ -1,6 +1,6 @@
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#ifndef __ASM_MACH_TX49XX_KMALLOC_H
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#define __ASM_MACH_TX49XX_KMALLOC_H
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#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
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#define ARCH_DMA_MINALIGN L1_CACHE_BYTES
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#endif /* __ASM_MACH_TX49XX_KMALLOC_H */
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@ -88,9 +88,6 @@
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#define GIC_EXT_INTR(x) x
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/* Dummy data */
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#define X 0xdead
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/* External Interrupts used for IPI */
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#define GIC_IPI_EXT_INTR_RESCHED_VPE0 16
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#define GIC_IPI_EXT_INTR_CALLFNC_VPE0 17
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@ -150,6 +150,20 @@ typedef struct { unsigned long pgprot; } pgprot_t;
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((unsigned long)(x) - PAGE_OFFSET + PHYS_OFFSET)
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#endif
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#define __va(x) ((void *)((unsigned long)(x) + PAGE_OFFSET - PHYS_OFFSET))
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/*
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* RELOC_HIDE was originally added by 6007b903dfe5f1d13e0c711ac2894bdd4a61b1ad
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* (lmo) rsp. 8431fd094d625b94d364fe393076ccef88e6ce18 (kernel.org). The
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* discussion can be found in lkml posting
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* <a2ebde260608230500o3407b108hc03debb9da6e62c@mail.gmail.com> which is
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* archived at http://lists.linuxcoding.com/kernel/2006-q3/msg17360.html
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*
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* It is unclear if the misscompilations mentioned in
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* http://lkml.org/lkml/2010/8/8/138 also affect MIPS so we keep this one
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* until GCC 3.x has been retired before we can apply
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* https://patchwork.linux-mips.org/patch/1541/
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*/
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#define __pa_symbol(x) __pa(RELOC_HIDE((unsigned long)(x), 0))
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#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
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@ -146,7 +146,8 @@ register struct thread_info *__current_thread_info __asm__("$28");
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#define _TIF_LOAD_WATCH (1<<TIF_LOAD_WATCH)
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/* work to do on interrupt/exception return */
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#define _TIF_WORK_MASK (0x0000ffef & ~_TIF_SECCOMP)
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#define _TIF_WORK_MASK (0x0000ffef & \
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~(_TIF_SECCOMP | _TIF_SYSCALL_AUDIT))
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/* work to do on any return to u-space */
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#define _TIF_ALLWORK_MASK (0x8000ffff & ~_TIF_SECCOMP)
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@ -356,16 +356,19 @@
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#define __NR_perf_event_open (__NR_Linux + 333)
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#define __NR_accept4 (__NR_Linux + 334)
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#define __NR_recvmmsg (__NR_Linux + 335)
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#define __NR_fanotify_init (__NR_Linux + 336)
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#define __NR_fanotify_mark (__NR_Linux + 337)
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#define __NR_prlimit64 (__NR_Linux + 338)
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/*
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* Offset of the last Linux o32 flavoured syscall
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*/
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#define __NR_Linux_syscalls 335
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#define __NR_Linux_syscalls 338
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */
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#define __NR_O32_Linux 4000
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#define __NR_O32_Linux_syscalls 335
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#define __NR_O32_Linux_syscalls 338
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#if _MIPS_SIM == _MIPS_SIM_ABI64
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@ -668,16 +671,19 @@
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#define __NR_perf_event_open (__NR_Linux + 292)
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#define __NR_accept4 (__NR_Linux + 293)
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#define __NR_recvmmsg (__NR_Linux + 294)
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#define __NR_fanotify_init (__NR_Linux + 295)
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#define __NR_fanotify_mark (__NR_Linux + 296)
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#define __NR_prlimit64 (__NR_Linux + 297)
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/*
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* Offset of the last Linux 64-bit flavoured syscall
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*/
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#define __NR_Linux_syscalls 294
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#define __NR_Linux_syscalls 297
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#endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */
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#define __NR_64_Linux 5000
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#define __NR_64_Linux_syscalls 294
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#define __NR_64_Linux_syscalls 297
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#if _MIPS_SIM == _MIPS_SIM_NABI32
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@ -985,16 +991,19 @@
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#define __NR_accept4 (__NR_Linux + 297)
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#define __NR_recvmmsg (__NR_Linux + 298)
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#define __NR_getdents64 (__NR_Linux + 299)
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#define __NR_fanotify_init (__NR_Linux + 300)
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#define __NR_fanotify_mark (__NR_Linux + 301)
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#define __NR_prlimit64 (__NR_Linux + 302)
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/*
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* Offset of the last N32 flavoured syscall
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*/
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#define __NR_Linux_syscalls 299
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#define __NR_Linux_syscalls 302
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#endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */
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#define __NR_N32_Linux 6000
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#define __NR_N32_Linux_syscalls 299
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#define __NR_N32_Linux_syscalls 302
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#ifdef __KERNEL__
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@ -7,7 +7,6 @@
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#include <asm/io.h>
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#include <asm/gic.h>
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#include <asm/gcmpregs.h>
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#include <asm/mips-boards/maltaint.h>
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#include <asm/irq.h>
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#include <linux/hardirq.h>
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#include <asm-generic/bitops/find.h>
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@ -131,7 +130,7 @@ static int gic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
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int i;
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irq -= _irqbase;
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pr_debug(KERN_DEBUG "%s(%d) called\n", __func__, irq);
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pr_debug("%s(%d) called\n", __func__, irq);
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cpumask_and(&tmp, cpumask, cpu_online_mask);
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if (cpus_empty(tmp))
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return -1;
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@ -222,7 +221,7 @@ static void __init gic_basic_init(int numintrs, int numvpes,
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/* Setup specifics */
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for (i = 0; i < mapsize; i++) {
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cpu = intrmap[i].cpunum;
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if (cpu == X)
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if (cpu == GIC_UNUSED)
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continue;
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if (cpu == 0 && i != 0 && intrmap[i].flags == 0)
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continue;
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@ -283,7 +283,7 @@ static int kgdb_mips_notify(struct notifier_block *self, unsigned long cmd,
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struct pt_regs *regs = args->regs;
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int trap = (regs->cp0_cause & 0x7c) >> 2;
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/* Userpace events, ignore. */
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/* Userspace events, ignore. */
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if (user_mode(regs))
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return NOTIFY_DONE;
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@ -251,7 +251,7 @@ void sp_work_handle_request(void)
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memset(&tz, 0, sizeof(tz));
|
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if ((ret.retval = sp_syscall(__NR_gettimeofday, (int)&tv,
|
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(int)&tz, 0, 0)) == 0)
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ret.retval = tv.tv_sec;
|
||||
ret.retval = tv.tv_sec;
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||||
break;
|
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|
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case MTSP_SYSCALL_EXIT:
|
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|
||||
@ -341,3 +341,10 @@ asmlinkage long sys32_lookup_dcookie(u32 a0, u32 a1, char __user *buf,
|
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{
|
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return sys_lookup_dcookie(merge_64(a0, a1), buf, len);
|
||||
}
|
||||
|
||||
SYSCALL_DEFINE6(32_fanotify_mark, int, fanotify_fd, unsigned int, flags,
|
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u64, a3, u64, a4, int, dfd, const char __user *, pathname)
|
||||
{
|
||||
return sys_fanotify_mark(fanotify_fd, flags, merge_64(a3, a4),
|
||||
dfd, pathname);
|
||||
}
|
||||
|
||||
@ -583,7 +583,10 @@ einval: li v0, -ENOSYS
|
||||
sys sys_rt_tgsigqueueinfo 4
|
||||
sys sys_perf_event_open 5
|
||||
sys sys_accept4 4
|
||||
sys sys_recvmmsg 5
|
||||
sys sys_recvmmsg 5 /* 4335 */
|
||||
sys sys_fanotify_init 2
|
||||
sys sys_fanotify_mark 6
|
||||
sys sys_prlimit64 4
|
||||
.endm
|
||||
|
||||
/* We pre-compute the number of _instruction_ bytes needed to
|
||||
|
||||
@ -416,9 +416,12 @@ sys_call_table:
|
||||
PTR sys_pipe2
|
||||
PTR sys_inotify_init1
|
||||
PTR sys_preadv
|
||||
PTR sys_pwritev /* 5390 */
|
||||
PTR sys_pwritev /* 5290 */
|
||||
PTR sys_rt_tgsigqueueinfo
|
||||
PTR sys_perf_event_open
|
||||
PTR sys_accept4
|
||||
PTR sys_recvmmsg
|
||||
PTR sys_recvmmsg
|
||||
PTR sys_fanotify_init /* 5295 */
|
||||
PTR sys_fanotify_mark
|
||||
PTR sys_prlimit64
|
||||
.size sys_call_table,.-sys_call_table
|
||||
|
||||
@ -419,5 +419,8 @@ EXPORT(sysn32_call_table)
|
||||
PTR sys_perf_event_open
|
||||
PTR sys_accept4
|
||||
PTR compat_sys_recvmmsg
|
||||
PTR sys_getdents
|
||||
PTR sys_getdents64
|
||||
PTR sys_fanotify_init /* 6300 */
|
||||
PTR sys_fanotify_mark
|
||||
PTR sys_prlimit64
|
||||
.size sysn32_call_table,.-sysn32_call_table
|
||||
|
||||
@ -538,5 +538,8 @@ sys_call_table:
|
||||
PTR compat_sys_rt_tgsigqueueinfo
|
||||
PTR sys_perf_event_open
|
||||
PTR sys_accept4
|
||||
PTR compat_sys_recvmmsg
|
||||
PTR compat_sys_recvmmsg /* 4335 */
|
||||
PTR sys_fanotify_init
|
||||
PTR sys_32_fanotify_mark
|
||||
PTR sys_prlimit64
|
||||
.size sys_call_table,.-sys_call_table
|
||||
|
||||
@ -44,27 +44,39 @@ static inline int cpu_is_noncoherent_r10000(struct device *dev)
|
||||
|
||||
static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
|
||||
{
|
||||
gfp_t dma_flag;
|
||||
|
||||
/* ignore region specifiers */
|
||||
gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
|
||||
|
||||
#ifdef CONFIG_ZONE_DMA
|
||||
#ifdef CONFIG_ISA
|
||||
if (dev == NULL)
|
||||
gfp |= __GFP_DMA;
|
||||
else if (dev->coherent_dma_mask < DMA_BIT_MASK(24))
|
||||
gfp |= __GFP_DMA;
|
||||
dma_flag = __GFP_DMA;
|
||||
else
|
||||
#endif
|
||||
#ifdef CONFIG_ZONE_DMA32
|
||||
#if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
|
||||
if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
|
||||
gfp |= __GFP_DMA32;
|
||||
dma_flag = __GFP_DMA;
|
||||
else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
|
||||
dma_flag = __GFP_DMA32;
|
||||
else
|
||||
#endif
|
||||
;
|
||||
#if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
|
||||
if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
|
||||
dma_flag = __GFP_DMA32;
|
||||
else
|
||||
#endif
|
||||
#if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
|
||||
if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
|
||||
dma_flag = __GFP_DMA;
|
||||
else
|
||||
#endif
|
||||
dma_flag = 0;
|
||||
|
||||
/* Don't invoke OOM killer */
|
||||
gfp |= __GFP_NORETRY;
|
||||
|
||||
return gfp;
|
||||
return gfp | dma_flag;
|
||||
}
|
||||
|
||||
void *dma_alloc_noncoherent(struct device *dev, size_t size,
|
||||
|
||||
@ -30,7 +30,7 @@
|
||||
#define tc_lsize 32
|
||||
|
||||
extern unsigned long icache_way_size, dcache_way_size;
|
||||
unsigned long tcache_size;
|
||||
static unsigned long tcache_size;
|
||||
|
||||
#include <asm/r4kcache.h>
|
||||
|
||||
|
||||
@ -385,6 +385,8 @@ static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap);
|
||||
*/
|
||||
|
||||
#define GIC_CPU_NMI GIC_MAP_TO_NMI_MSK
|
||||
#define X GIC_UNUSED
|
||||
|
||||
static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {
|
||||
{ X, X, X, X, 0 },
|
||||
{ X, X, X, X, 0 },
|
||||
@ -404,6 +406,7 @@ static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = {
|
||||
{ X, X, X, X, 0 },
|
||||
/* The remainder of this table is initialised by fill_ipi_map */
|
||||
};
|
||||
#undef X
|
||||
|
||||
/*
|
||||
* GCMP needs to be detected before any SMP initialisation
|
||||
|
||||
@ -118,7 +118,7 @@ static int __init rc32434_pcibridge_init(void)
|
||||
if (!((pcicvalue == PCIM_H_EA) ||
|
||||
(pcicvalue == PCIM_H_IA_FIX) ||
|
||||
(pcicvalue == PCIM_H_IA_RR))) {
|
||||
pr_err(KERN_ERR "PCI init error!!!\n");
|
||||
pr_err("PCI init error!!!\n");
|
||||
/* Not in Host Mode, return ERROR */
|
||||
return -1;
|
||||
}
|
||||
|
||||
@ -22,29 +22,19 @@
|
||||
*/
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include <asm/processor.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <glb.h>
|
||||
|
||||
void pnx8550_machine_restart(char *command)
|
||||
{
|
||||
char head[] = "************* Machine restart *************";
|
||||
char foot[] = "*******************************************";
|
||||
|
||||
printk("\n\n");
|
||||
printk("%s\n", head);
|
||||
if (command != NULL)
|
||||
printk("* %s\n", command);
|
||||
printk("%s\n", foot);
|
||||
|
||||
PNX8550_RST_CTL = PNX8550_RST_DO_SW_RST;
|
||||
}
|
||||
|
||||
void pnx8550_machine_halt(void)
|
||||
{
|
||||
printk("*** Machine halt. (Not implemented) ***\n");
|
||||
}
|
||||
|
||||
void pnx8550_machine_power_off(void)
|
||||
{
|
||||
printk("*** Machine power off. (Not implemented) ***\n");
|
||||
while (1) {
|
||||
if (cpu_wait)
|
||||
cpu_wait();
|
||||
}
|
||||
}
|
||||
|
||||
@ -44,7 +44,6 @@
|
||||
extern void __init board_setup(void);
|
||||
extern void pnx8550_machine_restart(char *);
|
||||
extern void pnx8550_machine_halt(void);
|
||||
extern void pnx8550_machine_power_off(void);
|
||||
extern struct resource ioport_resource;
|
||||
extern struct resource iomem_resource;
|
||||
extern char *prom_getcmdline(void);
|
||||
@ -100,7 +99,7 @@ void __init plat_mem_setup(void)
|
||||
|
||||
_machine_restart = pnx8550_machine_restart;
|
||||
_machine_halt = pnx8550_machine_halt;
|
||||
pm_power_off = pnx8550_machine_power_off;
|
||||
pm_power_off = pnx8550_machine_halt;
|
||||
|
||||
/* Clear the Global 2 Register, PCI Inta Output Enable Registers
|
||||
Bit 1:Enable DAC Powerdown
|
||||
|
||||
Loading…
Reference in New Issue
Block a user