From 2938431e9338bf4e8d434513d3a5832d64c0fa8b Mon Sep 17 00:00:00 2001 From: Huacai Chen Date: Mon, 26 Sep 2022 22:25:29 +0800 Subject: [PATCH 1/3] LoongArch: Align the address of kernel_entry to 4KB Align the address of kernel_entry to 4KB, to avoid early tlb miss exception in case the entry code crosses page boundary. Signed-off-by: Huacai Chen --- arch/loongarch/kernel/head.S | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/loongarch/kernel/head.S b/arch/loongarch/kernel/head.S index c60eb66793e3..331864369e49 100644 --- a/arch/loongarch/kernel/head.S +++ b/arch/loongarch/kernel/head.S @@ -14,6 +14,8 @@ __REF + .align 12 + SYM_CODE_START(kernel_entry) # kernel entry point /* Config direct window and set PG */ From 06e76acec70d1381b9a96e6014d5587d84201f82 Mon Sep 17 00:00:00 2001 From: Huacai Chen Date: Mon, 26 Sep 2022 22:33:39 +0800 Subject: [PATCH 2/3] LoongArch: Fix and cleanup csr_era handling in do_ri() We don't emulate reserved instructions and just send a signal to the current process now. So we don't need to call compute_return_era() to add 4 (point to the next instruction) to csr_era in pt_regs. RA/ERA's backup/restore is cleaned up as well. Signed-off-by: Jun Yi Signed-off-by: Huacai Chen --- arch/loongarch/kernel/traps.c | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) diff --git a/arch/loongarch/kernel/traps.c b/arch/loongarch/kernel/traps.c index aa1c95aaf595..5010e95cef84 100644 --- a/arch/loongarch/kernel/traps.c +++ b/arch/loongarch/kernel/traps.c @@ -461,11 +461,9 @@ asmlinkage void noinstr do_watch(struct pt_regs *regs) asmlinkage void noinstr do_ri(struct pt_regs *regs) { - int status = -1; + int status = SIGILL; unsigned int opcode = 0; unsigned int __user *era = (unsigned int __user *)exception_era(regs); - unsigned long old_era = regs->csr_era; - unsigned long old_ra = regs->regs[1]; irqentry_state_t state = irqentry_enter(regs); local_irq_enable(); @@ -477,21 +475,12 @@ asmlinkage void noinstr do_ri(struct pt_regs *regs) die_if_kernel("Reserved instruction in kernel code", regs); - compute_return_era(regs); - if (unlikely(get_user(opcode, era) < 0)) { status = SIGSEGV; current->thread.error_code = 1; } - if (status < 0) - status = SIGILL; - - if (unlikely(status > 0)) { - regs->csr_era = old_era; /* Undo skip-over. */ - regs->regs[1] = old_ra; - force_sig(status); - } + force_sig(status); out: local_irq_disable(); From 4f196cb64b693c64f8f981432b1ff326b7ea1c28 Mon Sep 17 00:00:00 2001 From: Yanteng Si Date: Tue, 27 Sep 2022 12:34:56 +0800 Subject: [PATCH 3/3] LoongArch: Clean up loongson3_smp_ops declaration Since loongson3_smp_ops is not used in LoongArch anymore, let's remove it for cleanup. Fixes: f2ac457a6138 ("LoongArch: Add CPU definition headers") Signed-off-by: Yanteng Si Signed-off-by: Huacai Chen --- arch/loongarch/include/asm/loongson.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/loongarch/include/asm/loongson.h b/arch/loongarch/include/asm/loongson.h index 6e8f6972ceb6..00db93edae1b 100644 --- a/arch/loongarch/include/asm/loongson.h +++ b/arch/loongarch/include/asm/loongson.h @@ -14,8 +14,6 @@ #include #include -extern const struct plat_smp_ops loongson3_smp_ops; - #define LOONGSON_REG(x) \ (*(volatile u32 *)((char *)TO_UNCACHE(LOONGSON_REG_BASE) + (x)))