forked from Minki/linux
First set of IIO fixes for the 4.4 cycle.
This set does not include those for issues introduced during the merge window. Fixes of those will follow in a future series. * ad5064 - Make sure the local i2c_write returns 0 on success rather than the number of bytes transfered. Otherwise we report an error on all writes. - Fix a shift for ad5629 and ad5669 which gives incorrect DAC output on these parts. * ad7793 - The product ID on the datasheet is wrong. Fix it in the driver. * IIO_DUMMY_EVGEN - select IRQ_WORK as a dependency. * lpc32xx - make sure clock is prepared before enabling. * si7020 - data byte order was reversed. Fix it. * vf610 - Internal temperature calculation was wrong if a different reference voltage was used. Now use a linear interpolation function to make it work over the full range. - Fix a division by zero in the case of a device tree property not being present (same issue two fixes). * xilinx XADC - VREFN scale was wrong - fix it. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2 iQIcBAABCAAGBQJWSH0iAAoJEFSFNJnE9BaILcYP/Rb70yJE23oTx6iyMDLip/Im 7yG+TMh/mFJCrwmpvloRX4IxQ20WApQPEQRaO6ivcoykQ/8eGDK3hrHWiHwYNs9z P+q1qxz0F0pnvWHPZ2UZ+p8ZNzuy9ovTSeeuAHQWMVSsPCgiQR3kq0hBVrvV4mVn 4AQejD0M/x69TWdisZtGJqKBZs44mXHbgqC6Xw/6u0MLpA8ZLHO2XAr9vaSA042T PsYXbEMmb/ElRKwadbX4JCqrMsA3FhPx+qD7qPu14bsC8WR4tlNLIBzEmBQJotWf 8wjK7AF7Af/HMO5KjO6uJe+EdypMq1UjlmqeRWUZIGUlLtmjmkhnRzO4Qahsbx2K 6TEO1uNhOjg7JQGfeuL9fKMHI6QKkeFIJ/cl2ekRWRwbxS2kOmXA9HTCsxynrdAR qC49Eqkbfr/F1vdgDx61JAWgWuZNdxFg3tiD3wP2BMjOipKBuKRt9CvHuOORW7Tp aUPruyJduIpcVQBL+wbSElAc4XsjgL4+/KROcfG3x3zWKUjOux73G8WsgaSSQ4Fe rP2stYFmZUigIpSW/vTwbdcN8tIT9S/XZjxF/mlP7azIQHyafWTVl6CUlphtewtY YZVT2K+t07zQV2NgOi9J+H5yCPG39d1Fb1R4OsWF1Brq2QsQJwqR9Y1ERXiPEJzZ DvylTHu0lxP+xgE/Xjuz =362F -----END PGP SIGNATURE----- Merge tag 'iio-fixes-for-4.4a' of ssh://ra.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-linus Jonathan writes: First set of IIO fixes for the 4.4 cycle. This set does not include those for issues introduced during the merge window. Fixes of those will follow in a future series. * ad5064 - Make sure the local i2c_write returns 0 on success rather than the number of bytes transfered. Otherwise we report an error on all writes. - Fix a shift for ad5629 and ad5669 which gives incorrect DAC output on these parts. * ad7793 - The product ID on the datasheet is wrong. Fix it in the driver. * IIO_DUMMY_EVGEN - select IRQ_WORK as a dependency. * lpc32xx - make sure clock is prepared before enabling. * si7020 - data byte order was reversed. Fix it. * vf610 - Internal temperature calculation was wrong if a different reference voltage was used. Now use a linear interpolation function to make it work over the full range. - Fix a division by zero in the case of a device tree property not being present (same issue two fixes). * xilinx XADC - VREFN scale was wrong - fix it.
This commit is contained in:
commit
819db468b2
@ -101,7 +101,7 @@
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#define AD7795_CH_AIN1M_AIN1M 8 /* AIN1(-) - AIN1(-) */
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/* ID Register Bit Designations (AD7793_REG_ID) */
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#define AD7785_ID 0xB
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#define AD7785_ID 0x3
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#define AD7792_ID 0xA
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#define AD7793_ID 0xB
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#define AD7794_ID 0xF
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@ -106,6 +106,13 @@
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#define DEFAULT_SAMPLE_TIME 1000
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/* V at 25°C of 696 mV */
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#define VF610_VTEMP25_3V0 950
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/* V at 25°C of 699 mV */
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#define VF610_VTEMP25_3V3 867
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/* Typical sensor slope coefficient at all temperatures */
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#define VF610_TEMP_SLOPE_COEFF 1840
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enum clk_sel {
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VF610_ADCIOC_BUSCLK_SET,
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VF610_ADCIOC_ALTCLK_SET,
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@ -197,6 +204,8 @@ static inline void vf610_adc_calculate_rates(struct vf610_adc *info)
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adc_feature->clk_div = 8;
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}
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adck_rate = ipg_rate / adc_feature->clk_div;
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/*
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* Determine the long sample time adder value to be used based
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* on the default minimum sample time provided.
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@ -221,7 +230,6 @@ static inline void vf610_adc_calculate_rates(struct vf610_adc *info)
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* BCT (Base Conversion Time): fixed to 25 ADCK cycles for 12 bit mode
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* LSTAdder(Long Sample Time): 3, 5, 7, 9, 13, 17, 21, 25 ADCK cycles
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*/
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adck_rate = ipg_rate / info->adc_feature.clk_div;
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for (i = 0; i < ARRAY_SIZE(vf610_hw_avgs); i++)
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info->sample_freq_avail[i] =
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adck_rate / (6 + vf610_hw_avgs[i] *
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@ -663,11 +671,13 @@ static int vf610_read_raw(struct iio_dev *indio_dev,
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break;
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case IIO_TEMP:
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/*
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* Calculate in degree Celsius times 1000
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* Using sensor slope of 1.84 mV/°C and
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* V at 25°C of 696 mV
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*/
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*val = 25000 - ((int)info->value - 864) * 1000000 / 1840;
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* Calculate in degree Celsius times 1000
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* Using the typical sensor slope of 1.84 mV/°C
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* and VREFH_ADC at 3.3V, V at 25°C of 699 mV
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*/
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*val = 25000 - ((int)info->value - VF610_VTEMP25_3V3) *
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1000000 / VF610_TEMP_SLOPE_COEFF;
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break;
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default:
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mutex_unlock(&indio_dev->mlock);
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@ -841,6 +841,7 @@ static int xadc_read_raw(struct iio_dev *indio_dev,
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case XADC_REG_VCCINT:
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case XADC_REG_VCCAUX:
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case XADC_REG_VREFP:
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case XADC_REG_VREFN:
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case XADC_REG_VCCBRAM:
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case XADC_REG_VCCPINT:
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case XADC_REG_VCCPAUX:
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@ -113,12 +113,16 @@ enum ad5064_type {
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ID_AD5065,
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ID_AD5628_1,
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ID_AD5628_2,
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ID_AD5629_1,
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ID_AD5629_2,
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ID_AD5648_1,
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ID_AD5648_2,
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ID_AD5666_1,
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ID_AD5666_2,
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ID_AD5668_1,
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ID_AD5668_2,
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ID_AD5669_1,
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ID_AD5669_2,
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};
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static int ad5064_write(struct ad5064_state *st, unsigned int cmd,
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@ -291,7 +295,7 @@ static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
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{ },
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};
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#define AD5064_CHANNEL(chan, addr, bits) { \
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#define AD5064_CHANNEL(chan, addr, bits, _shift) { \
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.type = IIO_VOLTAGE, \
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.indexed = 1, \
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.output = 1, \
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@ -303,36 +307,39 @@ static const struct iio_chan_spec_ext_info ad5064_ext_info[] = {
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.sign = 'u', \
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.realbits = (bits), \
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.storagebits = 16, \
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.shift = 20 - bits, \
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.shift = (_shift), \
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}, \
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.ext_info = ad5064_ext_info, \
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}
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#define DECLARE_AD5064_CHANNELS(name, bits) \
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#define DECLARE_AD5064_CHANNELS(name, bits, shift) \
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const struct iio_chan_spec name[] = { \
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AD5064_CHANNEL(0, 0, bits), \
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AD5064_CHANNEL(1, 1, bits), \
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AD5064_CHANNEL(2, 2, bits), \
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AD5064_CHANNEL(3, 3, bits), \
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AD5064_CHANNEL(4, 4, bits), \
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AD5064_CHANNEL(5, 5, bits), \
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AD5064_CHANNEL(6, 6, bits), \
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AD5064_CHANNEL(7, 7, bits), \
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AD5064_CHANNEL(0, 0, bits, shift), \
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AD5064_CHANNEL(1, 1, bits, shift), \
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AD5064_CHANNEL(2, 2, bits, shift), \
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AD5064_CHANNEL(3, 3, bits, shift), \
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AD5064_CHANNEL(4, 4, bits, shift), \
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AD5064_CHANNEL(5, 5, bits, shift), \
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AD5064_CHANNEL(6, 6, bits, shift), \
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AD5064_CHANNEL(7, 7, bits, shift), \
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}
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#define DECLARE_AD5065_CHANNELS(name, bits) \
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#define DECLARE_AD5065_CHANNELS(name, bits, shift) \
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const struct iio_chan_spec name[] = { \
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AD5064_CHANNEL(0, 0, bits), \
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AD5064_CHANNEL(1, 3, bits), \
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AD5064_CHANNEL(0, 0, bits, shift), \
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AD5064_CHANNEL(1, 3, bits, shift), \
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}
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static DECLARE_AD5064_CHANNELS(ad5024_channels, 12);
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static DECLARE_AD5064_CHANNELS(ad5044_channels, 14);
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static DECLARE_AD5064_CHANNELS(ad5064_channels, 16);
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static DECLARE_AD5064_CHANNELS(ad5024_channels, 12, 8);
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static DECLARE_AD5064_CHANNELS(ad5044_channels, 14, 6);
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static DECLARE_AD5064_CHANNELS(ad5064_channels, 16, 4);
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static DECLARE_AD5065_CHANNELS(ad5025_channels, 12);
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static DECLARE_AD5065_CHANNELS(ad5045_channels, 14);
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static DECLARE_AD5065_CHANNELS(ad5065_channels, 16);
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static DECLARE_AD5065_CHANNELS(ad5025_channels, 12, 8);
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static DECLARE_AD5065_CHANNELS(ad5045_channels, 14, 6);
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static DECLARE_AD5065_CHANNELS(ad5065_channels, 16, 4);
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static DECLARE_AD5064_CHANNELS(ad5629_channels, 12, 4);
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static DECLARE_AD5064_CHANNELS(ad5669_channels, 16, 0);
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static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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[ID_AD5024] = {
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@ -382,6 +389,18 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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.channels = ad5024_channels,
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.num_channels = 8,
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},
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[ID_AD5629_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5629_channels,
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.num_channels = 8,
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},
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[ID_AD5629_2] = {
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.shared_vref = true,
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.internal_vref = 5000000,
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.channels = ad5629_channels,
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.num_channels = 8,
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},
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[ID_AD5648_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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@ -418,6 +437,18 @@ static const struct ad5064_chip_info ad5064_chip_info_tbl[] = {
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.channels = ad5064_channels,
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.num_channels = 8,
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},
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[ID_AD5669_1] = {
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.shared_vref = true,
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.internal_vref = 2500000,
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.channels = ad5669_channels,
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.num_channels = 8,
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},
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[ID_AD5669_2] = {
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.shared_vref = true,
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.internal_vref = 5000000,
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.channels = ad5669_channels,
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.num_channels = 8,
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},
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};
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static inline unsigned int ad5064_num_vref(struct ad5064_state *st)
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@ -597,10 +628,16 @@ static int ad5064_i2c_write(struct ad5064_state *st, unsigned int cmd,
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unsigned int addr, unsigned int val)
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{
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struct i2c_client *i2c = to_i2c_client(st->dev);
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int ret;
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st->data.i2c[0] = (cmd << 4) | addr;
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put_unaligned_be16(val, &st->data.i2c[1]);
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return i2c_master_send(i2c, st->data.i2c, 3);
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ret = i2c_master_send(i2c, st->data.i2c, 3);
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if (ret < 0)
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return ret;
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return 0;
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}
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static int ad5064_i2c_probe(struct i2c_client *i2c,
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@ -616,12 +653,12 @@ static int ad5064_i2c_remove(struct i2c_client *i2c)
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}
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static const struct i2c_device_id ad5064_i2c_ids[] = {
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{"ad5629-1", ID_AD5628_1},
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{"ad5629-2", ID_AD5628_2},
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{"ad5629-3", ID_AD5628_2}, /* similar enough to ad5629-2 */
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{"ad5669-1", ID_AD5668_1},
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{"ad5669-2", ID_AD5668_2},
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{"ad5669-3", ID_AD5668_2}, /* similar enough to ad5669-2 */
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{"ad5629-1", ID_AD5629_1},
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{"ad5629-2", ID_AD5629_2},
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{"ad5629-3", ID_AD5629_2}, /* similar enough to ad5629-2 */
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{"ad5669-1", ID_AD5669_1},
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{"ad5669-2", ID_AD5669_2},
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{"ad5669-3", ID_AD5669_2}, /* similar enough to ad5669-2 */
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{}
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};
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MODULE_DEVICE_TABLE(i2c, ad5064_i2c_ids);
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switch (mask) {
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case IIO_CHAN_INFO_RAW:
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ret = i2c_smbus_read_word_data(*client,
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chan->type == IIO_TEMP ?
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SI7020CMD_TEMP_HOLD :
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SI7020CMD_RH_HOLD);
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ret = i2c_smbus_read_word_swapped(*client,
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chan->type == IIO_TEMP ?
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SI7020CMD_TEMP_HOLD :
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SI7020CMD_RH_HOLD);
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if (ret < 0)
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return ret;
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*val = ret >> 2;
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@ -18,7 +18,8 @@ source "drivers/staging/iio/resolver/Kconfig"
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source "drivers/staging/iio/trigger/Kconfig"
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config IIO_DUMMY_EVGEN
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tristate
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tristate
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select IRQ_WORK
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config IIO_SIMPLE_DUMMY
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tristate "An example driver with no hardware requirements"
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@ -76,7 +76,7 @@ static int lpc32xx_read_raw(struct iio_dev *indio_dev,
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if (mask == IIO_CHAN_INFO_RAW) {
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mutex_lock(&indio_dev->mlock);
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clk_enable(info->clk);
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clk_prepare_enable(info->clk);
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/* Measurement setup */
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__raw_writel(AD_INTERNAL | (chan->address) | AD_REFp | AD_REFm,
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LPC32XX_ADC_SELECT(info->adc_base));
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@ -84,7 +84,7 @@ static int lpc32xx_read_raw(struct iio_dev *indio_dev,
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__raw_writel(AD_PDN_CTRL | AD_STROBE,
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LPC32XX_ADC_CTRL(info->adc_base));
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wait_for_completion(&info->completion); /* set by ISR */
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clk_disable(info->clk);
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clk_disable_unprepare(info->clk);
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*val = info->value;
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mutex_unlock(&indio_dev->mlock);
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