ARM: OMAP3/4: PRM: provide io chain reconfig function through irq setup
This helps to make the PRM registration modular, and also gets rid of a cpu type check done later. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -480,6 +480,7 @@ struct omap_prcm_irq {
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* @ocp_barrier: fn ptr to force buffered PRM writes to complete
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* @save_and_clear_irqen: fn ptr to save and clear IRQENABLE regs
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* @restore_irqen: fn ptr to save and clear IRQENABLE regs
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* @reconfigure_io_chain: fn ptr to reconfigure IO chain
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* @saved_mask: IRQENABLE regs are saved here during suspend
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* @priority_mask: 1 bit per IRQ, set to 1 if omap_prcm_irq.priority = true
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* @base_irq: base dynamic IRQ number, returned from irq_alloc_descs() in init
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@ -501,6 +502,7 @@ struct omap_prcm_irq_setup {
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void (*ocp_barrier)(void);
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void (*save_and_clear_irqen)(u32 *saved_mask);
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void (*restore_irqen)(u32 *saved_mask);
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void (*reconfigure_io_chain)(void);
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u32 *saved_mask;
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u32 *priority_mask;
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int base_irq;
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@ -43,6 +43,7 @@ static struct omap_prcm_irq_setup omap3_prcm_irq_setup = {
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.ocp_barrier = &omap3xxx_prm_ocp_barrier,
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.save_and_clear_irqen = &omap3xxx_prm_save_and_clear_irqen,
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.restore_irqen = &omap3xxx_prm_restore_irqen,
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.reconfigure_io_chain = &omap3xxx_prm_reconfigure_io_chain,
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};
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/*
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@ -47,6 +47,7 @@ static struct omap_prcm_irq_setup omap4_prcm_irq_setup = {
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.ocp_barrier = &omap44xx_prm_ocp_barrier,
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.save_and_clear_irqen = &omap44xx_prm_save_and_clear_irqen,
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.restore_irqen = &omap44xx_prm_restore_irqen,
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.reconfigure_io_chain = &omap44xx_prm_reconfigure_io_chain,
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};
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/*
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@ -330,12 +330,7 @@ int omap_prcm_register_chain_handler(struct omap_prcm_irq_setup *irq_setup)
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if (of_have_populated_dt()) {
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int irq = omap_prcm_event_to_irq("io");
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if (cpu_is_omap34xx())
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omap_pcs_legacy_init(irq,
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omap3xxx_prm_reconfigure_io_chain);
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else
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omap_pcs_legacy_init(irq,
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omap44xx_prm_reconfigure_io_chain);
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omap_pcs_legacy_init(irq, irq_setup->reconfigure_io_chain);
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}
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return 0;
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