Merge branch 'net-dsa-mt7530-updates-for-phylink-changes'
Russell King says: ==================== net: dsa: mt7530: updates for phylink changes This revised series is a partial conversion of the mt7530 DSA driver to the modern phylink infrastructure. This driver has some exceptional cases which prevent - at the moment - its full conversion (particularly with the Autoneg bit) to using phylink_generic_validate(). Patch 1 fixes the incorrect test highlighted in the first RFC series. Patch 2 fixes the incorrect assumption that RGMII is unable to support 1000BASE-X. Patch 3 populates the supported_interfaces for each port Patch 4 removes the interface checks that become unnecessary as a result of patch 3. Patch 5 removes use of phylink_helper_basex_speed() which is no longer required by phylink. Patch 6 becomes possible after patch 5, only indicating the ethtool modes that can be supported with a particular interface mode - this involves removing some modes and adding others as per phylink documentation. Patch 7 switches the driver to use phylink_get_linkmodes(), which moves the driver as close as we can to phylink_generic_validate() due to the Autoneg bit issue mentioned above. Patch 8 converts the driver to the phylink pcs support, removing a bunch of driver private indirected methods. We include TRGMII as a PCS even though strictly TRGMII does not have a PCS. This is convenient to allow the change in patch 9 to be made. Patch 9 moves the special autoneg handling to the PCS validate method, which means we can convert the MAC side to the generic validator. Patch 10 marks the driver as non-legacy. The series was posted on 23 February, and a ping sent on 3 March, but no feedback has been received. The previous posting also received no feedback on the actual patches either. v2: - fix build issue in patch 5 - add Marek's tested-by drivers/net/dsa/mt7530.c | 330 +++++++++++++++++++++-------------------------- drivers/net/dsa/mt7530.h | 26 ++-- 2 files changed, 159 insertions(+), 197 deletions(-) ==================== Link: https://lore.kernel.org/r/YlP4vGKVrlIJUUHK@shell.armlinux.org.uk Signed-off-by: Paolo Abeni <pabeni@redhat.com>
This commit is contained in:
Paolo Abeni
commit
80ecb114f2
@ -24,6 +24,11 @@
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#include "mt7530.h"
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static struct mt753x_pcs *pcs_to_mt753x_pcs(struct phylink_pcs *pcs)
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{
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return container_of(pcs, struct mt753x_pcs, pcs);
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}
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/* String, offset, and register size in bytes if different from 4 bytes */
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static const struct mt7530_mib_desc mt7530_mib[] = {
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MIB_DESC(1, 0x00, "TxDrop"),
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@ -2389,35 +2394,30 @@ mt7531_setup(struct dsa_switch *ds)
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return 0;
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}
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static bool
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mt7530_phy_mode_supported(struct dsa_switch *ds, int port,
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const struct phylink_link_state *state)
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static void mt7530_mac_port_get_caps(struct dsa_switch *ds, int port,
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struct phylink_config *config)
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{
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struct mt7530_priv *priv = ds->priv;
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switch (port) {
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case 0 ... 4: /* Internal phy */
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if (state->interface != PHY_INTERFACE_MODE_GMII)
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return false;
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__set_bit(PHY_INTERFACE_MODE_GMII,
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config->supported_interfaces);
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break;
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case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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if (!phy_interface_mode_is_rgmii(state->interface) &&
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state->interface != PHY_INTERFACE_MODE_MII &&
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state->interface != PHY_INTERFACE_MODE_GMII)
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return false;
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break;
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case 6: /* 1st cpu port */
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if (state->interface != PHY_INTERFACE_MODE_RGMII &&
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state->interface != PHY_INTERFACE_MODE_TRGMII)
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return false;
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break;
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default:
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dev_err(priv->dev, "%s: unsupported port: %i\n", __func__,
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port);
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return false;
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}
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return true;
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case 5: /* 2nd cpu port with phy of port 0 or 4 / external phy */
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phy_interface_set_rgmii(config->supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_MII,
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config->supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_GMII,
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config->supported_interfaces);
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break;
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case 6: /* 1st cpu port */
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__set_bit(PHY_INTERFACE_MODE_RGMII,
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config->supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_TRGMII,
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config->supported_interfaces);
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break;
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}
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}
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static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port)
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@ -2425,42 +2425,35 @@ static bool mt7531_is_rgmii_port(struct mt7530_priv *priv, u32 port)
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return (port == 5) && (priv->p5_intf_sel != P5_INTF_SEL_GMAC5_SGMII);
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}
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static bool
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mt7531_phy_mode_supported(struct dsa_switch *ds, int port,
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const struct phylink_link_state *state)
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static void mt7531_mac_port_get_caps(struct dsa_switch *ds, int port,
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struct phylink_config *config)
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{
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struct mt7530_priv *priv = ds->priv;
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switch (port) {
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case 0 ... 4: /* Internal phy */
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if (state->interface != PHY_INTERFACE_MODE_GMII)
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return false;
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__set_bit(PHY_INTERFACE_MODE_GMII,
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config->supported_interfaces);
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break;
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case 5: /* 2nd cpu port supports either rgmii or sgmii/8023z */
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if (mt7531_is_rgmii_port(priv, port))
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return phy_interface_mode_is_rgmii(state->interface);
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if (mt7531_is_rgmii_port(priv, port)) {
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phy_interface_set_rgmii(config->supported_interfaces);
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break;
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}
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fallthrough;
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case 6: /* 1st cpu port supports sgmii/8023z only */
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if (state->interface != PHY_INTERFACE_MODE_SGMII &&
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!phy_interface_mode_is_8023z(state->interface))
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return false;
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__set_bit(PHY_INTERFACE_MODE_SGMII,
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config->supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_1000BASEX,
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config->supported_interfaces);
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__set_bit(PHY_INTERFACE_MODE_2500BASEX,
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config->supported_interfaces);
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config->mac_capabilities |= MAC_2500FD;
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break;
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default:
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dev_err(priv->dev, "%s: unsupported port: %i\n", __func__,
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port);
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return false;
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}
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return true;
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}
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static bool
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mt753x_phy_mode_supported(struct dsa_switch *ds, int port,
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const struct phylink_link_state *state)
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{
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struct mt7530_priv *priv = ds->priv;
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return priv->info->phy_mode_supported(ds, port, state);
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}
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static int
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@ -2533,30 +2526,11 @@ static int mt7531_rgmii_setup(struct mt7530_priv *priv, u32 port,
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return 0;
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}
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static void mt7531_sgmii_validate(struct mt7530_priv *priv, int port,
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unsigned long *supported)
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static void mt7531_pcs_link_up(struct phylink_pcs *pcs, unsigned int mode,
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phy_interface_t interface, int speed, int duplex)
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{
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/* Port5 supports ethier RGMII or SGMII.
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* Port6 supports SGMII only.
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*/
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switch (port) {
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case 5:
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if (mt7531_is_rgmii_port(priv, port))
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break;
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fallthrough;
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case 6:
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phylink_set(supported, 1000baseX_Full);
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phylink_set(supported, 2500baseX_Full);
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phylink_set(supported, 2500baseT_Full);
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}
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}
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static void
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mt7531_sgmii_link_up_force(struct dsa_switch *ds, int port,
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unsigned int mode, phy_interface_t interface,
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int speed, int duplex)
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{
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struct mt7530_priv *priv = ds->priv;
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struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)->priv;
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int port = pcs_to_mt753x_pcs(pcs)->port;
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unsigned int val;
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/* For adjusting speed and duplex of SGMII force mode. */
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@ -2582,6 +2556,9 @@ mt7531_sgmii_link_up_force(struct dsa_switch *ds, int port,
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/* MT7531 SGMII 1G force mode can only work in full duplex mode,
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* no matter MT7531_SGMII_FORCE_HALF_DUPLEX is set or not.
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*
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* The speed check is unnecessary as the MAC capabilities apply
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* this restriction. --rmk
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*/
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if ((speed == SPEED_10 || speed == SPEED_100) &&
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duplex != DUPLEX_FULL)
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@ -2657,9 +2634,10 @@ static int mt7531_sgmii_setup_mode_an(struct mt7530_priv *priv, int port,
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return 0;
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}
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static void mt7531_sgmii_restart_an(struct dsa_switch *ds, int port)
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static void mt7531_pcs_an_restart(struct phylink_pcs *pcs)
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{
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struct mt7530_priv *priv = ds->priv;
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struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)->priv;
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int port = pcs_to_mt753x_pcs(pcs)->port;
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u32 val;
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/* Only restart AN when AN is enabled */
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@ -2716,6 +2694,24 @@ mt753x_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
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return priv->info->mac_port_config(ds, port, mode, state->interface);
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}
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static struct phylink_pcs *
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mt753x_phylink_mac_select_pcs(struct dsa_switch *ds, int port,
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phy_interface_t interface)
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{
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struct mt7530_priv *priv = ds->priv;
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switch (interface) {
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case PHY_INTERFACE_MODE_TRGMII:
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case PHY_INTERFACE_MODE_SGMII:
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case PHY_INTERFACE_MODE_1000BASEX:
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case PHY_INTERFACE_MODE_2500BASEX:
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return &priv->pcs[port].pcs;
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default:
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return NULL;
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}
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}
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static void
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mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
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const struct phylink_link_state *state)
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@ -2723,9 +2719,6 @@ mt753x_phylink_mac_config(struct dsa_switch *ds, int port, unsigned int mode,
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struct mt7530_priv *priv = ds->priv;
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u32 mcr_cur, mcr_new;
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if (!mt753x_phy_mode_supported(ds, port, state))
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goto unsupported;
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switch (port) {
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case 0 ... 4: /* Internal phy */
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if (state->interface != PHY_INTERFACE_MODE_GMII)
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@ -2780,17 +2773,6 @@ unsupported:
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mt7530_write(priv, MT7530_PMCR_P(port), mcr_new);
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}
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static void
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mt753x_phylink_mac_an_restart(struct dsa_switch *ds, int port)
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{
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struct mt7530_priv *priv = ds->priv;
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if (!priv->info->mac_pcs_an_restart)
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return;
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priv->info->mac_pcs_an_restart(ds, port);
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}
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static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port,
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unsigned int mode,
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phy_interface_t interface)
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@ -2800,16 +2782,13 @@ static void mt753x_phylink_mac_link_down(struct dsa_switch *ds, int port,
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mt7530_clear(priv, MT7530_PMCR_P(port), PMCR_LINK_SETTINGS_MASK);
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}
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static void mt753x_mac_pcs_link_up(struct dsa_switch *ds, int port,
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unsigned int mode, phy_interface_t interface,
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int speed, int duplex)
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static void mt753x_phylink_pcs_link_up(struct phylink_pcs *pcs,
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unsigned int mode,
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phy_interface_t interface,
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int speed, int duplex)
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{
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struct mt7530_priv *priv = ds->priv;
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if (!priv->info->mac_pcs_link_up)
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return;
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priv->info->mac_pcs_link_up(ds, port, mode, interface, speed, duplex);
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if (pcs->ops->pcs_link_up)
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pcs->ops->pcs_link_up(pcs, mode, interface, speed, duplex);
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}
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static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port,
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@ -2822,8 +2801,6 @@ static void mt753x_phylink_mac_link_up(struct dsa_switch *ds, int port,
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struct mt7530_priv *priv = ds->priv;
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u32 mcr;
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mt753x_mac_pcs_link_up(ds, port, mode, interface, speed, duplex);
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mcr = PMCR_RX_EN | PMCR_TX_EN | PMCR_FORCE_LNK;
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/* MT753x MAC works in 1G full duplex mode for all up-clocked
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@ -2903,80 +2880,50 @@ mt7531_cpu_port_config(struct dsa_switch *ds, int port)
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return ret;
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mt7530_write(priv, MT7530_PMCR_P(port),
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PMCR_CPU_PORT_SETTING(priv->id));
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mt753x_phylink_pcs_link_up(&priv->pcs[port].pcs, MLO_AN_FIXED,
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interface, speed, DUPLEX_FULL);
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mt753x_phylink_mac_link_up(ds, port, MLO_AN_FIXED, interface, NULL,
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speed, DUPLEX_FULL, true, true);
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return 0;
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}
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static void
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mt7530_mac_port_validate(struct dsa_switch *ds, int port,
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unsigned long *supported)
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{
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if (port == 5)
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phylink_set(supported, 1000baseX_Full);
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}
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static void mt7531_mac_port_validate(struct dsa_switch *ds, int port,
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unsigned long *supported)
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static void mt753x_phylink_get_caps(struct dsa_switch *ds, int port,
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struct phylink_config *config)
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{
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struct mt7530_priv *priv = ds->priv;
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mt7531_sgmii_validate(priv, port, supported);
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}
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/* This switch only supports full-duplex at 1Gbps */
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config->mac_capabilities = MAC_ASYM_PAUSE | MAC_SYM_PAUSE |
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MAC_10 | MAC_100 | MAC_1000FD;
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static void
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mt753x_phylink_validate(struct dsa_switch *ds, int port,
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unsigned long *supported,
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struct phylink_link_state *state)
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{
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__ETHTOOL_DECLARE_LINK_MODE_MASK(mask) = { 0, };
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struct mt7530_priv *priv = ds->priv;
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if (state->interface != PHY_INTERFACE_MODE_NA &&
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!mt753x_phy_mode_supported(ds, port, state)) {
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linkmode_zero(supported);
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return;
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}
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phylink_set_port_modes(mask);
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|
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if (state->interface != PHY_INTERFACE_MODE_TRGMII &&
|
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!phy_interface_mode_is_8023z(state->interface)) {
|
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phylink_set(mask, 10baseT_Half);
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phylink_set(mask, 10baseT_Full);
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phylink_set(mask, 100baseT_Half);
|
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phylink_set(mask, 100baseT_Full);
|
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phylink_set(mask, Autoneg);
|
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}
|
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|
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/* This switch only supports 1G full-duplex. */
|
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if (state->interface != PHY_INTERFACE_MODE_MII)
|
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phylink_set(mask, 1000baseT_Full);
|
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|
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priv->info->mac_port_validate(ds, port, mask);
|
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phylink_set(mask, Pause);
|
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phylink_set(mask, Asym_Pause);
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|
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linkmode_and(supported, supported, mask);
|
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linkmode_and(state->advertising, state->advertising, mask);
|
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|
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/* We can only operate at 2500BaseX or 1000BaseX. If requested
|
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* to advertise both, only report advertising at 2500BaseX.
|
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/* This driver does not make use of the speed, duplex, pause or the
|
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* advertisement in its mac_config, so it is safe to mark this driver
|
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* as non-legacy.
|
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*/
|
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phylink_helper_basex_speed(state);
|
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config->legacy_pre_march2020 = false;
|
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|
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priv->info->mac_port_get_caps(ds, port, config);
|
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}
|
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|
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static int
|
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mt7530_phylink_mac_link_state(struct dsa_switch *ds, int port,
|
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struct phylink_link_state *state)
|
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static int mt753x_pcs_validate(struct phylink_pcs *pcs,
|
||||
unsigned long *supported,
|
||||
const struct phylink_link_state *state)
|
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{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
u32 pmsr;
|
||||
/* Autonegotiation is not supported in TRGMII nor 802.3z modes */
|
||||
if (state->interface == PHY_INTERFACE_MODE_TRGMII ||
|
||||
phy_interface_mode_is_8023z(state->interface))
|
||||
phylink_clear(supported, Autoneg);
|
||||
|
||||
if (port < 0 || port >= MT7530_NUM_PORTS)
|
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return -EINVAL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void mt7530_pcs_get_state(struct phylink_pcs *pcs,
|
||||
struct phylink_link_state *state)
|
||||
{
|
||||
struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)->priv;
|
||||
int port = pcs_to_mt753x_pcs(pcs)->port;
|
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u32 pmsr;
|
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|
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pmsr = mt7530_read(priv, MT7530_PMSR_P(port));
|
||||
|
||||
@ -3004,8 +2951,6 @@ mt7530_phylink_mac_link_state(struct dsa_switch *ds, int port,
|
||||
state->pause |= MLO_PAUSE_RX;
|
||||
if (pmsr & PMSR_TX_FC)
|
||||
state->pause |= MLO_PAUSE_TX;
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int
|
||||
@ -3047,32 +2992,51 @@ mt7531_sgmii_pcs_get_state_an(struct mt7530_priv *priv, int port,
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int
|
||||
mt7531_phylink_mac_link_state(struct dsa_switch *ds, int port,
|
||||
struct phylink_link_state *state)
|
||||
static void mt7531_pcs_get_state(struct phylink_pcs *pcs,
|
||||
struct phylink_link_state *state)
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
struct mt7530_priv *priv = pcs_to_mt753x_pcs(pcs)->priv;
|
||||
int port = pcs_to_mt753x_pcs(pcs)->port;
|
||||
|
||||
if (state->interface == PHY_INTERFACE_MODE_SGMII)
|
||||
return mt7531_sgmii_pcs_get_state_an(priv, port, state);
|
||||
|
||||
return -EOPNOTSUPP;
|
||||
mt7531_sgmii_pcs_get_state_an(priv, port, state);
|
||||
else
|
||||
state->link = false;
|
||||
}
|
||||
|
||||
static int
|
||||
mt753x_phylink_mac_link_state(struct dsa_switch *ds, int port,
|
||||
struct phylink_link_state *state)
|
||||
static int mt753x_pcs_config(struct phylink_pcs *pcs, unsigned int mode,
|
||||
phy_interface_t interface,
|
||||
const unsigned long *advertising,
|
||||
bool permit_pause_to_mac)
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
|
||||
return priv->info->mac_port_get_state(ds, port, state);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void mt7530_pcs_an_restart(struct phylink_pcs *pcs)
|
||||
{
|
||||
}
|
||||
|
||||
static const struct phylink_pcs_ops mt7530_pcs_ops = {
|
||||
.pcs_validate = mt753x_pcs_validate,
|
||||
.pcs_get_state = mt7530_pcs_get_state,
|
||||
.pcs_config = mt753x_pcs_config,
|
||||
.pcs_an_restart = mt7530_pcs_an_restart,
|
||||
};
|
||||
|
||||
static const struct phylink_pcs_ops mt7531_pcs_ops = {
|
||||
.pcs_validate = mt753x_pcs_validate,
|
||||
.pcs_get_state = mt7531_pcs_get_state,
|
||||
.pcs_config = mt753x_pcs_config,
|
||||
.pcs_an_restart = mt7531_pcs_an_restart,
|
||||
.pcs_link_up = mt7531_pcs_link_up,
|
||||
};
|
||||
|
||||
static int
|
||||
mt753x_setup(struct dsa_switch *ds)
|
||||
{
|
||||
struct mt7530_priv *priv = ds->priv;
|
||||
int ret = priv->info->sw_setup(ds);
|
||||
int i;
|
||||
|
||||
if (ret)
|
||||
return ret;
|
||||
@ -3085,6 +3049,13 @@ mt753x_setup(struct dsa_switch *ds)
|
||||
if (ret && priv->irq)
|
||||
mt7530_free_irq_common(priv);
|
||||
|
||||
/* Initialise the PCS devices */
|
||||
for (i = 0; i < priv->ds->num_ports; i++) {
|
||||
priv->pcs[i].pcs.ops = priv->info->pcs_ops;
|
||||
priv->pcs[i].priv = priv;
|
||||
priv->pcs[i].port = i;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -3144,10 +3115,9 @@ static const struct dsa_switch_ops mt7530_switch_ops = {
|
||||
.port_vlan_del = mt7530_port_vlan_del,
|
||||
.port_mirror_add = mt753x_port_mirror_add,
|
||||
.port_mirror_del = mt753x_port_mirror_del,
|
||||
.phylink_validate = mt753x_phylink_validate,
|
||||
.phylink_mac_link_state = mt753x_phylink_mac_link_state,
|
||||
.phylink_get_caps = mt753x_phylink_get_caps,
|
||||
.phylink_mac_select_pcs = mt753x_phylink_mac_select_pcs,
|
||||
.phylink_mac_config = mt753x_phylink_mac_config,
|
||||
.phylink_mac_an_restart = mt753x_phylink_mac_an_restart,
|
||||
.phylink_mac_link_down = mt753x_phylink_mac_link_down,
|
||||
.phylink_mac_link_up = mt753x_phylink_mac_link_up,
|
||||
.get_mac_eee = mt753x_get_mac_eee,
|
||||
@ -3157,39 +3127,34 @@ static const struct dsa_switch_ops mt7530_switch_ops = {
|
||||
static const struct mt753x_info mt753x_table[] = {
|
||||
[ID_MT7621] = {
|
||||
.id = ID_MT7621,
|
||||
.pcs_ops = &mt7530_pcs_ops,
|
||||
.sw_setup = mt7530_setup,
|
||||
.phy_read = mt7530_phy_read,
|
||||
.phy_write = mt7530_phy_write,
|
||||
.pad_setup = mt7530_pad_clk_setup,
|
||||
.phy_mode_supported = mt7530_phy_mode_supported,
|
||||
.mac_port_validate = mt7530_mac_port_validate,
|
||||
.mac_port_get_state = mt7530_phylink_mac_link_state,
|
||||
.mac_port_get_caps = mt7530_mac_port_get_caps,
|
||||
.mac_port_config = mt7530_mac_config,
|
||||
},
|
||||
[ID_MT7530] = {
|
||||
.id = ID_MT7530,
|
||||
.pcs_ops = &mt7530_pcs_ops,
|
||||
.sw_setup = mt7530_setup,
|
||||
.phy_read = mt7530_phy_read,
|
||||
.phy_write = mt7530_phy_write,
|
||||
.pad_setup = mt7530_pad_clk_setup,
|
||||
.phy_mode_supported = mt7530_phy_mode_supported,
|
||||
.mac_port_validate = mt7530_mac_port_validate,
|
||||
.mac_port_get_state = mt7530_phylink_mac_link_state,
|
||||
.mac_port_get_caps = mt7530_mac_port_get_caps,
|
||||
.mac_port_config = mt7530_mac_config,
|
||||
},
|
||||
[ID_MT7531] = {
|
||||
.id = ID_MT7531,
|
||||
.pcs_ops = &mt7531_pcs_ops,
|
||||
.sw_setup = mt7531_setup,
|
||||
.phy_read = mt7531_ind_phy_read,
|
||||
.phy_write = mt7531_ind_phy_write,
|
||||
.pad_setup = mt7531_pad_setup,
|
||||
.cpu_port_config = mt7531_cpu_port_config,
|
||||
.phy_mode_supported = mt7531_phy_mode_supported,
|
||||
.mac_port_validate = mt7531_mac_port_validate,
|
||||
.mac_port_get_state = mt7531_phylink_mac_link_state,
|
||||
.mac_port_get_caps = mt7531_mac_port_get_caps,
|
||||
.mac_port_config = mt7531_mac_config,
|
||||
.mac_pcs_an_restart = mt7531_sgmii_restart_an,
|
||||
.mac_pcs_link_up = mt7531_sgmii_link_up_force,
|
||||
},
|
||||
};
|
||||
|
||||
@ -3246,9 +3211,8 @@ mt7530_probe(struct mdio_device *mdiodev)
|
||||
*/
|
||||
if (!priv->info->sw_setup || !priv->info->pad_setup ||
|
||||
!priv->info->phy_read || !priv->info->phy_write ||
|
||||
!priv->info->phy_mode_supported ||
|
||||
!priv->info->mac_port_validate ||
|
||||
!priv->info->mac_port_get_state || !priv->info->mac_port_config)
|
||||
!priv->info->mac_port_get_caps ||
|
||||
!priv->info->mac_port_config)
|
||||
return -EINVAL;
|
||||
|
||||
priv->id = priv->info->id;
|
||||
|
||||
@ -741,6 +741,12 @@ static const char *p5_intf_modes(unsigned int p5_interface)
|
||||
|
||||
struct mt7530_priv;
|
||||
|
||||
struct mt753x_pcs {
|
||||
struct phylink_pcs pcs;
|
||||
struct mt7530_priv *priv;
|
||||
int port;
|
||||
};
|
||||
|
||||
/* struct mt753x_info - This is the main data structure for holding the specific
|
||||
* part for each supported device
|
||||
* @sw_setup: Holding the handler to a device initialization
|
||||
@ -752,36 +758,27 @@ struct mt7530_priv;
|
||||
* port
|
||||
* @mac_port_validate: Holding the way to set addition validate type for a
|
||||
* certan MAC port
|
||||
* @mac_port_get_state: Holding the way getting the MAC/PCS state for a certain
|
||||
* MAC port
|
||||
* @mac_port_config: Holding the way setting up the PHY attribute to a
|
||||
* certain MAC port
|
||||
* @mac_pcs_an_restart Holding the way restarting PCS autonegotiation for a
|
||||
* certain MAC port
|
||||
* @mac_pcs_link_up: Holding the way setting up the PHY attribute to the pcs
|
||||
* of the certain MAC port
|
||||
*/
|
||||
struct mt753x_info {
|
||||
enum mt753x_id id;
|
||||
|
||||
const struct phylink_pcs_ops *pcs_ops;
|
||||
|
||||
int (*sw_setup)(struct dsa_switch *ds);
|
||||
int (*phy_read)(struct mt7530_priv *priv, int port, int regnum);
|
||||
int (*phy_write)(struct mt7530_priv *priv, int port, int regnum, u16 val);
|
||||
int (*pad_setup)(struct dsa_switch *ds, phy_interface_t interface);
|
||||
int (*cpu_port_config)(struct dsa_switch *ds, int port);
|
||||
bool (*phy_mode_supported)(struct dsa_switch *ds, int port,
|
||||
const struct phylink_link_state *state);
|
||||
void (*mac_port_get_caps)(struct dsa_switch *ds, int port,
|
||||
struct phylink_config *config);
|
||||
void (*mac_port_validate)(struct dsa_switch *ds, int port,
|
||||
phy_interface_t interface,
|
||||
unsigned long *supported);
|
||||
int (*mac_port_get_state)(struct dsa_switch *ds, int port,
|
||||
struct phylink_link_state *state);
|
||||
int (*mac_port_config)(struct dsa_switch *ds, int port,
|
||||
unsigned int mode,
|
||||
phy_interface_t interface);
|
||||
void (*mac_pcs_an_restart)(struct dsa_switch *ds, int port);
|
||||
void (*mac_pcs_link_up)(struct dsa_switch *ds, int port,
|
||||
unsigned int mode, phy_interface_t interface,
|
||||
int speed, int duplex);
|
||||
};
|
||||
|
||||
/* struct mt7530_priv - This is the main data structure for holding the state
|
||||
@ -823,6 +820,7 @@ struct mt7530_priv {
|
||||
u8 mirror_tx;
|
||||
|
||||
struct mt7530_port ports[MT7530_NUM_PORTS];
|
||||
struct mt753x_pcs pcs[MT7530_NUM_PORTS];
|
||||
/* protect among processes for registers access*/
|
||||
struct mutex reg_mutex;
|
||||
int irq;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user