drm/amd/display: Revert logic for plane modifiers
This file was split in commit 5d945cbcd4
("drm/amd/display: Create a file dedicated to planes") and the logic in
dm_plane_format_mod_supported() function got changed by a switch logic.
That change broke drm_plane modifiers setting on series 5000 APUs
(tested on OXP mini AMD 5800U and HP Dev One 5850U PRO)
leading to Gamescope not working as reported on GitHub[1]
To reproduce the issue, enter a TTY and run:
$ gamescope -- vkcube
With said commit applied it will abort. This one restores the old logic,
fixing the issue that affects Gamescope.
[1](https://github.com/Plagman/gamescope/issues/624)
Cc: <stable@vger.kernel.org> # 6.0.x
Signed-off-by: Joaquín Ignacio Aramendía <samsagax@gmail.com>
Reviewed-by: Bas Nieuwenhuizen <bas@basnieuwenhuizen.nl>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
969758bbf5
commit
809734c110
@ -1369,7 +1369,7 @@ static bool dm_plane_format_mod_supported(struct drm_plane *plane,
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{
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{
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struct amdgpu_device *adev = drm_to_adev(plane->dev);
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struct amdgpu_device *adev = drm_to_adev(plane->dev);
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const struct drm_format_info *info = drm_format_info(format);
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const struct drm_format_info *info = drm_format_info(format);
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struct hw_asic_id asic_id = adev->dm.dc->ctx->asic_id;
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int i;
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enum dm_micro_swizzle microtile = modifier_gfx9_swizzle_mode(modifier) & 3;
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enum dm_micro_swizzle microtile = modifier_gfx9_swizzle_mode(modifier) & 3;
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@ -1386,49 +1386,13 @@ static bool dm_plane_format_mod_supported(struct drm_plane *plane,
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return true;
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return true;
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}
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}
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/* check if swizzle mode is supported by this version of DCN */
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/* Check that the modifier is on the list of the plane's supported modifiers. */
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switch (asic_id.chip_family) {
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for (i = 0; i < plane->modifier_count; i++) {
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case FAMILY_SI:
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if (modifier == plane->modifiers[i])
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case FAMILY_CI:
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break;
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case FAMILY_KV:
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case FAMILY_CZ:
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case FAMILY_VI:
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/* asics before AI does not have modifier support */
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return false;
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case FAMILY_AI:
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case FAMILY_RV:
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case FAMILY_NV:
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case FAMILY_VGH:
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case FAMILY_YELLOW_CARP:
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case AMDGPU_FAMILY_GC_10_3_6:
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case AMDGPU_FAMILY_GC_10_3_7:
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switch (AMD_FMT_MOD_GET(TILE, modifier)) {
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case AMD_FMT_MOD_TILE_GFX9_64K_R_X:
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case AMD_FMT_MOD_TILE_GFX9_64K_D_X:
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case AMD_FMT_MOD_TILE_GFX9_64K_S_X:
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case AMD_FMT_MOD_TILE_GFX9_64K_D:
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return true;
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default:
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return false;
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}
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break;
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case AMDGPU_FAMILY_GC_11_0_0:
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case AMDGPU_FAMILY_GC_11_0_1:
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switch (AMD_FMT_MOD_GET(TILE, modifier)) {
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case AMD_FMT_MOD_TILE_GFX11_256K_R_X:
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case AMD_FMT_MOD_TILE_GFX9_64K_R_X:
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case AMD_FMT_MOD_TILE_GFX9_64K_D_X:
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case AMD_FMT_MOD_TILE_GFX9_64K_S_X:
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case AMD_FMT_MOD_TILE_GFX9_64K_D:
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return true;
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default:
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return false;
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}
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break;
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default:
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ASSERT(0); /* Unknown asic */
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break;
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}
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}
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if (i == plane->modifier_count)
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return false;
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/*
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/*
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* For D swizzle the canonical modifier depends on the bpp, so check
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* For D swizzle the canonical modifier depends on the bpp, so check
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