forked from Minki/linux
net-next: mediatek: add support for IRQ grouping
The ethernet core has 3 IRQs. Using the IRQ grouping registers we are able to separate TX and RX IRQs, which allows us to service them on separate cores. This patch splits the IRQ handler into 2 separate functions, one for TX and another for RX. The TX housekeeping is split out into its own NAPI handler. Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
7bc9ccec34
commit
8067302973
@ -893,17 +893,17 @@ release_desc:
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return done;
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}
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static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
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static int mtk_poll_tx(struct mtk_eth *eth, int budget)
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{
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struct mtk_tx_ring *ring = ð->tx_ring;
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struct mtk_tx_dma *desc;
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struct sk_buff *skb;
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struct mtk_tx_buf *tx_buf;
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int total = 0, done[MTK_MAX_DEVS];
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unsigned int done[MTK_MAX_DEVS];
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unsigned int bytes[MTK_MAX_DEVS];
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u32 cpu, dma;
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static int condition;
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int i;
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int total = 0, i;
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memset(done, 0, sizeof(done));
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memset(bytes, 0, sizeof(bytes));
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@ -954,15 +954,6 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
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total += done[i];
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}
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/* read hw index again make sure no new tx packet */
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if (cpu != dma || cpu != mtk_r32(eth, MTK_QTX_DRX_PTR))
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*tx_again = true;
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else
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mtk_w32(eth, MTK_TX_DONE_INT, MTK_QMTK_INT_STATUS);
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if (!total)
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return 0;
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if (mtk_queue_stopped(eth) &&
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(atomic_read(&ring->free_count) > ring->thresh))
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mtk_wake_queue(eth);
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@ -970,47 +961,75 @@ static int mtk_poll_tx(struct mtk_eth *eth, int budget, bool *tx_again)
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return total;
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}
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static int mtk_poll(struct napi_struct *napi, int budget)
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static void mtk_handle_status_irq(struct mtk_eth *eth)
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{
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struct mtk_eth *eth = container_of(napi, struct mtk_eth, rx_napi);
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u32 status, status2, mask;
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int tx_done, rx_done;
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bool tx_again = false;
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status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
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status2 = mtk_r32(eth, MTK_INT_STATUS2);
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tx_done = 0;
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rx_done = 0;
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tx_again = 0;
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if (status & MTK_TX_DONE_INT)
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tx_done = mtk_poll_tx(eth, budget, &tx_again);
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if (status & MTK_RX_DONE_INT)
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rx_done = mtk_poll_rx(napi, budget, eth);
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u32 status2 = mtk_r32(eth, MTK_INT_STATUS2);
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if (unlikely(status2 & (MTK_GDM1_AF | MTK_GDM2_AF))) {
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mtk_stats_update(eth);
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mtk_w32(eth, (MTK_GDM1_AF | MTK_GDM2_AF),
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MTK_INT_STATUS2);
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}
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}
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static int mtk_napi_tx(struct napi_struct *napi, int budget)
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{
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struct mtk_eth *eth = container_of(napi, struct mtk_eth, tx_napi);
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u32 status, mask;
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int tx_done = 0;
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mtk_handle_status_irq(eth);
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mtk_w32(eth, MTK_TX_DONE_INT, MTK_QMTK_INT_STATUS);
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tx_done = mtk_poll_tx(eth, budget);
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if (unlikely(netif_msg_intr(eth))) {
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status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
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mask = mtk_r32(eth, MTK_QDMA_INT_MASK);
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netdev_info(eth->netdev[0],
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"done tx %d, rx %d, intr 0x%08x/0x%x\n",
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tx_done, rx_done, status, mask);
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dev_info(eth->dev,
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"done tx %d, intr 0x%08x/0x%x\n",
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tx_done, status, mask);
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}
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if (tx_again || rx_done == budget)
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if (tx_done == budget)
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return budget;
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status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
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if (status & (tx_intr | rx_intr))
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if (status & MTK_TX_DONE_INT)
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return budget;
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napi_complete(napi);
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mtk_irq_enable(eth, MTK_RX_DONE_INT | MTK_RX_DONE_INT);
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mtk_irq_enable(eth, MTK_TX_DONE_INT);
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return tx_done;
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}
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static int mtk_napi_rx(struct napi_struct *napi, int budget)
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{
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struct mtk_eth *eth = container_of(napi, struct mtk_eth, rx_napi);
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u32 status, mask;
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int rx_done = 0;
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mtk_handle_status_irq(eth);
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mtk_w32(eth, MTK_RX_DONE_INT, MTK_QMTK_INT_STATUS);
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rx_done = mtk_poll_rx(napi, budget, eth);
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if (unlikely(netif_msg_intr(eth))) {
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status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
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mask = mtk_r32(eth, MTK_QDMA_INT_MASK);
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dev_info(eth->dev,
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"done rx %d, intr 0x%08x/0x%x\n",
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rx_done, status, mask);
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}
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if (rx_done == budget)
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return budget;
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status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
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if (status & MTK_RX_DONE_INT)
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return budget;
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napi_complete(napi);
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mtk_irq_enable(eth, MTK_RX_DONE_INT);
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return rx_done;
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}
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@ -1246,22 +1265,26 @@ static void mtk_tx_timeout(struct net_device *dev)
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schedule_work(ð->pending_work);
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}
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static irqreturn_t mtk_handle_irq(int irq, void *_eth)
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static irqreturn_t mtk_handle_irq_rx(int irq, void *_eth)
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{
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struct mtk_eth *eth = _eth;
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u32 status;
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status = mtk_r32(eth, MTK_QMTK_INT_STATUS);
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if (unlikely(!status))
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return IRQ_NONE;
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if (likely(status & (MTK_RX_DONE_INT | MTK_TX_DONE_INT))) {
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if (likely(napi_schedule_prep(ð->rx_napi)))
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__napi_schedule(ð->rx_napi);
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} else {
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mtk_w32(eth, status, MTK_QMTK_INT_STATUS);
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if (likely(napi_schedule_prep(ð->rx_napi))) {
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__napi_schedule(ð->rx_napi);
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mtk_irq_disable(eth, MTK_RX_DONE_INT);
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}
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return IRQ_HANDLED;
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}
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static irqreturn_t mtk_handle_irq_tx(int irq, void *_eth)
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{
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struct mtk_eth *eth = _eth;
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if (likely(napi_schedule_prep(ð->tx_napi))) {
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__napi_schedule(ð->tx_napi);
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mtk_irq_disable(eth, MTK_TX_DONE_INT);
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}
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mtk_irq_disable(eth, (MTK_RX_DONE_INT | MTK_TX_DONE_INT));
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return IRQ_HANDLED;
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}
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@ -1274,7 +1297,7 @@ static void mtk_poll_controller(struct net_device *dev)
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u32 int_mask = MTK_TX_DONE_INT | MTK_RX_DONE_INT;
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mtk_irq_disable(eth, int_mask);
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mtk_handle_irq(dev->irq, dev);
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mtk_handle_irq(dev->irq[0], dev);
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mtk_irq_enable(eth, int_mask);
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}
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#endif
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@ -1310,6 +1333,7 @@ static int mtk_open(struct net_device *dev)
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if (err)
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return err;
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napi_enable(ð->tx_napi);
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napi_enable(ð->rx_napi);
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mtk_irq_enable(eth, MTK_TX_DONE_INT | MTK_RX_DONE_INT);
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}
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@ -1358,6 +1382,7 @@ static int mtk_stop(struct net_device *dev)
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return 0;
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mtk_irq_disable(eth, MTK_TX_DONE_INT | MTK_RX_DONE_INT);
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napi_disable(ð->tx_napi);
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napi_disable(ð->rx_napi);
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mtk_stop_dma(eth, MTK_QDMA_GLO_CFG);
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@ -1395,7 +1420,11 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
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/* Enable RX VLan Offloading */
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mtk_w32(eth, 1, MTK_CDMP_EG_CTRL);
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err = devm_request_irq(eth->dev, eth->irq, mtk_handle_irq, 0,
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err = devm_request_irq(eth->dev, eth->irq[1], mtk_handle_irq_tx, 0,
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dev_name(eth->dev), eth);
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if (err)
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return err;
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err = devm_request_irq(eth->dev, eth->irq[2], mtk_handle_irq_rx, 0,
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dev_name(eth->dev), eth);
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if (err)
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return err;
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@ -1411,7 +1440,11 @@ static int __init mtk_hw_init(struct mtk_eth *eth)
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mtk_w32(eth, 0, MTK_RST_GL);
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/* FE int grouping */
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mtk_w32(eth, 0, MTK_FE_INT_GRP);
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mtk_w32(eth, MTK_TX_DONE_INT, MTK_PDMA_INT_GRP1);
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mtk_w32(eth, MTK_RX_DONE_INT, MTK_PDMA_INT_GRP2);
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mtk_w32(eth, MTK_TX_DONE_INT, MTK_QDMA_INT_GRP1);
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mtk_w32(eth, MTK_RX_DONE_INT, MTK_QDMA_INT_GRP2);
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mtk_w32(eth, 0x21021000, MTK_FE_INT_GRP);
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for (i = 0; i < 2; i++) {
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u32 val = mtk_r32(eth, MTK_GDMA_FWD_CFG(i));
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@ -1459,7 +1492,9 @@ static void mtk_uninit(struct net_device *dev)
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phy_disconnect(mac->phy_dev);
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mtk_mdio_cleanup(eth);
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mtk_irq_disable(eth, ~0);
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free_irq(dev->irq, dev);
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free_irq(eth->irq[0], dev);
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free_irq(eth->irq[1], dev);
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free_irq(eth->irq[2], dev);
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}
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static int mtk_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
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@ -1733,10 +1768,10 @@ static int mtk_add_mac(struct mtk_eth *eth, struct device_node *np)
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dev_err(eth->dev, "error bringing up device\n");
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goto free_netdev;
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}
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eth->netdev[id]->irq = eth->irq;
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eth->netdev[id]->irq = eth->irq[0];
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netif_info(eth, probe, eth->netdev[id],
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"mediatek frame engine at 0x%08lx, irq %d\n",
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eth->netdev[id]->base_addr, eth->netdev[id]->irq);
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eth->netdev[id]->base_addr, eth->irq[0]);
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return 0;
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@ -1753,6 +1788,7 @@ static int mtk_probe(struct platform_device *pdev)
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struct mtk_soc_data *soc;
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struct mtk_eth *eth;
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int err;
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int i;
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match = of_match_device(of_mtk_match, &pdev->dev);
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soc = (struct mtk_soc_data *)match->data;
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@ -1788,10 +1824,12 @@ static int mtk_probe(struct platform_device *pdev)
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return PTR_ERR(eth->rstc);
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}
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eth->irq = platform_get_irq(pdev, 0);
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if (eth->irq < 0) {
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dev_err(&pdev->dev, "no IRQ resource found\n");
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return -ENXIO;
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for (i = 0; i < 3; i++) {
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eth->irq[i] = platform_get_irq(pdev, i);
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if (eth->irq[i] < 0) {
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dev_err(&pdev->dev, "no IRQ%d resource found\n", i);
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return -ENXIO;
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}
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}
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eth->clk_ethif = devm_clk_get(&pdev->dev, "ethif");
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@ -1832,7 +1870,9 @@ static int mtk_probe(struct platform_device *pdev)
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* for NAPI to work
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*/
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init_dummy_netdev(ð->dummy_dev);
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netif_napi_add(ð->dummy_dev, ð->rx_napi, mtk_poll,
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netif_napi_add(ð->dummy_dev, ð->tx_napi, mtk_napi_tx,
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MTK_NAPI_WEIGHT);
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netif_napi_add(ð->dummy_dev, ð->rx_napi, mtk_napi_rx,
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MTK_NAPI_WEIGHT);
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platform_set_drvdata(pdev, eth);
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@ -1853,6 +1893,7 @@ static int mtk_remove(struct platform_device *pdev)
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clk_disable_unprepare(eth->clk_gp1);
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clk_disable_unprepare(eth->clk_gp2);
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netif_napi_del(ð->tx_napi);
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netif_napi_del(ð->rx_napi);
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mtk_cleanup(eth);
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platform_set_drvdata(pdev, NULL);
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@ -68,6 +68,10 @@
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/* Unicast Filter MAC Address Register - High */
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#define MTK_GDMA_MAC_ADRH(x) (0x50C + (x * 0x1000))
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/* PDMA Interrupt grouping registers */
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#define MTK_PDMA_INT_GRP1 0xa50
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#define MTK_PDMA_INT_GRP2 0xa54
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/* QDMA TX Queue Configuration Registers */
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#define MTK_QTX_CFG(x) (0x1800 + (x * 0x10))
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#define QDMA_RES_THRES 4
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@ -125,6 +129,11 @@
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#define MTK_TX_DONE_INT (MTK_TX_DONE_INT0 | MTK_TX_DONE_INT1 | \
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MTK_TX_DONE_INT2 | MTK_TX_DONE_INT3)
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/* QDMA Interrupt grouping registers */
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#define MTK_QDMA_INT_GRP1 0x1a20
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#define MTK_QDMA_INT_GRP2 0x1a24
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#define MTK_RLS_DONE_INT BIT(0)
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/* QDMA Interrupt Status Register */
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#define MTK_QDMA_INT_MASK 0x1A1C
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@ -356,7 +365,8 @@ struct mtk_rx_ring {
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* @dma_refcnt: track how many netdevs are using the DMA engine
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* @tx_ring: Pointer to the memore holding info about the TX ring
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* @rx_ring: Pointer to the memore holding info about the RX ring
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* @rx_napi: The NAPI struct
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* @tx_napi: The TX NAPI struct
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* @rx_napi: The RX NAPI struct
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* @scratch_ring: Newer SoCs need memory for a second HW managed TX ring
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* @phy_scratch_ring: physical address of scratch_ring
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* @scratch_head: The scratch memory that scratch_ring points to.
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@ -377,7 +387,7 @@ struct mtk_eth {
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struct net_device dummy_dev;
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struct net_device *netdev[MTK_MAX_DEVS];
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struct mtk_mac *mac[MTK_MAX_DEVS];
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int irq;
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int irq[3];
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u32 msg_enable;
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unsigned long sysclk;
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struct regmap *ethsys;
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@ -385,6 +395,7 @@ struct mtk_eth {
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atomic_t dma_refcnt;
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struct mtk_tx_ring tx_ring;
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struct mtk_rx_ring rx_ring;
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struct napi_struct tx_napi;
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struct napi_struct rx_napi;
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struct mtk_tx_dma *scratch_ring;
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dma_addr_t phy_scratch_ring;
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