forked from Minki/linux
drm: radeon: Replace drm_fb_get_bpp_depth() with drm_format_plane_cpp()
The driver needs the number of bytes per pixel, not the bpp and depth info meant for fbdev compatibility. Use the right API. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Archit Taneja <architt@codeaurora.org> Link: http://patchwork.freedesktop.org/patch/msgid/1476744081-24485-11-git-send-email-laurent.pinchart@ideasonboard.com
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@ -89,13 +89,13 @@ static struct fb_ops radeonfb_ops = {
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};
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int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled)
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int radeon_align_pitch(struct radeon_device *rdev, int width, int cpp, bool tiled)
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{
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int aligned = width;
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int align_large = (ASIC_IS_AVIVO(rdev)) || tiled;
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int pitch_mask = 0;
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switch (bpp / 8) {
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switch (cpp) {
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case 1:
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pitch_mask = align_large ? 255 : 127;
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break;
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@ -110,7 +110,7 @@ int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tile
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aligned += pitch_mask;
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aligned &= ~pitch_mask;
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return aligned;
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return aligned * cpp;
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}
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static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj)
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@ -139,13 +139,13 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
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int ret;
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int aligned_size, size;
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int height = mode_cmd->height;
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u32 bpp, depth;
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u32 cpp;
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drm_fb_get_bpp_depth(mode_cmd->pixel_format, &depth, &bpp);
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cpp = drm_format_plane_cpp(mode_cmd->pixel_format, 0);
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/* need to align pitch with crtc limits */
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mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, bpp,
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fb_tiled) * ((bpp + 1) / 8);
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mode_cmd->pitches[0] = radeon_align_pitch(rdev, mode_cmd->width, cpp,
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fb_tiled);
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if (rdev->family >= CHIP_R600)
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height = ALIGN(mode_cmd->height, 8);
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@ -165,11 +165,11 @@ static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev,
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tiling_flags = RADEON_TILING_MACRO;
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#ifdef __BIG_ENDIAN
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switch (bpp) {
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case 32:
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switch (cpp) {
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case 4:
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tiling_flags |= RADEON_TILING_SWAP_32BIT;
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break;
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case 16:
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case 2:
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tiling_flags |= RADEON_TILING_SWAP_16BIT;
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default:
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break;
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@ -745,7 +745,8 @@ int radeon_mode_dumb_create(struct drm_file *file_priv,
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uint32_t handle;
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int r;
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args->pitch = radeon_align_pitch(rdev, args->width, args->bpp, 0) * ((args->bpp + 1) / 8);
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args->pitch = radeon_align_pitch(rdev, args->width,
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DIV_ROUND_UP(args->bpp, 8), 0);
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args->size = args->pitch * args->height;
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args->size = ALIGN(args->size, PAGE_SIZE);
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