forked from Minki/linux
ARM: dts: am43xx: add support for clkout1 clock
clkout1 clock node and its generation tree was missing. Add this based on the data on TRM and PRCM functional spec. Signed-off-by: Tero Kristo <t-kristo@ti.com> Tested-by: Benoit Parrot <bparrot@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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8010f13a40
@ -771,4 +771,58 @@
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ti,bit-shift = <8>;
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reg = <0x8a68>;
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};
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clkout1_osc_div_ck: clkout1_osc_div_ck {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&sys_clkin_ck>;
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ti,bit-shift = <20>;
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ti,max-div = <4>;
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reg = <0x4100>;
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};
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clkout1_src2_mux_ck: clkout1_src2_mux_ck {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&clk_rc32k_ck>, <&sysclk_div>, <&dpll_ddr_m2_ck>,
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<&dpll_per_m2_ck>, <&dpll_disp_m2_ck>,
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<&dpll_mpu_m2_ck>;
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reg = <0x4100>;
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};
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clkout1_src2_pre_div_ck: clkout1_src2_pre_div_ck {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&clkout1_src2_mux_ck>;
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ti,bit-shift = <4>;
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ti,max-div = <8>;
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reg = <0x4100>;
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};
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clkout1_src2_post_div_ck: clkout1_src2_post_div_ck {
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#clock-cells = <0>;
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compatible = "ti,divider-clock";
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clocks = <&clkout1_src2_pre_div_ck>;
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ti,bit-shift = <8>;
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ti,max-div = <32>;
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ti,index-power-of-two;
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reg = <0x4100>;
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};
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clkout1_mux_ck: clkout1_mux_ck {
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#clock-cells = <0>;
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compatible = "ti,mux-clock";
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clocks = <&clkout1_osc_div_ck>, <&clk_rc32k_ck>,
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<&clkout1_src2_post_div_ck>, <&dpll_extdev_m2_ck>;
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ti,bit-shift = <16>;
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reg = <0x4100>;
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};
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clkout1_ck: clkout1_ck {
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#clock-cells = <0>;
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compatible = "ti,gate-clock";
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clocks = <&clkout1_mux_ck>;
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ti,bit-shift = <23>;
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reg = <0x4100>;
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};
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};
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