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serial: 8250_dw: Add optional reset control support

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The Allwinner A31 and A23 SoCs have a reset controller
maintaining the UART in reset by default.

This patch adds optional reset support to the driver.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Chen-Yu Tsai 2014-07-23 23:33:06 +08:00 committed by Greg Kroah-Hartman
parent 1d6ba284df
commit 7fe090bf48
2 changed files with 10 additions and 0 deletions
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1
Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
View File

@ -15,6 +15,7 @@ The supplying peripheral clock can also be handled, needing a second property
Required elements: "baudclk", "apb_pclk"
Optional properties:
- resets : phandle to the parent reset controller.
- reg-shift : quantity to shift the register offsets by. If this property is
not present then the register offsets are not shifted.
- reg-io-width : the size (in bytes) of the IO accesses that should be

9
drivers/tty/serial/8250/8250_dw.c
View File

@ -26,6 +26,7 @@
#include <linux/slab.h>
#include <linux/acpi.h>
#include <linux/clk.h>
#include <linux/reset.h>
#include <linux/pm_runtime.h>
#include <asm/byteorder.h>
@ -60,6 +61,7 @@ struct dw8250_data {
int line;
struct clk *clk;
struct clk *pclk;
struct reset_control *rst;
struct uart_8250_dma dma;
};
@ -383,6 +385,10 @@ static int dw8250_probe(struct platform_device *pdev)
}
}
data->rst = devm_reset_control_get_optional(&pdev->dev, NULL);
if (!IS_ERR(data->rst))
reset_control_deassert(data->rst);
data->dma.rx_chan_id = -1;
data->dma.tx_chan_id = -1;
data->dma.rx_param = data;
@ -426,6 +432,9 @@ static int dw8250_remove(struct platform_device *pdev)
serial8250_unregister_port(data->line);
if (!IS_ERR(data->rst))
reset_control_assert(data->rst);
if (!IS_ERR(data->pclk))
clk_disable_unprepare(data->pclk);