drm/i915/gvt: Correct the calculation of plane size
stride isn't in unit of pixel, it is bytes, so calculation of
plane size doesn't need to multiple bpp.
Fixes: e546e281d3
("drm/i915/gvt: Dmabuf support for GVT-g")
Signed-off-by: Xiong Zhang <xiong.y.zhang@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
parent
663a50ceac
commit
7f1a93b1f1
@ -238,9 +238,6 @@ static int vgpu_get_plane_info(struct drm_device *dev,
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default:
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default:
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gvt_vgpu_err("invalid tiling mode: %x\n", p.tiled);
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gvt_vgpu_err("invalid tiling mode: %x\n", p.tiled);
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}
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}
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info->size = (((p.stride * p.height * p.bpp) / 8) +
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(PAGE_SIZE - 1)) >> PAGE_SHIFT;
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} else if (plane_id == DRM_PLANE_TYPE_CURSOR) {
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} else if (plane_id == DRM_PLANE_TYPE_CURSOR) {
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ret = intel_vgpu_decode_cursor_plane(vgpu, &c);
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ret = intel_vgpu_decode_cursor_plane(vgpu, &c);
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if (ret)
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if (ret)
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@ -262,14 +259,13 @@ static int vgpu_get_plane_info(struct drm_device *dev,
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info->x_hot = UINT_MAX;
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info->x_hot = UINT_MAX;
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info->y_hot = UINT_MAX;
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info->y_hot = UINT_MAX;
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}
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}
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info->size = (((info->stride * c.height * c.bpp) / 8)
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+ (PAGE_SIZE - 1)) >> PAGE_SHIFT;
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} else {
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} else {
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gvt_vgpu_err("invalid plane id:%d\n", plane_id);
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gvt_vgpu_err("invalid plane id:%d\n", plane_id);
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return -EINVAL;
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return -EINVAL;
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}
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}
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info->size = (info->stride * info->height + PAGE_SIZE - 1)
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>> PAGE_SHIFT;
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if (info->size == 0) {
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if (info->size == 0) {
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gvt_vgpu_err("fb size is zero\n");
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gvt_vgpu_err("fb size is zero\n");
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return -EINVAL;
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return -EINVAL;
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