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clk: qcom: videocc-sdm845: convert to parent data

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Convert the clock driver to specify parent data rather than parent
names, to actually bind using 'clock-names' specified in the DTS rather
than global clock names.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210405224743.590029-14-dmitry.baryshkov@linaro.org
[sboyd@kernel.org: Silence checkpatch block comments]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Dmitry Baryshkov 2021-04-06 01:47:23 +03:00 committed by Stephen Boyd
parent 040184b7d0
commit 7f195c06e3
1 changed files with 29 additions and 27 deletions
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56
drivers/clk/qcom/videocc-sdm845.c
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@ -21,25 +21,9 @@
enum {
P_BI_TCXO,
P_CORE_BI_PLL_TEST_SE,
P_VIDEO_PLL0_OUT_EVEN,
P_VIDEO_PLL0_OUT_MAIN,
P_VIDEO_PLL0_OUT_ODD,
};
static const struct parent_map video_cc_parent_map_0[] = {
{ P_BI_TCXO, 0 },
{ P_VIDEO_PLL0_OUT_MAIN, 1 },
{ P_VIDEO_PLL0_OUT_EVEN, 2 },
{ P_VIDEO_PLL0_OUT_ODD, 3 },
{ P_CORE_BI_PLL_TEST_SE, 4 },
};
static const char * const video_cc_parent_names_0[] = {
"bi_tcxo",
"video_pll0",
"video_pll0_out_even",
"video_pll0_out_odd",
"core_bi_pll_test_se",
/* P_VIDEO_PLL0_OUT_EVEN, */
/* P_VIDEO_PLL0_OUT_ODD, */
};
static const struct alpha_pll_config video_pll0_config = {
@ -53,13 +37,31 @@ static struct clk_alpha_pll video_pll0 = {
.clkr = {
.hw.init = &(struct clk_init_data){
.name = "video_pll0",
.parent_names = (const char *[]){ "bi_tcxo" },
.parent_data = &(const struct clk_parent_data){
.fw_name = "bi_tcxo", .name = "bi_tcxo",
},
.num_parents = 1,
.ops = &clk_alpha_pll_fabia_ops,
},
},
};
static const struct parent_map video_cc_parent_map_0[] = {
{ P_BI_TCXO, 0 },
{ P_VIDEO_PLL0_OUT_MAIN, 1 },
/* { P_VIDEO_PLL0_OUT_EVEN, 2 }, */
/* { P_VIDEO_PLL0_OUT_ODD, 3 }, */
{ P_CORE_BI_PLL_TEST_SE, 4 },
};
static const struct clk_parent_data video_cc_parent_data_0[] = {
{ .fw_name = "bi_tcxo", .name = "bi_tcxo" },
{ .hw = &video_pll0.clkr.hw },
/* { .name = "video_pll0_out_even" }, */
/* { .name = "video_pll0_out_odd" }, */
{ .fw_name = "core_bi_pll_test_se", .name = "core_bi_pll_test_se" },
};
static const struct freq_tbl ftbl_video_cc_venus_clk_src[] = {
F(100000000, P_VIDEO_PLL0_OUT_MAIN, 4, 0, 0),
F(200000000, P_VIDEO_PLL0_OUT_MAIN, 2, 0, 0),
@ -78,8 +80,8 @@ static struct clk_rcg2 video_cc_venus_clk_src = {
.freq_tbl = ftbl_video_cc_venus_clk_src,
.clkr.hw.init = &(struct clk_init_data){
.name = "video_cc_venus_clk_src",
.parent_names = video_cc_parent_names_0,
.num_parents = 5,
.parent_data = video_cc_parent_data_0,
.num_parents = ARRAY_SIZE(video_cc_parent_data_0),
.flags = CLK_SET_RATE_PARENT,
.ops = &clk_rcg2_shared_ops,
},
@ -158,8 +160,8 @@ static struct clk_branch video_cc_vcodec0_core_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_vcodec0_core_clk",
.parent_names = (const char *[]){
"video_cc_venus_clk_src",
.parent_hws = (const struct clk_hw*[]){
&video_cc_venus_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -189,8 +191,8 @@ static struct clk_branch video_cc_vcodec1_core_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_vcodec1_core_clk",
.parent_names = (const char *[]){
"video_cc_venus_clk_src",
.parent_hws = (const struct clk_hw*[]){
&video_cc_venus_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@ -233,8 +235,8 @@ static struct clk_branch video_cc_venus_ctl_core_clk = {
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "video_cc_venus_ctl_core_clk",
.parent_names = (const char *[]){
"video_cc_venus_clk_src",
.parent_hws = (const struct clk_hw*[]){
&video_cc_venus_clk_src.clkr.hw,
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,