forked from Minki/linux
KVM: x86: flush TLB when D bit is manually changed.
When software changes D bit (either from 1 to 0, or 0 to 1), the corresponding TLB entity in the hardware won't be updated immediately. We should flush it to guarantee the consistence of D bit between TLB and MMU page table in memory. This is especially important when clearing the D bit, since it may cause false negatives in reporting dirtiness. Sanity test was done on my machine with Intel processor. Signed-off-by: Kai Huang <kai.huang@linux.intel.com> [Check A bit too. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -532,6 +532,11 @@ static bool spte_is_bit_cleared(u64 old_spte, u64 new_spte, u64 bit_mask)
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return (old_spte & bit_mask) && !(new_spte & bit_mask);
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}
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static bool spte_is_bit_changed(u64 old_spte, u64 new_spte, u64 bit_mask)
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{
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return (old_spte & bit_mask) != (new_spte & bit_mask);
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}
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/* Rules for using mmu_spte_set:
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* Set the sptep from nonpresent to present.
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* Note: the sptep being assigned *must* be either not present
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@ -582,6 +587,14 @@ static bool mmu_spte_update(u64 *sptep, u64 new_spte)
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if (!shadow_accessed_mask)
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return ret;
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/*
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* Flush TLB when accessed/dirty bits are changed in the page tables,
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* to guarantee consistency between TLB and page tables.
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*/
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if (spte_is_bit_changed(old_spte, new_spte,
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shadow_accessed_mask | shadow_dirty_mask))
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ret = true;
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if (spte_is_bit_cleared(old_spte, new_spte, shadow_accessed_mask))
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kvm_set_pfn_accessed(spte_to_pfn(old_spte));
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if (spte_is_bit_cleared(old_spte, new_spte, shadow_dirty_mask))
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