MIPS: Fix CPS SMP NS16550 UART defaults

The MIPS_CPS_NS16550_BASE and MIPS_CPS_NS16550_SHIFT options have no
defaults for non-Malta platforms which select SYS_SUPPORTS_MIPS_CPS
(i.e. the pistachio and generic platforms). This is problematic for
automated allyesconfig and allmodconfig builds based on these platforms,
since make silentoldconfig tries to ask the user for values, and
especially since v4.15 where the default platform was switched to
generic.

Default these options to 0 and arrange for MIPS_CPS_NS16550 to be no
when using that default base address, so that the option only has an
effect when the default is provided (i.e. Malta) or when a value is
provided by the user.

Fixes: 609cf6f229 ("MIPS: CPS: Early debug using an ns16550-compatible UART")
Signed-off-by: James Hogan <jhogan@kernel.org>
Reviewed-by: Paul Burton <paul.burton@mips.com>
Tested-by: Guenter Roeck <linux@roeck-us.net>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/17749/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
James Hogan 2017-11-21 00:02:40 +00:00 committed by Ralf Baechle
parent dfe004951b
commit 7e5e371ee5

View File

@ -124,30 +124,36 @@ config SCACHE_DEBUGFS
If unsure, say N.
menuconfig MIPS_CPS_NS16550
menuconfig MIPS_CPS_NS16550_BOOL
bool "CPS SMP NS16550 UART output"
depends on MIPS_CPS
help
Output debug information via an ns16550 compatible UART if exceptions
occur early in the boot process of a secondary core.
if MIPS_CPS_NS16550
if MIPS_CPS_NS16550_BOOL
config MIPS_CPS_NS16550
def_bool MIPS_CPS_NS16550_BASE != 0
config MIPS_CPS_NS16550_BASE
hex "UART Base Address"
default 0x1b0003f8 if MIPS_MALTA
default 0
help
The base address of the ns16550 compatible UART on which to output
debug information from the early stages of core startup.
This is only used if non-zero.
config MIPS_CPS_NS16550_SHIFT
int "UART Register Shift"
default 0 if MIPS_MALTA
default 0
help
The number of bits to shift ns16550 register indices by in order to
form their addresses. That is, log base 2 of the span between
adjacent ns16550 registers in the system.
endif # MIPS_CPS_NS16550
endif # MIPS_CPS_NS16550_BOOL
endmenu