leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mvebu arm for 5.20 (part 1)

Browse Source 
Update PCIe fixup for old Marvell SoCs: dove, orion5 and mv78xx0.
 -----BEGIN PGP SIGNATURE-----
 
 iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYtampAAKCRALBhiOFHI7
 1ePVAKCePd8A44Ao3SfCx7DA5WGPH1jUUACgg+j+og9NUsUc2/UJevDvuzp57gM=
 =ckgD
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLWrD4ACgkQmmx57+YA
 GNmuKQ//dl2wF89KQj4yYJOxS5cbhAe+Cmz6kVAagD6entOtytsY8xZPs2ucJTLO
 f8HXtTi0le7+zbBMCU/JKi8W07Y99RP0SmWCBNU0NGfq6tUTv80mxI4LtFrBPI1V
 e4i9Jnur3E2YKa2kTgLvsGUlNslvUSUENiirjdosbkX7B/UKQheMhS/BMjTIQz+J
 CAZKrJ5U5UeIj/qzlk/7hcVltM3UeSQFh9luyjzRgY6SlnVfIStP28DLK1PzPl1c
 OJd4xPZY6w5iWw5uElfmskgrVPi7DHCJjtUhspIaTP+P5UCqBcEu2ujpn6xz9y33
 Oh4/TdMRhms2m1vbskAtDmLqINcs4A1h37MBvdZ6fPz899ckXPzxbKbq8pDFdpv9
 GGyPHd2h4Ccq1gTyyAyTrPCEkRh5YuoXMJkhe93swxXZ7bqV5l+i5ZNNqrGqU+0+
 jAWu3vWV4a0nfCT516LqefNF2XTh55tDhw55gFb5lmUuPwnDyW7882WCYIQxKTzP
 0us9LxV2WqiwBwl+o3p71g+JHMVrzl7JSJ3fp8yaAkS/RyUuXd09CEzaOhsQyIqB
 cndydWIx2vaO7HxW5V2dYmgjxqo+2/BunYztqZLTLn9pRSLoEcZA9TWmZsVDrnBC
 U/isR/vtgyghwwx6pf/KWOwtmULV/73NCz/jduGSfGyiMJ2QKck=
 =8w4a
 -----END PGP SIGNATURE-----

Merge tag 'mvebu-arm-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/soc

mvebu arm for 5.20 (part 1)

Update PCIe fixup for old Marvell SoCs: dove, orion5 and mv78xx0.

* tag 'mvebu-arm-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: Marvell: Update PCIe fixup

Link: https://lore.kernel.org/r/87ilntqn0v.fsf@BL-laptop
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2022-07-19 15:06:05 +02:00
commit 7e0b0cc16b
5 changed files with 27 additions and 9 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/mach-dove/Kconfig
View File

@ -8,6 +8,7 @@ menuconfig ARCH_DOVE
select PINCTRL_DOVE
select PLAT_ORION_LEGACY
select PM_GENERIC_DOMAINS if PM
select PCI_QUIRKS if PCI
help
Support for the Marvell Dove SoC 88AP510

11
arch/arm/mach-dove/pcie.c
View File

@ -136,14 +136,19 @@ static struct pci_ops pcie_ops = {
.write = pcie_wr_conf,
};
/*
* The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
* is operating as a root complex this needs to be switched to
* PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
* the device. Decoding setup is handled by the orion code.
*/
static void rc_pci_fixup(struct pci_dev *dev)
{
/*
* Prevent enumeration of root complex.
*/
if (dev->bus->parent == NULL && dev->devfn == 0) {
int i;
dev->class &= 0xff;
dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
dev->resource[i].start = 0;
dev->resource[i].end = 0;

11
arch/arm/mach-mv78xx0/pcie.c
View File

@ -180,14 +180,19 @@ static struct pci_ops pcie_ops = {
.write = pcie_wr_conf,
};
/*
* The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
* is operating as a root complex this needs to be switched to
* PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
* the device. Decoding setup is handled by the orion code.
*/
static void rc_pci_fixup(struct pci_dev *dev)
{
/*
* Prevent enumeration of root complex.
*/
if (dev->bus->parent == NULL && dev->devfn == 0) {
int i;
dev->class &= 0xff;
dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
dev->resource[i].start = 0;
dev->resource[i].end = 0;

1
arch/arm/mach-orion5x/Kconfig
View File

@ -7,6 +7,7 @@ menuconfig ARCH_ORION5X
select GPIOLIB
select MVEBU_MBUS
select FORCE_PCI
select PCI_QUIRKS
select PHYLIB if NETDEVICES
select PLAT_ORION_LEGACY
help

12
arch/arm/mach-orion5x/pci.c
View File

@ -515,14 +515,20 @@ static int __init pci_setup(struct pci_sys_data *sys)
/*****************************************************************************
* General PCIe + PCI
****************************************************************************/
/*
* The root complex has a hardwired class of PCI_CLASS_MEMORY_OTHER, when it
* is operating as a root complex this needs to be switched to
* PCI_CLASS_BRIDGE_HOST or Linux will errantly try to process the BAR's on
* the device. Decoding setup is handled by the orion code.
*/
static void rc_pci_fixup(struct pci_dev *dev)
{
/*
* Prevent enumeration of root complex.
*/
if (dev->bus->parent == NULL && dev->devfn == 0) {
int i;
dev->class &= 0xff;
dev->class |= PCI_CLASS_BRIDGE_HOST << 8;
for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
dev->resource[i].start = 0;
dev->resource[i].end = 0;