Revert "firmware: qcom: scm: Add support for MC boot address API"
This reverts commits55845f46df
andc50031f03d
, since this still causes a build failure when QCOM_SCM is a loadable module, or when CONFIG_SMP is disabled: ERROR: modpost: "cpu_logical_map" [drivers/firmware/qcom-scm.ko] undefined! This be done better for 5.17, but it's too late now to rework properly. Fixes:c50031f03d
("firmware: qcom: scm: Don't break compile test on non-ARM platforms") Fixes:55845f46df
("firmware: qcom: scm: Add support for MC boot address API") Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
parent
4f22aa4569
commit
7db2bc925e
@ -17,10 +17,6 @@
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#include <linux/reset-controller.h>
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#include <linux/reset-controller.h>
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#include <linux/arm-smccc.h>
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#include <linux/arm-smccc.h>
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#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
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#include <asm/smp_plat.h>
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#endif
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#include "qcom_scm.h"
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#include "qcom_scm.h"
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static bool download_mode = IS_ENABLED(CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT);
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static bool download_mode = IS_ENABLED(CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT);
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@ -264,44 +260,15 @@ static bool __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
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return ret ? false : !!res.result[0];
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return ret ? false : !!res.result[0];
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}
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}
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#if defined(CONFIG_ARM) || defined(CONFIG_ARM64)
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/**
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static int __qcom_scm_set_boot_addr_mc(void *entry, const cpumask_t *cpus,
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* qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
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unsigned int flags)
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* @entry: Entry point function for the cpus
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{
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* @cpus: The cpumask of cpus that will use the entry point
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struct qcom_scm_desc desc = {
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*
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.svc = QCOM_SCM_SVC_BOOT,
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* Set the Linux entry point for the SCM to transfer control to when coming
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.cmd = QCOM_SCM_BOOT_SET_ADDR_MC,
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* out of a power down. CPU power down may be executed on cpuidle or hotplug.
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.owner = ARM_SMCCC_OWNER_SIP,
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*/
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.arginfo = QCOM_SCM_ARGS(6),
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int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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};
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unsigned int cpu;
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u64 map;
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/* Need a device for DMA of the additional arguments */
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if (!__scm || __get_convention() == SMC_CONVENTION_LEGACY)
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return -EOPNOTSUPP;
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desc.args[0] = virt_to_phys(entry);
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for_each_cpu(cpu, cpus) {
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map = cpu_logical_map(cpu);
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desc.args[1] |= BIT(MPIDR_AFFINITY_LEVEL(map, 0));
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desc.args[2] |= BIT(MPIDR_AFFINITY_LEVEL(map, 1));
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desc.args[3] |= BIT(MPIDR_AFFINITY_LEVEL(map, 2));
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}
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desc.args[4] = ~0ULL; /* Reserved for affinity level 3 */
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desc.args[5] = flags;
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return qcom_scm_call(__scm->dev, &desc, NULL);
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}
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#else
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static inline int __qcom_scm_set_boot_addr_mc(void *entry, const cpumask_t *cpus,
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unsigned int flags)
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{
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return -EINVAL;
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}
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#endif
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static int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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{
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{
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int ret;
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int ret;
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int flags = 0;
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int flags = 0;
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@ -337,28 +304,17 @@ static int __qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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return ret;
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return ret;
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}
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}
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EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
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/**
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/**
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* qcom_scm_set_warm_boot_addr() - Set the warm boot address for cpus
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* qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
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* @entry: Entry point function for the cpus
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* @entry: Entry point function for the cpus
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* @cpus: The cpumask of cpus that will use the entry point
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* @cpus: The cpumask of cpus that will use the entry point
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*
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*
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* Set the Linux entry point for the SCM to transfer control to when coming
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* Set the cold boot address of the cpus. Any cpu outside the supported
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* out of a power down. CPU power down may be executed on cpuidle or hotplug.
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* range would be removed from the cpu present mask.
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*/
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*/
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int qcom_scm_set_warm_boot_addr(void *entry, const cpumask_t *cpus)
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int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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{
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if (!cpus || cpumask_empty(cpus))
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return -EINVAL;
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if (__qcom_scm_set_boot_addr_mc(entry, cpus, QCOM_SCM_BOOT_MC_FLAG_WARMBOOT))
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/* Fallback to old SCM call */
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return __qcom_scm_set_warm_boot_addr(entry, cpus);
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return 0;
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}
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EXPORT_SYMBOL(qcom_scm_set_warm_boot_addr);
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static int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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{
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{
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int flags = 0;
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int flags = 0;
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int cpu;
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int cpu;
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@ -375,6 +331,9 @@ static int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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.owner = ARM_SMCCC_OWNER_SIP,
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.owner = ARM_SMCCC_OWNER_SIP,
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};
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};
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if (!cpus || cpumask_empty(cpus))
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return -EINVAL;
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for_each_cpu(cpu, cpus) {
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for_each_cpu(cpu, cpus) {
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if (cpu < ARRAY_SIZE(scm_cb_flags))
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if (cpu < ARRAY_SIZE(scm_cb_flags))
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flags |= scm_cb_flags[cpu];
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flags |= scm_cb_flags[cpu];
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@ -387,25 +346,6 @@ static int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL);
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return qcom_scm_call_atomic(__scm ? __scm->dev : NULL, &desc, NULL);
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}
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}
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/**
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* qcom_scm_set_cold_boot_addr() - Set the cold boot address for cpus
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* @entry: Entry point function for the cpus
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* @cpus: The cpumask of cpus that will use the entry point
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*
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* Set the cold boot address of the cpus. Any cpu outside the supported
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* range would be removed from the cpu present mask.
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*/
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int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
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{
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if (!cpus || cpumask_empty(cpus))
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return -EINVAL;
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if (__qcom_scm_set_boot_addr_mc(entry, cpus, QCOM_SCM_BOOT_MC_FLAG_COLDBOOT))
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/* Fallback to old SCM call */
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return __qcom_scm_set_cold_boot_addr(entry, cpus);
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return 0;
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}
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EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
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EXPORT_SYMBOL(qcom_scm_set_cold_boot_addr);
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/**
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/**
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@ -78,12 +78,8 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
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#define QCOM_SCM_BOOT_SET_ADDR 0x01
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#define QCOM_SCM_BOOT_SET_ADDR 0x01
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#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
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#define QCOM_SCM_BOOT_TERMINATE_PC 0x02
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#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
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#define QCOM_SCM_BOOT_SET_DLOAD_MODE 0x10
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#define QCOM_SCM_BOOT_SET_ADDR_MC 0x11
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#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
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#define QCOM_SCM_BOOT_SET_REMOTE_STATE 0x0a
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#define QCOM_SCM_FLUSH_FLAG_MASK 0x3
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#define QCOM_SCM_FLUSH_FLAG_MASK 0x3
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#define QCOM_SCM_BOOT_MC_FLAG_AARCH64 BIT(0)
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#define QCOM_SCM_BOOT_MC_FLAG_COLDBOOT BIT(1)
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#define QCOM_SCM_BOOT_MC_FLAG_WARMBOOT BIT(2)
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#define QCOM_SCM_SVC_PIL 0x02
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#define QCOM_SCM_SVC_PIL 0x02
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#define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01
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#define QCOM_SCM_PIL_PAS_INIT_IMAGE 0x01
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