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arm64: dts: qcom: Add sc7180-trogdor-coachz skus

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This is a trogdor variant.  This is mostly a grab from the downstream
tree with notable exceptions:
- I skip -rev0.  This was a super early build and there's no advantage
  of long term support.
- I remove sound node since sound hasn't landed upstream yet.

Cc: Gwendal Grignou <gwendal@chromium.org>
Cc: Matthias Kaehlcke <mka@chromium.org>
Cc: Stephen Boyd <swboyd@chromium.org>
Cc: Tzung-Bi Shih <tzungbi@chromium.org>
Cc: Judy Hsiao <judyhsiao@chromium.org>
Signed-off-by: Douglas Anderson <dianders@chromium.org>
Reviewed-by: Matthias Kaehlcke <mka@chromium.org>
Reviewed-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/20210301133318.v2.13.I3d1f5f8a3bf31e8014229df0d4cfdff20e9cc90f@changeid
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
This commit is contained in:
Douglas Anderson 2021-03-01 13:34:37 -08:00 committed by Bjorn Andersson
parent 082607825a
commit 7d47b2cb1a
6 changed files with 449 additions and 0 deletions
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4
arch/arm64/boot/dts/qcom/Makefile
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@ -31,6 +31,10 @@ dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb
dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r2.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r2-lte.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r0.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1.dtb
dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-lazor-r1-kb.dtb

18
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1-lte.dts Normal file
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@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-coachz-r1.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google CoachZ (rev1) with LTE";
compatible = "google,coachz-rev1-sku0", "qcom,sc7180";
};
&cros_ec_proximity {
label = "proximity-wifi-lte";
};

154
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r1.dts Normal file
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@ -0,0 +1,154 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-coachz.dtsi"
/ {
model = "Google CoachZ (rev1)";
compatible = "google,coachz-rev1", "qcom,sc7180";
};
&tlmm {
gpio-line-names = "HUB_RST_L",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"FP_TO_AP_IRQ_L",
"AP_RAM_ID2",
"UF_CAM_EN",
"WF_CAM_EN",
"TS_RESET_L",
"TS_INT_L",
"FPMCU_BOOT0",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"UF_CAM_MCLK",
"WF_CAM_CLK",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"UF_CAM_SDA",
"UF_CAM_SCL",
"WF_CAM_SDA",
"WF_CAM_SCL",
"WLC_IRQ",
"FP_RST_L",
"AMP_EN",
"WLC_NRST",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"",
"WF_CAM_RST_L",
"UF_CAM_RST_L",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"",
"",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"EN_PP3300_DX_EDP",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"",
"AP_SPI_CS0_L",
"SD_CD_ODL",
"",
"",
"",
"",
"FPMCU_SEL",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT_L",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"DMIC_CLK_EN",
"HUB_EN",
"",
"AP_SPI_FP_MISO",
"AP_SPI_FP_MOSI",
"AP_SPI_FP_CLK",
"AP_SPI_FP_CS_L",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
dmic_clk_en: dmic_clk_en {
pinmux {
pins = "gpio83";
function = "gpio";
};
pinconf {
pins = "gpio83";
drive-strength = <8>;
bias-pull-up;
};
};
};

18
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r2-lte.dts Normal file
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@ -0,0 +1,18 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180-trogdor-coachz-r2.dts"
#include "sc7180-trogdor-lte-sku.dtsi"
/ {
model = "Google CoachZ (rev2+) with LTE";
compatible = "google,coachz-sku0", "qcom,sc7180";
};
&cros_ec_proximity {
label = "proximity-wifi-lte";
};

15
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz-r2.dts Normal file
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@ -0,0 +1,15 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
/dts-v1/;
#include "sc7180-trogdor-coachz.dtsi"
/ {
model = "Google CoachZ (rev2+)";
compatible = "google,coachz", "qcom,sc7180";
};

240
arch/arm64/boot/dts/qcom/sc7180-trogdor-coachz.dtsi Normal file
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@ -0,0 +1,240 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google CoachZ board device tree source
*
* Copyright 2020 Google LLC.
*/
#include "sc7180.dtsi"
ap_ec_spi: &spi6 {};
ap_h1_spi: &spi0 {};
#include "sc7180-trogdor.dtsi"
/* Deleted nodes from trogdor.dtsi */
/delete-node/ &alc5682;
/delete-node/ &pp3300_codec;
/ {
/* BOARD-SPECIFIC TOP LEVEL NODES */
adau7002: audio-codec-1 {
compatible = "adi,adau7002";
IOVDD-supply = <&pp1800_l15a>;
#sound-dai-cells = <0>;
};
};
&ap_spi_fp {
status = "okay";
};
&backlight {
pwms = <&cros_ec_pwm 0>;
};
&camcc {
status = "okay";
};
&cros_ec {
cros_ec_proximity: proximity {
compatible = "google,cros-ec-mkbp-proximity";
label = "proximity-wifi";
};
};
ap_ts_pen_1v8: &i2c4 {
status = "okay";
clock-frequency = <400000>;
ap_ts: touchscreen@5d {
compatible = "goodix,gt7375p";
reg = <0x5d>;
pinctrl-names = "default";
pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
interrupt-parent = <&tlmm>;
interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>;
vdd-supply = <&pp3300_ts>;
};
};
&i2c7 {
status = "disabled";
};
&i2c9 {
status = "disabled";
};
&panel {
compatible = "boe,nv110wtm-n61";
};
&pp3300_dx_edp {
gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>;
};
&sdhc_2 {
status = "okay";
};
&sn65dsi86_out {
data-lanes = <0 1 2 3>;
};
/* PINCTRL - modifications to sc7180-trogdor.dtsi */
&en_pp3300_dx_edp {
pinmux {
pins = "gpio67";
};
pinconf {
pins = "gpio67";
};
};
&ts_reset_l {
pinconf {
/*
* We want reset state by default and it will be up to the
* driver to disable this when it's ready.
*/
output-low;
};
};
/* PINCTRL - board-specific pinctrl */
&tlmm {
gpio-line-names = "HUB_RST_L",
"AP_RAM_ID0",
"AP_SKU_ID2",
"AP_RAM_ID1",
"FP_TO_AP_IRQ_L",
"AP_RAM_ID2",
"UF_CAM_EN",
"WF_CAM_EN",
"TS_RESET_L",
"TS_INT_L",
"FPMCU_BOOT0",
"EDP_BRIJ_IRQ",
"AP_EDP_BKLTEN",
"UF_CAM_MCLK",
"WF_CAM_CLK",
"EDP_BRIJ_I2C_SDA",
"EDP_BRIJ_I2C_SCL",
"UF_CAM_SDA",
"UF_CAM_SCL",
"WF_CAM_SDA",
"WF_CAM_SCL",
"WLC_IRQ",
"FP_RST_L",
"AMP_EN",
"WLC_NRST",
"AP_SAR_SENSOR_SDA",
"AP_SAR_SENSOR_SCL",
"",
"",
"WF_CAM_RST_L",
"UF_CAM_RST_L",
"AP_BRD_ID2",
"BRIJ_SUSPEND",
"AP_BRD_ID0",
"AP_H1_SPI_MISO",
"AP_H1_SPI_MOSI",
"AP_H1_SPI_CLK",
"AP_H1_SPI_CS_L",
"",
"",
"",
"",
"H1_AP_INT_ODL",
"",
"UART_AP_TX_DBG_RX",
"UART_DBG_TX_AP_RX",
"",
"",
"FORCED_USB_BOOT",
"AMP_BCLK",
"AMP_LRCLK",
"AMP_DIN",
"",
"HP_BCLK",
"HP_LRCLK",
"HP_DOUT",
"HP_DIN",
"HP_MCLK",
"AP_SKU_ID0",
"AP_EC_SPI_MISO",
"AP_EC_SPI_MOSI",
"AP_EC_SPI_CLK",
"AP_EC_SPI_CS_L",
"AP_SPI_CLK",
"AP_SPI_MOSI",
"AP_SPI_MISO",
/*
* AP_FLASH_WP_L is crossystem ABI. Schematics
* call it BIOS_FLASH_WP_L.
*/
"AP_FLASH_WP_L",
"EN_PP3300_DX_EDP",
"AP_SPI_CS0_L",
"SD_CD_ODL",
"",
"",
"",
"",
"EN_FP_RAILS",
"UIM2_DATA",
"UIM2_CLK",
"UIM2_RST",
"UIM2_PRESENT_L",
"UIM1_DATA",
"UIM1_CLK",
"UIM1_RST",
"",
"",
"HUB_EN",
"",
"AP_SPI_FP_MISO",
"AP_SPI_FP_MOSI",
"AP_SPI_FP_CLK",
"AP_SPI_FP_CS_L",
"AP_SKU_ID1",
"AP_RST_REQ",
"",
"AP_BRD_ID1",
"AP_EC_INT_L",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"EDP_BRIJ_EN",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"",
"AP_TS_PEN_I2C_SDA",
"AP_TS_PEN_I2C_SCL",
"DP_HOT_PLUG_DET",
"EC_IN_RW_ODL";
};