forked from Minki/linux
mtd: nand_ids: minor clean-ups
Clean-up the code a little bit: * clean-up commentaries. * move macro definitions to the top of the file. Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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@ -10,21 +10,21 @@
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*/
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#include <linux/module.h>
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#include <linux/mtd/nand.h>
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/*
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* Chip ID list
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*
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* Name. ID code, pagesize, chipsize in MegaByte, eraseblock size,
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* options
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*
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* Pagesize; 0, 256, 512
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* 0 get this information from the extended chip ID
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+ 256 256 Byte page size
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* 512 512 Byte page size
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*/
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struct nand_flash_dev nand_flash_ids[] = {
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#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
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#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
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#define SP_OPTIONS NAND_NEED_READRDY
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#define SP_OPTIONS16 (SP_OPTIONS | NAND_BUSWIDTH_16)
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/*
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* The chip ID list:
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* name, device ID, page size, chip size in MiB, eraseblock size, options
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*
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* If page size and eraseblock size are 0, the sizes are taken from the
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* extended chip ID.
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*/
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struct nand_flash_dev nand_flash_ids[] = {
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#ifdef CONFIG_MTD_NAND_MUSEUM_IDS
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{"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, SP_OPTIONS},
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{"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, SP_OPTIONS},
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@ -69,11 +69,9 @@ struct nand_flash_dev nand_flash_ids[] = {
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{"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, SP_OPTIONS},
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/*
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* These are the new chips with large page size. The pagesize and the
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* erasesize is determined from the extended id bytes
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* These are the new chips with large page size. Their page size and
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* eraseblock size are determined from the extended ID bytes.
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*/
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#define LP_OPTIONS NAND_SAMSUNG_LP_OPTIONS
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#define LP_OPTIONS16 (LP_OPTIONS | NAND_BUSWIDTH_16)
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/* 512 Megabit */
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{"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS},
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@ -164,9 +162,7 @@ struct nand_flash_dev nand_flash_ids[] = {
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{NULL,}
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};
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/*
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* Manufacturer ID list
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*/
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/* Manufacturer IDs */
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struct nand_manufacturers nand_manuf_ids[] = {
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{NAND_MFR_TOSHIBA, "Toshiba"},
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{NAND_MFR_SAMSUNG, "Samsung"},
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