drm/msm: a5xx: Make preemption reset case reentrant
nr_rings is reset to 1, but when this function is called for a second
(and third!) time nr_rings > 1 is false, thus the else case is entered
to set up a buffer for the RPTR shadow and consequently written to
RB_RPTR_ADDR, hanging platforms without WHERE_AM_I firmware support.
Restructure the condition in such a way that shadow buffer setup only
ever happens when has_whereami is true; otherwise preemption is only
finalized when the number of ring buffers has not been reset to 1 yet.
Fixes: 8907afb476
("drm/msm: Allow a5xx to mark the RPTR shadow as privileged")
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Tested-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
parent
05ae91d960
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@ -755,12 +755,8 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
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gpu_write(gpu, REG_A5XX_CP_RB_CNTL,
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MSM_GPU_RB_CNTL_DEFAULT | AXXX_CP_RB_CNTL_NO_UPDATE);
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/* Disable preemption if WHERE_AM_I isn't available */
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if (!a5xx_gpu->has_whereami && gpu->nr_rings > 1) {
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a5xx_preempt_fini(gpu);
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gpu->nr_rings = 1;
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} else {
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/* Create a privileged buffer for the RPTR shadow */
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/* Create a privileged buffer for the RPTR shadow */
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if (a5xx_gpu->has_whereami) {
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if (!a5xx_gpu->shadow_bo) {
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a5xx_gpu->shadow = msm_gem_kernel_new(gpu->dev,
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sizeof(u32) * gpu->nr_rings,
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@ -774,6 +770,10 @@ static int a5xx_hw_init(struct msm_gpu *gpu)
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gpu_write64(gpu, REG_A5XX_CP_RB_RPTR_ADDR,
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REG_A5XX_CP_RB_RPTR_ADDR_HI, shadowptr(a5xx_gpu, gpu->rb[0]));
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} else if (gpu->nr_rings > 1) {
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/* Disable preemption if WHERE_AM_I isn't available */
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a5xx_preempt_fini(gpu);
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gpu->nr_rings = 1;
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}
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a5xx_preempt_hw_init(gpu);
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