drm/amdgpu: change registers in error checking for smu 13.0.5
smu 13.0.5 use new registers for smu msg and param. Signed-off-by: Yifan Zhang <yifan1.zhang@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -160,11 +160,17 @@ static void __smu_cmn_reg_print_error(struct smu_context *smu,
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{
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struct amdgpu_device *adev = smu->adev;
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const char *message = smu_get_message_name(smu, msg);
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u32 msg_idx, prm;
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switch (reg_c2pmsg_90) {
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case SMU_RESP_NONE: {
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u32 msg_idx = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66);
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u32 prm = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);
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if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 5)) {
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msg_idx = RREG32_SOC15(MP1, 0, mmMP1_C2PMSG_2);
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prm = RREG32_SOC15(MP1, 0, mmMP1_C2PMSG_34);
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} else {
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msg_idx = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_66);
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prm = RREG32_SOC15(MP1, 0, mmMP1_SMN_C2PMSG_82);
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}
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dev_err_ratelimited(adev->dev,
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"SMU: I'm not done with your previous command: SMN_C2PMSG_66:0x%08X SMN_C2PMSG_82:0x%08X",
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msg_idx, prm);
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