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powerpc/fsl_booke: protect the access to MAS7

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The e500v1 doesn't implement the MAS7, so we should avoid to access
this register on that implementations. In the current kernel, the
access to MAS7 are protected by either CONFIG_PHYS_64BIT or
MMU_FTR_BIG_PHYS. Since some code are executed before the code
patching, we have to use CONFIG_PHYS_64BIT in these cases.

Signed-off-by: Kevin Hao <haokexin@gmail.com>
Signed-off-by: Scott Wood <scottwood@freescale.com>
This commit is contained in:
Kevin Hao 2013-12-24 15:12:03 +08:00 committed by Scott Wood
parent d2dc13b533
commit 7c732cba3d
2 changed files with 4 additions and 1 deletions
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2
arch/powerpc/kernel/head_fsl_booke.S
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@ -82,7 +82,9 @@ _ENTRY(_start);
and r19,r3,r18 /* r19 = page offset */
andc r31,r20,r18 /* r31 = page base */
or r31,r31,r19 /* r31 = devtree phys addr */
#ifdef CONFIG_PHYS_64BIT
mfspr r30,SPRN_MAS7
#endif
li r25,0 /* phys kernel start (low) */
li r24,0 /* CPU number */

3
arch/powerpc/mm/hugetlbpage-book3e.c
View File

@ -103,7 +103,8 @@ void book3e_hugetlb_preload(struct vm_area_struct *vma, unsigned long ea,
if (mmu_has_feature(MMU_FTR_USE_PAIRED_MAS)) {
mtspr(SPRN_MAS7_MAS3, mas7_3);
} else {
mtspr(SPRN_MAS7, upper_32_bits(mas7_3));
if (mmu_has_feature(MMU_FTR_BIG_PHYS))
mtspr(SPRN_MAS7, upper_32_bits(mas7_3));
mtspr(SPRN_MAS3, lower_32_bits(mas7_3));
}