forked from Minki/linux
mx3x: Fixup USB base addresses
The i.MX31 and the i.MX35 have different USB base addresses. Adjust the resources accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
parent
337316986f
commit
7bc07ebc7d
@ -366,8 +366,8 @@ struct platform_device mx3_camera = {
|
|||||||
|
|
||||||
static struct resource otg_resources[] = {
|
static struct resource otg_resources[] = {
|
||||||
{
|
{
|
||||||
.start = OTG_BASE_ADDR,
|
.start = MX31_OTG_BASE_ADDR,
|
||||||
.end = OTG_BASE_ADDR + 0x1ff,
|
.end = MX31_OTG_BASE_ADDR + 0x1ff,
|
||||||
.flags = IORESOURCE_MEM,
|
.flags = IORESOURCE_MEM,
|
||||||
}, {
|
}, {
|
||||||
.start = MXC_INT_USB3,
|
.start = MXC_INT_USB3,
|
||||||
@ -408,8 +408,8 @@ static u64 usbh1_dmamask = ~(u32)0;
|
|||||||
|
|
||||||
static struct resource mxc_usbh1_resources[] = {
|
static struct resource mxc_usbh1_resources[] = {
|
||||||
{
|
{
|
||||||
.start = OTG_BASE_ADDR + 0x200,
|
.start = MX31_OTG_BASE_ADDR + 0x200,
|
||||||
.end = OTG_BASE_ADDR + 0x3ff,
|
.end = MX31_OTG_BASE_ADDR + 0x3ff,
|
||||||
.flags = IORESOURCE_MEM,
|
.flags = IORESOURCE_MEM,
|
||||||
}, {
|
}, {
|
||||||
.start = MXC_INT_USB1,
|
.start = MXC_INT_USB1,
|
||||||
@ -434,8 +434,8 @@ static u64 usbh2_dmamask = ~(u32)0;
|
|||||||
|
|
||||||
static struct resource mxc_usbh2_resources[] = {
|
static struct resource mxc_usbh2_resources[] = {
|
||||||
{
|
{
|
||||||
.start = OTG_BASE_ADDR + 0x400,
|
.start = MX31_OTG_BASE_ADDR + 0x400,
|
||||||
.end = OTG_BASE_ADDR + 0x5ff,
|
.end = MX31_OTG_BASE_ADDR + 0x5ff,
|
||||||
.flags = IORESOURCE_MEM,
|
.flags = IORESOURCE_MEM,
|
||||||
}, {
|
}, {
|
||||||
.start = MXC_INT_USB2,
|
.start = MXC_INT_USB2,
|
||||||
@ -547,6 +547,14 @@ static int mx3_devices_init(void)
|
|||||||
if (cpu_is_mx35()) {
|
if (cpu_is_mx35()) {
|
||||||
mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
|
mxc_nand_resources[0].start = MX35_NFC_BASE_ADDR;
|
||||||
mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff;
|
mxc_nand_resources[0].end = MX35_NFC_BASE_ADDR + 0xfff;
|
||||||
|
otg_resources[0].start = MX35_OTG_BASE_ADDR;
|
||||||
|
otg_resources[0].end = MX35_OTG_BASE_ADDR + 0x1ff;
|
||||||
|
otg_resources[1].start = MXC_INT_USBOTG;
|
||||||
|
otg_resources[1].end = MXC_INT_USBOTG;
|
||||||
|
mxc_usbh1_resources[0].start = MX35_OTG_BASE_ADDR + 0x400;
|
||||||
|
mxc_usbh1_resources[0].end = MX35_OTG_BASE_ADDR + 0x5ff;
|
||||||
|
mxc_usbh1_resources[1].start = MXC_INT_USBHS;
|
||||||
|
mxc_usbh1_resources[1].end = MXC_INT_USBHS;
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -4,7 +4,7 @@
|
|||||||
#define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */
|
#define MX31_IRAM_BASE_ADDR 0x1FFC0000 /* internal ram */
|
||||||
#define MX31_IRAM_SIZE SZ_16K
|
#define MX31_IRAM_SIZE SZ_16K
|
||||||
|
|
||||||
#define OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000)
|
#define MX31_OTG_BASE_ADDR (AIPS1_BASE_ADDR + 0x00088000)
|
||||||
#define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000)
|
#define ATA_BASE_ADDR (AIPS1_BASE_ADDR + 0x0008C000)
|
||||||
#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000)
|
#define UART4_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B0000)
|
||||||
#define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000)
|
#define UART5_BASE_ADDR (AIPS1_BASE_ADDR + 0x000B4000)
|
||||||
|
@ -5,6 +5,7 @@
|
|||||||
#define MX35_IRAM_SIZE SZ_128K
|
#define MX35_IRAM_SIZE SZ_128K
|
||||||
|
|
||||||
#define MXC_FEC_BASE_ADDR 0x50038000
|
#define MXC_FEC_BASE_ADDR 0x50038000
|
||||||
|
#define MX35_OTG_BASE_ADDR 0x53ff4000
|
||||||
#define MX35_NFC_BASE_ADDR 0xBB000000
|
#define MX35_NFC_BASE_ADDR 0xBB000000
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
Loading…
Reference in New Issue
Block a user