forked from Minki/linux
drm/i915: don't enable FBC when pixel rate exceeds 95% on HSW/BDW
BSpec says we shouldn't enable FBC on HSW/BDW when the pipe pixel rate exceeds 95% of the core display clock. v2: - HSW also needs the WA (Ville). - Add the WA name (Ville). - Use the current cdclk (Ville). Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -949,6 +949,7 @@ struct i915_fbc {
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FBC_ROTATION, /* rotation is not supported */
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FBC_IN_DBG_MASTER, /* kernel debugger is active */
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FBC_BAD_STRIDE, /* stride is not supported */
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FBC_PIXEL_RATE, /* pixel rate is too big */
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} no_fbc_reason;
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bool (*fbc_enabled)(struct drm_i915_private *dev_priv);
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@ -482,6 +482,8 @@ const char *intel_no_fbc_reason_str(enum no_fbc_reason reason)
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return "Kernel debugger is active";
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case FBC_BAD_STRIDE:
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return "framebuffer stride not supported";
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case FBC_PIXEL_RATE:
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return "pixel rate is too big";
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default:
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MISSING_CASE(reason);
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return "unknown reason";
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@ -828,6 +830,14 @@ static void __intel_fbc_update(struct drm_i915_private *dev_priv)
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goto out_disable;
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}
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/* WaFbcExceedCdClockThreshold:hsw,bdw */
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if ((IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) &&
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ilk_pipe_pixel_rate(intel_crtc->config) >=
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dev_priv->cdclk_freq * 95 / 100) {
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set_no_fbc_reason(dev_priv, FBC_PIXEL_RATE);
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goto out_disable;
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}
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if (intel_fbc_setup_cfb(dev_priv, obj->base.size,
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drm_format_plane_cpp(fb->pixel_format, 0))) {
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set_no_fbc_reason(dev_priv, FBC_STOLEN_TOO_SMALL);
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