leandrof/linux
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

i.MX fixes for 5.16, round 3:

Browse Source 
- Fix imx6qdl-wandboard Ethernet support by adding 'qca,clk-out-frequency'
   property.
 - Fix scl-gpios property typo in LX2160A device tree.
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9bpEUHHNoYXduZ3Vv
 QGtlcm5lbC5vcmcACgkQUFdYWoewfM4+7AgAvH74yk0IJBPKTbAJ1twsze6Nvfq0
 77tkPXOPUSrNcbVeGKUIosWydj+zPaAiQ+N+4B1J2YlBgdK1hub/vq3M2hlUPqbQ
 pzPjcO2M+hiOCqL2sznuOGo3k8MeZQp+AWp5mvTZERGblwHdsxmOq2dCA7e6hPs7
 aAqOro4YCGb1FAbj3xwtACUb9asc463/HkRhsT+yLgO7lDLerBUcvrCV1jCKrUio
 eE3bZjM4lHtgrxW3GeEQdxIcBIB5ntFHQL7MMrFtvhDVSWSkGaow+Q8BkGw3jGAZ
 jMLIkYIHQfGKnFUQe5KSeWZbSe2OfXrRw9pdsQ3FMFlHsWmrhSticteSVw==
 =fttK
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAavIACgkQmmx57+YA
 GNniXBAAqKOs8jW6pGzxGzoqfjMKnYDJDXJCohLAGA5dy+7lmZEmBsQ4YpYEBWcK
 Nlw/uT/c8NwrMLX5rdg3jRpzB3PQxi3AEcpSt/0hbAWloFI8AfpUdZZMN2muiIX5
 xsU8k6Vr4ype1Tn9VovfNZb6EEjYxIVGqkOZdCXmfsiOttNyrI5fSxowidNnerl+
 cPmv5eG6vVVZf1oqdUkpNu/4Ka/OUP3mANfhtzQd5/VkdkjF/i0VYZgPoHRQyWnp
 ajwy88yb3dJFbgZhs4wf/K1QpTzc7JLYl8JuJ9Eyq1mRnuwZXpl+2Zu9XX7UhqUd
 Nv6dqVOERyZ9FcpZxtTynk0y6b45ZVuUV7Pu87nfFW2RBwd4F+Y0ya7UKGFQ7Z0y
 gkp81vGMcsbIWq/T9oq4B+Uau0Y1GUjJwfblh9hUHZoFD00KswpsFZnYuqfLamls
 R5f3W4wGANivQWXvkz0r5iJngkQ1qZtkBuXKtfUoy2CZOFRcfbypciMjPVd/s9Hn
 zAJwPMVwD518saMDl6i8wlsM+sq6Tq/QvaUyWyC49ZevPohLZfEvb2Xc7358TUBf
 qs7p0C8OhLWqggm/j/J84fppY1UGavxZapmJUKB8UuU2kwzladNqGAXnZQu+wUIm
 hgOssYLGmOw+Le5Q3BcRNgHXjFYDBWJAwW1B/v6DUnx4OFXjqu0=
 =IDFu
 -----END PGP SIGNATURE-----

Merge tag 'imx-fixes-5.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.16, round 3:

- Fix imx6qdl-wandboard Ethernet support by adding 'qca,clk-out-frequency'
  property.
- Fix scl-gpios property typo in LX2160A device tree.

* tag 'imx-fixes-5.16-3' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  arm64: dts: lx2160a: fix scl-gpios property name
  ARM: dts: imx6qdl-wandboard: Fix Ethernet support
  soc: imx: Register SoC device only on i.MX boards
  soc: imx: imx8m-blk-ctrl: Fix imx8mm mipi reset
  ARM: dts: imx6ull-pinfunc: Fix CSI_DATA07__ESAI_TX0 pad name
  arm64: dts: imx8mq: remove interconnect property from lcdif
  arm64: dts: ten64: remove redundant interrupt declaration for gpio-keys
  arm64: dts: lx2160abluebox3: update RGMII delays for sja1105 switch
  ARM: dts: ls1021a-tsn: update RGMII delays for sja1105 switch
  ARM: dts: imx6qp-prtwd3: update RGMII delays for sja1105 switch

Link: https://lore.kernel.org/r/20211218052003.GA25102@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2021-12-20 12:37:20 +01:00
commit 7ad8b2fcb8
10 changed files with 35 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/imx6qdl-wandboard.dtsi
View File

@ -309,6 +309,7 @@
ethphy: ethernet-phy@1 {
reg = <1>;
qca,clk-out-frequency = <125000000>;
};
};
};

2
arch/arm/boot/dts/imx6qp-prtwd3.dts
View File

@ -178,6 +178,8 @@
label = "cpu";
ethernet = <&fec>;
phy-mode = "rgmii-id";
rx-internal-delay-ps = <2000>;
tx-internal-delay-ps = <2000>;
fixed-link {
speed = <100>;

2
arch/arm/boot/dts/imx6ull-pinfunc.h
View File

@ -82,6 +82,6 @@
#define MX6ULL_PAD_CSI_DATA04__ESAI_TX_FS 0x01F4 0x0480 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA05__ESAI_TX_CLK 0x01F8 0x0484 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA06__ESAI_TX5_RX0 0x01FC 0x0488 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA07__ESAI_T0 0x0200 0x048C 0x0000 0x9 0x0
#define MX6ULL_PAD_CSI_DATA07__ESAI_TX0 0x0200 0x048C 0x0000 0x9 0x0
#endif /* __DTS_IMX6ULL_PINFUNC_H */

2
arch/arm/boot/dts/ls1021a-tsn.dts
View File

@ -91,6 +91,8 @@
/* Internal port connected to eth2 */
ethernet = <&enet2>;
phy-mode = "rgmii";
rx-internal-delay-ps = <0>;
tx-internal-delay-ps = <0>;
reg = <4>;
fixed-link {

2
arch/arm64/boot/dts/freescale/fsl-ls1088a-ten64.dts
View File

@ -38,7 +38,6 @@
powerdn {
label = "External Power Down";
gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
interrupts = <&gpio1 17 IRQ_TYPE_EDGE_FALLING>;
linux,code = <KEY_POWER>;
};
@ -46,7 +45,6 @@
admin {
label = "ADMIN button";
gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
interrupts = <&gpio3 8 IRQ_TYPE_EDGE_RISING>;
linux,code = <KEY_WPS_BUTTON>;
};
};

4
arch/arm64/boot/dts/freescale/fsl-lx2160a-bluebox3.dts
View File

@ -386,6 +386,8 @@
reg = <2>;
ethernet = <&dpmac17>;
phy-mode = "rgmii-id";
rx-internal-delay-ps = <2000>;
tx-internal-delay-ps = <2000>;
fixed-link {
speed = <1000>;
@ -529,6 +531,8 @@
reg = <2>;
ethernet = <&dpmac18>;
phy-mode = "rgmii-id";
rx-internal-delay-ps = <2000>;
tx-internal-delay-ps = <2000>;
fixed-link {
speed = <1000>;

4
arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
View File

@ -719,7 +719,7 @@
clock-names = "i2c";
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(16)>;
scl-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpio2 15 GPIO_ACTIVE_HIGH>;
status = "disabled";
};
@ -768,7 +768,7 @@
clock-names = "i2c";
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(16)>;
scl-gpio = <&gpio2 16 GPIO_ACTIVE_HIGH>;
scl-gpios = <&gpio2 16 GPIO_ACTIVE_HIGH>;
status = "disabled";
};

2
arch/arm64/boot/dts/freescale/imx8mq.dtsi
View File

@ -524,8 +524,6 @@
<&clk IMX8MQ_VIDEO_PLL1>,
<&clk IMX8MQ_VIDEO_PLL1_OUT>;
assigned-clock-rates = <0>, <0>, <0>, <594000000>;
interconnects = <&noc IMX8MQ_ICM_LCDIF &noc IMX8MQ_ICS_DRAM>;
interconnect-names = "dram";
status = "disabled";
port@0 {

19
drivers/soc/imx/imx8m-blk-ctrl.c
View File

@ -17,6 +17,7 @@
#define BLK_SFT_RSTN 0x0
#define BLK_CLK_EN 0x4
#define BLK_MIPI_RESET_DIV 0x8 /* Mini/Nano DISPLAY_BLK_CTRL only */
struct imx8m_blk_ctrl_domain;
@ -36,6 +37,15 @@ struct imx8m_blk_ctrl_domain_data {
const char *gpc_name;
u32 rst_mask;
u32 clk_mask;
/*
* i.MX8M Mini and Nano have a third DISPLAY_BLK_CTRL register
* which is used to control the reset for the MIPI Phy.
* Since it's only present in certain circumstances,
* an if-statement should be used before setting and clearing this
* register.
*/
u32 mipi_phy_rst_mask;
};
#define DOMAIN_MAX_CLKS 3
@ -78,6 +88,8 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd)
/* put devices into reset */
regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);
if (data->mipi_phy_rst_mask)
regmap_clear_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask);
/* enable upstream and blk-ctrl clocks to allow reset to propagate */
ret = clk_bulk_prepare_enable(data->num_clks, domain->clks);
@ -99,6 +111,8 @@ static int imx8m_blk_ctrl_power_on(struct generic_pm_domain *genpd)
/* release reset */
regmap_set_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);
if (data->mipi_phy_rst_mask)
regmap_set_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask);
/* disable upstream clocks */
clk_bulk_disable_unprepare(data->num_clks, domain->clks);
@ -120,6 +134,9 @@ static int imx8m_blk_ctrl_power_off(struct generic_pm_domain *genpd)
struct imx8m_blk_ctrl *bc = domain->bc;
/* put devices into reset and disable clocks */
if (data->mipi_phy_rst_mask)
regmap_clear_bits(bc->regmap, BLK_MIPI_RESET_DIV, data->mipi_phy_rst_mask);
regmap_clear_bits(bc->regmap, BLK_SFT_RSTN, data->rst_mask);
regmap_clear_bits(bc->regmap, BLK_CLK_EN, data->clk_mask);
@ -480,6 +497,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mm_disp_blk_ctl_domain_data[]
.gpc_name = "mipi-dsi",
.rst_mask = BIT(5),
.clk_mask = BIT(8) | BIT(9),
.mipi_phy_rst_mask = BIT(17),
},
[IMX8MM_DISPBLK_PD_MIPI_CSI] = {
.name = "dispblk-mipi-csi",
@ -488,6 +506,7 @@ static const struct imx8m_blk_ctrl_domain_data imx8mm_disp_blk_ctl_domain_data[]
.gpc_name = "mipi-csi",
.rst_mask = BIT(3) | BIT(4),
.clk_mask = BIT(10) | BIT(11),
.mipi_phy_rst_mask = BIT(16),
},
};

4
drivers/soc/imx/soc-imx.c
View File

@ -36,6 +36,10 @@ static int __init imx_soc_device_init(void)
int ret;
int i;
/* Return early if this is running on devices with different SoCs */
if (!__mxc_cpu_type)
return 0;
if (of_machine_is_compatible("fsl,ls1021a"))
return 0;