forked from Minki/linux
ath10k: improve logging to include dev id
This makes it a lot easier to log and debug messages if there's more than 1 ath10k device on a system. Signed-off-by: Michal Kazior <michal.kazior@tieto.com> Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
This commit is contained in:
parent
61e9aab7a1
commit
7aa7a72a23
@ -22,7 +22,7 @@
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void ath10k_bmi_start(struct ath10k *ar)
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{
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ath10k_dbg(ATH10K_DBG_BMI, "bmi start\n");
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi start\n");
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ar->bmi.done_sent = false;
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}
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@ -33,10 +33,10 @@ int ath10k_bmi_done(struct ath10k *ar)
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u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.done);
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int ret;
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ath10k_dbg(ATH10K_DBG_BMI, "bmi done\n");
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi done\n");
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if (ar->bmi.done_sent) {
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ath10k_dbg(ATH10K_DBG_BMI, "bmi skipped\n");
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi skipped\n");
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return 0;
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}
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@ -45,7 +45,7 @@ int ath10k_bmi_done(struct ath10k *ar)
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ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, NULL, NULL);
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if (ret) {
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ath10k_warn("unable to write to the device: %d\n", ret);
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ath10k_warn(ar, "unable to write to the device: %d\n", ret);
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return ret;
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}
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@ -61,10 +61,10 @@ int ath10k_bmi_get_target_info(struct ath10k *ar,
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u32 resplen = sizeof(resp.get_target_info);
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int ret;
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ath10k_dbg(ATH10K_DBG_BMI, "bmi get target info\n");
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi get target info\n");
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if (ar->bmi.done_sent) {
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ath10k_warn("BMI Get Target Info Command disallowed\n");
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ath10k_warn(ar, "BMI Get Target Info Command disallowed\n");
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return -EBUSY;
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}
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@ -72,12 +72,12 @@ int ath10k_bmi_get_target_info(struct ath10k *ar,
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ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, &resp, &resplen);
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if (ret) {
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ath10k_warn("unable to get target info from device\n");
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ath10k_warn(ar, "unable to get target info from device\n");
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return ret;
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}
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if (resplen < sizeof(resp.get_target_info)) {
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ath10k_warn("invalid get_target_info response length (%d)\n",
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ath10k_warn(ar, "invalid get_target_info response length (%d)\n",
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resplen);
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return -EIO;
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}
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@ -97,11 +97,11 @@ int ath10k_bmi_read_memory(struct ath10k *ar,
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u32 rxlen;
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int ret;
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ath10k_dbg(ATH10K_DBG_BMI, "bmi read address 0x%x length %d\n",
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi read address 0x%x length %d\n",
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address, length);
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if (ar->bmi.done_sent) {
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ath10k_warn("command disallowed\n");
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ath10k_warn(ar, "command disallowed\n");
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return -EBUSY;
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}
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@ -115,7 +115,7 @@ int ath10k_bmi_read_memory(struct ath10k *ar,
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ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen,
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&resp, &rxlen);
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if (ret) {
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ath10k_warn("unable to read from the device (%d)\n",
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ath10k_warn(ar, "unable to read from the device (%d)\n",
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ret);
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return ret;
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}
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@ -137,11 +137,11 @@ int ath10k_bmi_write_memory(struct ath10k *ar,
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u32 txlen;
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int ret;
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ath10k_dbg(ATH10K_DBG_BMI, "bmi write address 0x%x length %d\n",
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi write address 0x%x length %d\n",
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address, length);
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if (ar->bmi.done_sent) {
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ath10k_warn("command disallowed\n");
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ath10k_warn(ar, "command disallowed\n");
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return -EBUSY;
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}
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@ -159,7 +159,7 @@ int ath10k_bmi_write_memory(struct ath10k *ar,
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ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, hdrlen + txlen,
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NULL, NULL);
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if (ret) {
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ath10k_warn("unable to write to the device (%d)\n",
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ath10k_warn(ar, "unable to write to the device (%d)\n",
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ret);
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return ret;
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}
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@ -183,11 +183,11 @@ int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 param, u32 *result)
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u32 resplen = sizeof(resp.execute);
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int ret;
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ath10k_dbg(ATH10K_DBG_BMI, "bmi execute address 0x%x param 0x%x\n",
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi execute address 0x%x param 0x%x\n",
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address, param);
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if (ar->bmi.done_sent) {
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ath10k_warn("command disallowed\n");
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ath10k_warn(ar, "command disallowed\n");
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return -EBUSY;
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}
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@ -197,19 +197,19 @@ int ath10k_bmi_execute(struct ath10k *ar, u32 address, u32 param, u32 *result)
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ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, &resp, &resplen);
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if (ret) {
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ath10k_warn("unable to read from the device\n");
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ath10k_warn(ar, "unable to read from the device\n");
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return ret;
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}
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if (resplen < sizeof(resp.execute)) {
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ath10k_warn("invalid execute response length (%d)\n",
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ath10k_warn(ar, "invalid execute response length (%d)\n",
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resplen);
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return -EIO;
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}
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*result = __le32_to_cpu(resp.execute.result);
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ath10k_dbg(ATH10K_DBG_BMI, "bmi execute result 0x%x\n", *result);
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi execute result 0x%x\n", *result);
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return 0;
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}
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@ -221,11 +221,11 @@ int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length)
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u32 txlen;
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int ret;
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ath10k_dbg(ATH10K_DBG_BMI, "bmi lz data buffer 0x%p length %d\n",
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz data buffer 0x%p length %d\n",
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buffer, length);
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if (ar->bmi.done_sent) {
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ath10k_warn("command disallowed\n");
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ath10k_warn(ar, "command disallowed\n");
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return -EBUSY;
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}
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@ -241,7 +241,7 @@ int ath10k_bmi_lz_data(struct ath10k *ar, const void *buffer, u32 length)
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ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, hdrlen + txlen,
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NULL, NULL);
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if (ret) {
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ath10k_warn("unable to write to the device\n");
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ath10k_warn(ar, "unable to write to the device\n");
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return ret;
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}
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@ -258,11 +258,11 @@ int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address)
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u32 cmdlen = sizeof(cmd.id) + sizeof(cmd.lz_start);
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int ret;
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ath10k_dbg(ATH10K_DBG_BMI, "bmi lz stream start address 0x%x\n",
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ath10k_dbg(ar, ATH10K_DBG_BMI, "bmi lz stream start address 0x%x\n",
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address);
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if (ar->bmi.done_sent) {
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ath10k_warn("command disallowed\n");
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ath10k_warn(ar, "command disallowed\n");
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return -EBUSY;
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}
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@ -271,7 +271,7 @@ int ath10k_bmi_lz_stream_start(struct ath10k *ar, u32 address)
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ret = ath10k_hif_exchange_bmi_msg(ar, &cmd, cmdlen, NULL, NULL);
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if (ret) {
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ath10k_warn("unable to Start LZ Stream to the device\n");
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ath10k_warn(ar, "unable to Start LZ Stream to the device\n");
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return ret;
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}
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@ -286,7 +286,7 @@ int ath10k_bmi_fast_download(struct ath10k *ar,
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u32 trailer_len = length - head_len;
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int ret;
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ath10k_dbg(ATH10K_DBG_BMI,
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ath10k_dbg(ar, ATH10K_DBG_BMI,
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"bmi fast download address 0x%x buffer 0x%p length %d\n",
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address, buffer, length);
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@ -284,7 +284,7 @@ int ath10k_ce_send_nolock(struct ath10k_ce_pipe *ce_state,
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int ret = 0;
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if (nbytes > ce_state->src_sz_max)
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ath10k_warn("%s: send more we can (nbytes: %d, max: %d)\n",
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ath10k_warn(ar, "%s: send more we can (nbytes: %d, max: %d)\n",
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__func__, nbytes, ce_state->src_sz_max);
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if (unlikely(CE_RING_DELTA(nentries_mask,
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@ -853,7 +853,7 @@ static int ath10k_ce_init_src_ring(struct ath10k *ar,
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ath10k_ce_src_ring_lowmark_set(ar, ctrl_addr, 0);
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ath10k_ce_src_ring_highmark_set(ar, ctrl_addr, nentries);
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ath10k_dbg(ATH10K_DBG_BOOT,
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ath10k_dbg(ar, ATH10K_DBG_BOOT,
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"boot init ce src ring id %d entries %d base_addr %p\n",
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ce_id, nentries, src_ring->base_addr_owner_space);
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@ -887,7 +887,7 @@ static int ath10k_ce_init_dest_ring(struct ath10k *ar,
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ath10k_ce_dest_ring_lowmark_set(ar, ctrl_addr, 0);
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ath10k_ce_dest_ring_highmark_set(ar, ctrl_addr, nentries);
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ath10k_dbg(ATH10K_DBG_BOOT,
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ath10k_dbg(ar, ATH10K_DBG_BOOT,
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"boot ce dest ring id %d entries %d base_addr %p\n",
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ce_id, nentries, dest_ring->base_addr_owner_space);
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@ -1056,7 +1056,7 @@ int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id,
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if (attr->src_nentries) {
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ret = ath10k_ce_init_src_ring(ar, ce_id, attr);
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if (ret) {
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ath10k_err("Failed to initialize CE src ring for ID: %d (%d)\n",
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ath10k_err(ar, "Failed to initialize CE src ring for ID: %d (%d)\n",
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ce_id, ret);
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return ret;
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}
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@ -1065,7 +1065,7 @@ int ath10k_ce_init_pipe(struct ath10k *ar, unsigned int ce_id,
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if (attr->dest_nentries) {
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ret = ath10k_ce_init_dest_ring(ar, ce_id, attr);
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if (ret) {
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ath10k_err("Failed to initialize CE dest ring for ID: %d (%d)\n",
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ath10k_err(ar, "Failed to initialize CE dest ring for ID: %d (%d)\n",
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ce_id, ret);
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return ret;
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}
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@ -1110,7 +1110,7 @@ int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id,
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ce_state->src_ring = ath10k_ce_alloc_src_ring(ar, ce_id, attr);
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if (IS_ERR(ce_state->src_ring)) {
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ret = PTR_ERR(ce_state->src_ring);
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ath10k_err("failed to allocate copy engine source ring %d: %d\n",
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ath10k_err(ar, "failed to allocate copy engine source ring %d: %d\n",
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ce_id, ret);
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ce_state->src_ring = NULL;
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return ret;
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@ -1122,7 +1122,7 @@ int ath10k_ce_alloc_pipe(struct ath10k *ar, int ce_id,
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attr);
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if (IS_ERR(ce_state->dest_ring)) {
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ret = PTR_ERR(ce_state->dest_ring);
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ath10k_err("failed to allocate copy engine destination ring %d: %d\n",
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ath10k_err(ar, "failed to allocate copy engine destination ring %d: %d\n",
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ce_id, ret);
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ce_state->dest_ring = NULL;
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return ret;
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@ -53,7 +53,7 @@ static const struct ath10k_hw_params ath10k_hw_params_list[] = {
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static void ath10k_send_suspend_complete(struct ath10k *ar)
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{
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ath10k_dbg(ATH10K_DBG_BOOT, "boot suspend complete\n");
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ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
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complete(&ar->target_suspend);
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}
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@ -67,14 +67,14 @@ static int ath10k_init_configure_target(struct ath10k *ar)
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ret = ath10k_bmi_write32(ar, hi_app_host_interest,
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HTC_PROTOCOL_VERSION);
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if (ret) {
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ath10k_err("settings HTC version failed\n");
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ath10k_err(ar, "settings HTC version failed\n");
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return ret;
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}
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/* set the firmware mode to STA/IBSS/AP */
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ret = ath10k_bmi_read32(ar, hi_option_flag, ¶m_host);
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if (ret) {
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ath10k_err("setting firmware mode (1/2) failed\n");
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ath10k_err(ar, "setting firmware mode (1/2) failed\n");
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return ret;
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}
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@ -93,14 +93,14 @@ static int ath10k_init_configure_target(struct ath10k *ar)
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ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
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if (ret) {
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ath10k_err("setting firmware mode (2/2) failed\n");
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ath10k_err(ar, "setting firmware mode (2/2) failed\n");
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return ret;
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}
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/* We do all byte-swapping on the host */
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ret = ath10k_bmi_write32(ar, hi_be, 0);
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if (ret) {
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ath10k_err("setting host CPU BE mode failed\n");
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ath10k_err(ar, "setting host CPU BE mode failed\n");
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return ret;
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}
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@ -108,7 +108,7 @@ static int ath10k_init_configure_target(struct ath10k *ar)
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ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
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if (ret) {
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ath10k_err("setting FW data/desc swap flags failed\n");
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ath10k_err(ar, "setting FW data/desc swap flags failed\n");
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return ret;
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}
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@ -146,11 +146,12 @@ static int ath10k_push_board_ext_data(struct ath10k *ar)
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ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
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if (ret) {
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ath10k_err("could not read board ext data addr (%d)\n", ret);
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ath10k_err(ar, "could not read board ext data addr (%d)\n",
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ret);
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return ret;
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}
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ath10k_dbg(ATH10K_DBG_BOOT,
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ath10k_dbg(ar, ATH10K_DBG_BOOT,
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"boot push board extended data addr 0x%x\n",
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board_ext_data_addr);
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@ -158,7 +159,7 @@ static int ath10k_push_board_ext_data(struct ath10k *ar)
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return 0;
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if (ar->board_len != (board_data_size + board_ext_data_size)) {
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ath10k_err("invalid board (ext) data sizes %zu != %d+%d\n",
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ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
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ar->board_len, board_data_size, board_ext_data_size);
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return -EINVAL;
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}
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@ -167,14 +168,15 @@ static int ath10k_push_board_ext_data(struct ath10k *ar)
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ar->board_data + board_data_size,
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board_ext_data_size);
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if (ret) {
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ath10k_err("could not write board ext data (%d)\n", ret);
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ath10k_err(ar, "could not write board ext data (%d)\n", ret);
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return ret;
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}
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ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
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(board_ext_data_size << 16) | 1);
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if (ret) {
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ath10k_err("could not write board ext data bit (%d)\n", ret);
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ath10k_err(ar, "could not write board ext data bit (%d)\n",
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ret);
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return ret;
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}
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@ -189,13 +191,13 @@ static int ath10k_download_board_data(struct ath10k *ar)
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ret = ath10k_push_board_ext_data(ar);
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if (ret) {
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ath10k_err("could not push board ext data (%d)\n", ret);
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ath10k_err(ar, "could not push board ext data (%d)\n", ret);
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goto exit;
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}
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ret = ath10k_bmi_read32(ar, hi_board_data, &address);
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if (ret) {
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ath10k_err("could not read board data addr (%d)\n", ret);
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ath10k_err(ar, "could not read board data addr (%d)\n", ret);
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goto exit;
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}
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@ -203,13 +205,13 @@ static int ath10k_download_board_data(struct ath10k *ar)
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min_t(u32, board_data_size,
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ar->board_len));
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if (ret) {
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ath10k_err("could not write board data (%d)\n", ret);
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ath10k_err(ar, "could not write board data (%d)\n", ret);
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goto exit;
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}
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ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
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if (ret) {
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ath10k_err("could not write board data bit (%d)\n", ret);
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ath10k_err(ar, "could not write board data bit (%d)\n", ret);
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goto exit;
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}
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@ -225,30 +227,30 @@ static int ath10k_download_and_run_otp(struct ath10k *ar)
|
||||
/* OTP is optional */
|
||||
|
||||
if (!ar->otp_data || !ar->otp_len) {
|
||||
ath10k_warn("Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
|
||||
ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
|
||||
ar->otp_data, ar->otp_len);
|
||||
return 0;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
|
||||
address, ar->otp_len);
|
||||
|
||||
ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
|
||||
if (ret) {
|
||||
ath10k_err("could not write otp (%d)\n", ret);
|
||||
ath10k_err(ar, "could not write otp (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_bmi_execute(ar, address, 0, &result);
|
||||
if (ret) {
|
||||
ath10k_err("could not execute otp (%d)\n", ret);
|
||||
ath10k_err(ar, "could not execute otp (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
|
||||
|
||||
if (result != 0) {
|
||||
ath10k_err("otp calibration failed: %d", result);
|
||||
ath10k_err(ar, "otp calibration failed: %d", result);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -265,7 +267,7 @@ static int ath10k_download_fw(struct ath10k *ar)
|
||||
ret = ath10k_bmi_fast_download(ar, address, ar->firmware_data,
|
||||
ar->firmware_len);
|
||||
if (ret) {
|
||||
ath10k_err("could not write fw (%d)\n", ret);
|
||||
ath10k_err(ar, "could not write fw (%d)\n", ret);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
@ -302,12 +304,12 @@ static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
|
||||
int ret = 0;
|
||||
|
||||
if (ar->hw_params.fw.fw == NULL) {
|
||||
ath10k_err("firmware file not defined\n");
|
||||
ath10k_err(ar, "firmware file not defined\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (ar->hw_params.fw.board == NULL) {
|
||||
ath10k_err("board data file not defined");
|
||||
ath10k_err(ar, "board data file not defined");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -316,7 +318,7 @@ static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
|
||||
ar->hw_params.fw.board);
|
||||
if (IS_ERR(ar->board)) {
|
||||
ret = PTR_ERR(ar->board);
|
||||
ath10k_err("could not fetch board data (%d)\n", ret);
|
||||
ath10k_err(ar, "could not fetch board data (%d)\n", ret);
|
||||
goto err;
|
||||
}
|
||||
|
||||
@ -328,7 +330,7 @@ static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
|
||||
ar->hw_params.fw.fw);
|
||||
if (IS_ERR(ar->firmware)) {
|
||||
ret = PTR_ERR(ar->firmware);
|
||||
ath10k_err("could not fetch firmware (%d)\n", ret);
|
||||
ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
|
||||
goto err;
|
||||
}
|
||||
|
||||
@ -344,7 +346,7 @@ static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
|
||||
ar->hw_params.fw.otp);
|
||||
if (IS_ERR(ar->otp)) {
|
||||
ret = PTR_ERR(ar->otp);
|
||||
ath10k_err("could not fetch otp (%d)\n", ret);
|
||||
ath10k_err(ar, "could not fetch otp (%d)\n", ret);
|
||||
goto err;
|
||||
}
|
||||
|
||||
@ -369,7 +371,7 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
/* first fetch the firmware file (firmware-*.bin) */
|
||||
ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
|
||||
if (IS_ERR(ar->firmware)) {
|
||||
ath10k_err("could not fetch firmware file '%s/%s': %ld\n",
|
||||
ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
|
||||
ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
|
||||
return PTR_ERR(ar->firmware);
|
||||
}
|
||||
@ -381,14 +383,14 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
|
||||
|
||||
if (len < magic_len) {
|
||||
ath10k_err("firmware file '%s/%s' too small to contain magic: %zu\n",
|
||||
ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
|
||||
ar->hw_params.fw.dir, name, len);
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
|
||||
ath10k_err("invalid firmware magic\n");
|
||||
ath10k_err(ar, "invalid firmware magic\n");
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
@ -410,7 +412,7 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
data += sizeof(*hdr);
|
||||
|
||||
if (len < ie_len) {
|
||||
ath10k_err("invalid length for FW IE %d (%zu < %zu)\n",
|
||||
ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
|
||||
ie_id, len, ie_len);
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
@ -424,7 +426,7 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
memcpy(ar->hw->wiphy->fw_version, data, ie_len);
|
||||
ar->hw->wiphy->fw_version[ie_len] = '\0';
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"found fw version %s\n",
|
||||
ar->hw->wiphy->fw_version);
|
||||
break;
|
||||
@ -434,11 +436,11 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
|
||||
timestamp = (__le32 *)data;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "found fw timestamp %d\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
|
||||
le32_to_cpup(timestamp));
|
||||
break;
|
||||
case ATH10K_FW_IE_FEATURES:
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"found firmware features ie (%zd B)\n",
|
||||
ie_len);
|
||||
|
||||
@ -450,19 +452,19 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
break;
|
||||
|
||||
if (data[index] & (1 << bit)) {
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"Enabling feature bit: %i\n",
|
||||
i);
|
||||
__set_bit(i, ar->fw_features);
|
||||
}
|
||||
}
|
||||
|
||||
ath10k_dbg_dump(ATH10K_DBG_BOOT, "features", "",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
|
||||
ar->fw_features,
|
||||
sizeof(ar->fw_features));
|
||||
break;
|
||||
case ATH10K_FW_IE_FW_IMAGE:
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"found fw image ie (%zd B)\n",
|
||||
ie_len);
|
||||
|
||||
@ -471,7 +473,7 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
|
||||
break;
|
||||
case ATH10K_FW_IE_OTP_IMAGE:
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"found otp image ie (%zd B)\n",
|
||||
ie_len);
|
||||
|
||||
@ -480,7 +482,7 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
|
||||
break;
|
||||
default:
|
||||
ath10k_warn("Unknown FW IE: %u\n",
|
||||
ath10k_warn(ar, "Unknown FW IE: %u\n",
|
||||
le32_to_cpu(hdr->id));
|
||||
break;
|
||||
}
|
||||
@ -493,7 +495,7 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
}
|
||||
|
||||
if (!ar->firmware_data || !ar->firmware_len) {
|
||||
ath10k_warn("No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
|
||||
ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
|
||||
ar->hw_params.fw.dir, name);
|
||||
ret = -ENOMEDIUM;
|
||||
goto err;
|
||||
@ -501,14 +503,14 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
|
||||
if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
|
||||
!test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
|
||||
ath10k_err("feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
|
||||
ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
|
||||
/* now fetch the board file */
|
||||
if (ar->hw_params.fw.board == NULL) {
|
||||
ath10k_err("board data file not defined");
|
||||
ath10k_err(ar, "board data file not defined");
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
}
|
||||
@ -518,7 +520,7 @@ static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
|
||||
ar->hw_params.fw.board);
|
||||
if (IS_ERR(ar->board)) {
|
||||
ret = PTR_ERR(ar->board);
|
||||
ath10k_err("could not fetch board data '%s/%s' (%d)\n",
|
||||
ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
|
||||
ar->hw_params.fw.dir, ar->hw_params.fw.board,
|
||||
ret);
|
||||
goto err;
|
||||
@ -539,28 +541,28 @@ static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
|
||||
int ret;
|
||||
|
||||
ar->fw_api = 3;
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
||||
|
||||
ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
|
||||
if (ret == 0)
|
||||
goto success;
|
||||
|
||||
ar->fw_api = 2;
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
||||
|
||||
ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
|
||||
if (ret == 0)
|
||||
goto success;
|
||||
|
||||
ar->fw_api = 1;
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
|
||||
|
||||
ret = ath10k_core_fetch_firmware_api_1(ar);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
success:
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -571,19 +573,19 @@ static int ath10k_init_download_firmware(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_download_board_data(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to download board data: %d\n", ret);
|
||||
ath10k_err(ar, "failed to download board data: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_download_and_run_otp(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to run otp: %d\n", ret);
|
||||
ath10k_err(ar, "failed to run otp: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_download_fw(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to download firmware: %d\n", ret);
|
||||
ath10k_err(ar, "failed to download firmware: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -600,7 +602,7 @@ static int ath10k_init_uart(struct ath10k *ar)
|
||||
*/
|
||||
ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
|
||||
if (ret) {
|
||||
ath10k_warn("could not disable UART prints (%d)\n", ret);
|
||||
ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -609,24 +611,24 @@ static int ath10k_init_uart(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
|
||||
if (ret) {
|
||||
ath10k_warn("could not enable UART prints (%d)\n", ret);
|
||||
ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
|
||||
if (ret) {
|
||||
ath10k_warn("could not enable UART prints (%d)\n", ret);
|
||||
ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Set the UART baud rate to 19200. */
|
||||
ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
|
||||
if (ret) {
|
||||
ath10k_warn("could not set the baud rate (%d)\n", ret);
|
||||
ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ath10k_info("UART prints enabled\n");
|
||||
ath10k_info(ar, "UART prints enabled\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -643,14 +645,14 @@ static int ath10k_init_hw_params(struct ath10k *ar)
|
||||
}
|
||||
|
||||
if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
|
||||
ath10k_err("Unsupported hardware version: 0x%x\n",
|
||||
ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
|
||||
ar->target_version);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
ar->hw_params = *hw_params;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
|
||||
ar->hw_params.name, ar->target_version);
|
||||
|
||||
return 0;
|
||||
@ -672,7 +674,7 @@ static void ath10k_core_restart(struct work_struct *work)
|
||||
case ATH10K_STATE_OFF:
|
||||
/* this can happen if driver is being unloaded
|
||||
* or if the crash happens during FW probing */
|
||||
ath10k_warn("cannot restart a device that hasn't been started\n");
|
||||
ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
|
||||
break;
|
||||
case ATH10K_STATE_RESTARTING:
|
||||
/* hw restart might be requested from multiple places */
|
||||
@ -681,7 +683,7 @@ static void ath10k_core_restart(struct work_struct *work)
|
||||
ar->state = ATH10K_STATE_WEDGED;
|
||||
/* fall through */
|
||||
case ATH10K_STATE_WEDGED:
|
||||
ath10k_warn("device is wedged, will not restart\n");
|
||||
ath10k_warn(ar, "device is wedged, will not restart\n");
|
||||
break;
|
||||
}
|
||||
|
||||
@ -714,7 +716,7 @@ int ath10k_core_start(struct ath10k *ar)
|
||||
|
||||
status = ath10k_htc_init(ar);
|
||||
if (status) {
|
||||
ath10k_err("could not init HTC (%d)\n", status);
|
||||
ath10k_err(ar, "could not init HTC (%d)\n", status);
|
||||
goto err;
|
||||
}
|
||||
|
||||
@ -724,84 +726,85 @@ int ath10k_core_start(struct ath10k *ar)
|
||||
|
||||
status = ath10k_wmi_attach(ar);
|
||||
if (status) {
|
||||
ath10k_err("WMI attach failed: %d\n", status);
|
||||
ath10k_err(ar, "WMI attach failed: %d\n", status);
|
||||
goto err;
|
||||
}
|
||||
|
||||
status = ath10k_htt_init(ar);
|
||||
if (status) {
|
||||
ath10k_err("failed to init htt: %d\n", status);
|
||||
ath10k_err(ar, "failed to init htt: %d\n", status);
|
||||
goto err_wmi_detach;
|
||||
}
|
||||
|
||||
status = ath10k_htt_tx_alloc(&ar->htt);
|
||||
if (status) {
|
||||
ath10k_err("failed to alloc htt tx: %d\n", status);
|
||||
ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
|
||||
goto err_wmi_detach;
|
||||
}
|
||||
|
||||
status = ath10k_htt_rx_alloc(&ar->htt);
|
||||
if (status) {
|
||||
ath10k_err("failed to alloc htt rx: %d\n", status);
|
||||
ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
|
||||
goto err_htt_tx_detach;
|
||||
}
|
||||
|
||||
status = ath10k_hif_start(ar);
|
||||
if (status) {
|
||||
ath10k_err("could not start HIF: %d\n", status);
|
||||
ath10k_err(ar, "could not start HIF: %d\n", status);
|
||||
goto err_htt_rx_detach;
|
||||
}
|
||||
|
||||
status = ath10k_htc_wait_target(&ar->htc);
|
||||
if (status) {
|
||||
ath10k_err("failed to connect to HTC: %d\n", status);
|
||||
ath10k_err(ar, "failed to connect to HTC: %d\n", status);
|
||||
goto err_hif_stop;
|
||||
}
|
||||
|
||||
status = ath10k_htt_connect(&ar->htt);
|
||||
if (status) {
|
||||
ath10k_err("failed to connect htt (%d)\n", status);
|
||||
ath10k_err(ar, "failed to connect htt (%d)\n", status);
|
||||
goto err_hif_stop;
|
||||
}
|
||||
|
||||
status = ath10k_wmi_connect(ar);
|
||||
if (status) {
|
||||
ath10k_err("could not connect wmi: %d\n", status);
|
||||
ath10k_err(ar, "could not connect wmi: %d\n", status);
|
||||
goto err_hif_stop;
|
||||
}
|
||||
|
||||
status = ath10k_htc_start(&ar->htc);
|
||||
if (status) {
|
||||
ath10k_err("failed to start htc: %d\n", status);
|
||||
ath10k_err(ar, "failed to start htc: %d\n", status);
|
||||
goto err_hif_stop;
|
||||
}
|
||||
|
||||
status = ath10k_wmi_wait_for_service_ready(ar);
|
||||
if (status <= 0) {
|
||||
ath10k_warn("wmi service ready event not received");
|
||||
ath10k_warn(ar, "wmi service ready event not received");
|
||||
status = -ETIMEDOUT;
|
||||
goto err_hif_stop;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "firmware %s booted\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
|
||||
ar->hw->wiphy->fw_version);
|
||||
|
||||
status = ath10k_wmi_cmd_init(ar);
|
||||
if (status) {
|
||||
ath10k_err("could not send WMI init command (%d)\n", status);
|
||||
ath10k_err(ar, "could not send WMI init command (%d)\n",
|
||||
status);
|
||||
goto err_hif_stop;
|
||||
}
|
||||
|
||||
status = ath10k_wmi_wait_for_unified_ready(ar);
|
||||
if (status <= 0) {
|
||||
ath10k_err("wmi unified ready event not received\n");
|
||||
ath10k_err(ar, "wmi unified ready event not received\n");
|
||||
status = -ETIMEDOUT;
|
||||
goto err_hif_stop;
|
||||
}
|
||||
|
||||
status = ath10k_htt_setup(&ar->htt);
|
||||
if (status) {
|
||||
ath10k_err("failed to setup htt: %d\n", status);
|
||||
ath10k_err(ar, "failed to setup htt: %d\n", status);
|
||||
goto err_hif_stop;
|
||||
}
|
||||
|
||||
@ -839,14 +842,14 @@ int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
|
||||
|
||||
ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
|
||||
if (ret) {
|
||||
ath10k_warn("could not suspend target (%d)\n", ret);
|
||||
ath10k_warn(ar, "could not suspend target (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
|
||||
|
||||
if (ret == 0) {
|
||||
ath10k_warn("suspend timed out - target pause event never came\n");
|
||||
ath10k_warn(ar, "suspend timed out - target pause event never came\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
@ -880,14 +883,14 @@ static int ath10k_core_probe_fw(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_hif_power_up(ar);
|
||||
if (ret) {
|
||||
ath10k_err("could not start pci hif (%d)\n", ret);
|
||||
ath10k_err(ar, "could not start pci hif (%d)\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
memset(&target_info, 0, sizeof(target_info));
|
||||
ret = ath10k_bmi_get_target_info(ar, &target_info);
|
||||
if (ret) {
|
||||
ath10k_err("could not get target info (%d)\n", ret);
|
||||
ath10k_err(ar, "could not get target info (%d)\n", ret);
|
||||
ath10k_hif_power_down(ar);
|
||||
return ret;
|
||||
}
|
||||
@ -897,14 +900,14 @@ static int ath10k_core_probe_fw(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_init_hw_params(ar);
|
||||
if (ret) {
|
||||
ath10k_err("could not get hw params (%d)\n", ret);
|
||||
ath10k_err(ar, "could not get hw params (%d)\n", ret);
|
||||
ath10k_hif_power_down(ar);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_core_fetch_firmware_files(ar);
|
||||
if (ret) {
|
||||
ath10k_err("could not fetch firmware files (%d)\n", ret);
|
||||
ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
|
||||
ath10k_hif_power_down(ar);
|
||||
return ret;
|
||||
}
|
||||
@ -913,7 +916,7 @@ static int ath10k_core_probe_fw(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_core_start(ar);
|
||||
if (ret) {
|
||||
ath10k_err("could not init core (%d)\n", ret);
|
||||
ath10k_err(ar, "could not init core (%d)\n", ret);
|
||||
ath10k_core_free_firmware_files(ar);
|
||||
ath10k_hif_power_down(ar);
|
||||
mutex_unlock(&ar->conf_mutex);
|
||||
@ -933,7 +936,7 @@ static int ath10k_core_check_chip_id(struct ath10k *ar)
|
||||
{
|
||||
u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
|
||||
ar->chip_id, hw_revision);
|
||||
|
||||
/* Check that we are not using hw1.0 (some of them have same pci id
|
||||
@ -941,7 +944,7 @@ static int ath10k_core_check_chip_id(struct ath10k *ar)
|
||||
* due to missing hw1.0 workarounds. */
|
||||
switch (hw_revision) {
|
||||
case QCA988X_HW_1_0_CHIP_ID_REV:
|
||||
ath10k_err("ERROR: qca988x hw1.0 is not supported\n");
|
||||
ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
case QCA988X_HW_2_0_CHIP_ID_REV:
|
||||
@ -949,7 +952,7 @@ static int ath10k_core_check_chip_id(struct ath10k *ar)
|
||||
return 0;
|
||||
|
||||
default:
|
||||
ath10k_warn("Warning: hardware revision unknown (0x%x), expect problems\n",
|
||||
ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
|
||||
ar->chip_id);
|
||||
return 0;
|
||||
}
|
||||
@ -964,25 +967,25 @@ static void ath10k_core_register_work(struct work_struct *work)
|
||||
|
||||
status = ath10k_core_probe_fw(ar);
|
||||
if (status) {
|
||||
ath10k_err("could not probe fw (%d)\n", status);
|
||||
ath10k_err(ar, "could not probe fw (%d)\n", status);
|
||||
goto err;
|
||||
}
|
||||
|
||||
status = ath10k_mac_register(ar);
|
||||
if (status) {
|
||||
ath10k_err("could not register to mac80211 (%d)\n", status);
|
||||
ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
|
||||
goto err_release_fw;
|
||||
}
|
||||
|
||||
status = ath10k_debug_create(ar);
|
||||
if (status) {
|
||||
ath10k_err("unable to initialize debugfs\n");
|
||||
ath10k_err(ar, "unable to initialize debugfs\n");
|
||||
goto err_unregister_mac;
|
||||
}
|
||||
|
||||
status = ath10k_spectral_create(ar);
|
||||
if (status) {
|
||||
ath10k_err("failed to initialize spectral\n");
|
||||
ath10k_err(ar, "failed to initialize spectral\n");
|
||||
goto err_debug_destroy;
|
||||
}
|
||||
|
||||
@ -1010,7 +1013,7 @@ int ath10k_core_register(struct ath10k *ar, u32 chip_id)
|
||||
|
||||
status = ath10k_core_check_chip_id(ar);
|
||||
if (status) {
|
||||
ath10k_err("Unsupported chip id 0x%08x\n", ar->chip_id);
|
||||
ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
|
||||
return status;
|
||||
}
|
||||
|
||||
|
@ -106,25 +106,7 @@ struct ath10k_dump_file_data {
|
||||
u8 data[0];
|
||||
} __packed;
|
||||
|
||||
static int ath10k_printk(const char *level, const char *fmt, ...)
|
||||
{
|
||||
struct va_format vaf;
|
||||
va_list args;
|
||||
int rtn;
|
||||
|
||||
va_start(args, fmt);
|
||||
|
||||
vaf.fmt = fmt;
|
||||
vaf.va = &args;
|
||||
|
||||
rtn = printk("%sath10k: %pV", level, &vaf);
|
||||
|
||||
va_end(args);
|
||||
|
||||
return rtn;
|
||||
}
|
||||
|
||||
int ath10k_info(const char *fmt, ...)
|
||||
int ath10k_info(struct ath10k *ar, const char *fmt, ...)
|
||||
{
|
||||
struct va_format vaf = {
|
||||
.fmt = fmt,
|
||||
@ -134,7 +116,7 @@ int ath10k_info(const char *fmt, ...)
|
||||
|
||||
va_start(args, fmt);
|
||||
vaf.va = &args;
|
||||
ret = ath10k_printk(KERN_INFO, "%pV", &vaf);
|
||||
ret = dev_info(ar->dev, "%pV", &vaf);
|
||||
trace_ath10k_log_info(&vaf);
|
||||
va_end(args);
|
||||
|
||||
@ -144,7 +126,7 @@ EXPORT_SYMBOL(ath10k_info);
|
||||
|
||||
void ath10k_print_driver_info(struct ath10k *ar)
|
||||
{
|
||||
ath10k_info("%s (0x%08x, 0x%08x) fw %s api %d htt %d.%d\n",
|
||||
ath10k_info(ar, "%s (0x%08x, 0x%08x) fw %s api %d htt %d.%d\n",
|
||||
ar->hw_params.name,
|
||||
ar->target_version,
|
||||
ar->chip_id,
|
||||
@ -152,7 +134,7 @@ void ath10k_print_driver_info(struct ath10k *ar)
|
||||
ar->fw_api,
|
||||
ar->htt.target_version_major,
|
||||
ar->htt.target_version_minor);
|
||||
ath10k_info("debug %d debugfs %d tracing %d dfs %d\n",
|
||||
ath10k_info(ar, "debug %d debugfs %d tracing %d dfs %d\n",
|
||||
config_enabled(CONFIG_ATH10K_DEBUG),
|
||||
config_enabled(CONFIG_ATH10K_DEBUGFS),
|
||||
config_enabled(CONFIG_ATH10K_TRACING),
|
||||
@ -160,7 +142,7 @@ void ath10k_print_driver_info(struct ath10k *ar)
|
||||
}
|
||||
EXPORT_SYMBOL(ath10k_print_driver_info);
|
||||
|
||||
int ath10k_err(const char *fmt, ...)
|
||||
int ath10k_err(struct ath10k *ar, const char *fmt, ...)
|
||||
{
|
||||
struct va_format vaf = {
|
||||
.fmt = fmt,
|
||||
@ -170,7 +152,7 @@ int ath10k_err(const char *fmt, ...)
|
||||
|
||||
va_start(args, fmt);
|
||||
vaf.va = &args;
|
||||
ret = ath10k_printk(KERN_ERR, "%pV", &vaf);
|
||||
ret = dev_err(ar->dev, "%pV", &vaf);
|
||||
trace_ath10k_log_err(&vaf);
|
||||
va_end(args);
|
||||
|
||||
@ -178,25 +160,21 @@ int ath10k_err(const char *fmt, ...)
|
||||
}
|
||||
EXPORT_SYMBOL(ath10k_err);
|
||||
|
||||
int ath10k_warn(const char *fmt, ...)
|
||||
int ath10k_warn(struct ath10k *ar, const char *fmt, ...)
|
||||
{
|
||||
struct va_format vaf = {
|
||||
.fmt = fmt,
|
||||
};
|
||||
va_list args;
|
||||
int ret = 0;
|
||||
|
||||
va_start(args, fmt);
|
||||
vaf.va = &args;
|
||||
|
||||
if (net_ratelimit())
|
||||
ret = ath10k_printk(KERN_WARNING, "%pV", &vaf);
|
||||
|
||||
dev_warn_ratelimited(ar->dev, "%pV", &vaf);
|
||||
trace_ath10k_log_warn(&vaf);
|
||||
|
||||
va_end(args);
|
||||
|
||||
return ret;
|
||||
return 0;
|
||||
}
|
||||
EXPORT_SYMBOL(ath10k_warn);
|
||||
|
||||
@ -417,7 +395,7 @@ static ssize_t ath10k_read_fw_stats(struct file *file, char __user *user_buf,
|
||||
|
||||
ret = ath10k_wmi_request_stats(ar, WMI_REQUEST_PEER_STAT);
|
||||
if (ret) {
|
||||
ath10k_warn("could not request stats (%d)\n", ret);
|
||||
ath10k_warn(ar, "could not request stats (%d)\n", ret);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
@ -635,10 +613,10 @@ static ssize_t ath10k_write_simulate_fw_crash(struct file *file,
|
||||
}
|
||||
|
||||
if (!strcmp(buf, "soft")) {
|
||||
ath10k_info("simulating soft firmware crash\n");
|
||||
ath10k_info(ar, "simulating soft firmware crash\n");
|
||||
ret = ath10k_wmi_force_fw_hang(ar, WMI_FORCE_FW_HANG_ASSERT, 0);
|
||||
} else if (!strcmp(buf, "hard")) {
|
||||
ath10k_info("simulating hard firmware crash\n");
|
||||
ath10k_info(ar, "simulating hard firmware crash\n");
|
||||
/* 0x7fff is vdev id, and it is always out of range for all
|
||||
* firmware variants in order to force a firmware crash.
|
||||
*/
|
||||
@ -650,7 +628,7 @@ static ssize_t ath10k_write_simulate_fw_crash(struct file *file,
|
||||
}
|
||||
|
||||
if (ret) {
|
||||
ath10k_warn("failed to simulate firmware crash: %d\n", ret);
|
||||
ath10k_warn(ar, "failed to simulate firmware crash: %d\n", ret);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
@ -839,7 +817,7 @@ static int ath10k_debug_htt_stats_req(struct ath10k *ar)
|
||||
ret = ath10k_htt_h2t_stats_req(&ar->htt, ar->debug.htt_stats_mask,
|
||||
cookie);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to send htt stats request: %d\n", ret);
|
||||
ath10k_warn(ar, "failed to send htt stats request: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1013,7 +991,7 @@ static ssize_t ath10k_write_fw_dbglog(struct file *file,
|
||||
if (ar->state == ATH10K_STATE_ON) {
|
||||
ret = ath10k_wmi_dbglog_cfg(ar, ar->debug.fw_dbglog_mask);
|
||||
if (ret) {
|
||||
ath10k_warn("dbglog cfg failed from debugfs: %d\n",
|
||||
ath10k_warn(ar, "dbglog cfg failed from debugfs: %d\n",
|
||||
ret);
|
||||
goto exit;
|
||||
}
|
||||
@ -1044,13 +1022,14 @@ int ath10k_debug_start(struct ath10k *ar)
|
||||
ret = ath10k_debug_htt_stats_req(ar);
|
||||
if (ret)
|
||||
/* continue normally anyway, this isn't serious */
|
||||
ath10k_warn("failed to start htt stats workqueue: %d\n", ret);
|
||||
ath10k_warn(ar, "failed to start htt stats workqueue: %d\n",
|
||||
ret);
|
||||
|
||||
if (ar->debug.fw_dbglog_mask) {
|
||||
ret = ath10k_wmi_dbglog_cfg(ar, ar->debug.fw_dbglog_mask);
|
||||
if (ret)
|
||||
/* not serious */
|
||||
ath10k_warn("failed to enable dbglog during start: %d",
|
||||
ath10k_warn(ar, "failed to enable dbglog during start: %d",
|
||||
ret);
|
||||
}
|
||||
|
||||
@ -1230,7 +1209,8 @@ void ath10k_debug_destroy(struct ath10k *ar)
|
||||
#endif /* CONFIG_ATH10K_DEBUGFS */
|
||||
|
||||
#ifdef CONFIG_ATH10K_DEBUG
|
||||
void ath10k_dbg(enum ath10k_debug_mask mask, const char *fmt, ...)
|
||||
void ath10k_dbg(struct ath10k *ar, enum ath10k_debug_mask mask,
|
||||
const char *fmt, ...)
|
||||
{
|
||||
struct va_format vaf;
|
||||
va_list args;
|
||||
@ -1241,7 +1221,7 @@ void ath10k_dbg(enum ath10k_debug_mask mask, const char *fmt, ...)
|
||||
vaf.va = &args;
|
||||
|
||||
if (ath10k_debug_mask & mask)
|
||||
ath10k_printk(KERN_DEBUG, "%pV", &vaf);
|
||||
dev_printk(KERN_DEBUG, ar->dev, "%pV", &vaf);
|
||||
|
||||
trace_ath10k_log_dbg(mask, &vaf);
|
||||
|
||||
@ -1249,13 +1229,14 @@ void ath10k_dbg(enum ath10k_debug_mask mask, const char *fmt, ...)
|
||||
}
|
||||
EXPORT_SYMBOL(ath10k_dbg);
|
||||
|
||||
void ath10k_dbg_dump(enum ath10k_debug_mask mask,
|
||||
void ath10k_dbg_dump(struct ath10k *ar,
|
||||
enum ath10k_debug_mask mask,
|
||||
const char *msg, const char *prefix,
|
||||
const void *buf, size_t len)
|
||||
{
|
||||
if (ath10k_debug_mask & mask) {
|
||||
if (msg)
|
||||
ath10k_dbg(mask, "%s\n", msg);
|
||||
ath10k_dbg(ar, mask, "%s\n", msg);
|
||||
|
||||
print_hex_dump_bytes(prefix, DUMP_PREFIX_OFFSET, buf, len);
|
||||
}
|
||||
|
@ -39,9 +39,9 @@ enum ath10k_debug_mask {
|
||||
|
||||
extern unsigned int ath10k_debug_mask;
|
||||
|
||||
__printf(1, 2) int ath10k_info(const char *fmt, ...);
|
||||
__printf(1, 2) int ath10k_err(const char *fmt, ...);
|
||||
__printf(1, 2) int ath10k_warn(const char *fmt, ...);
|
||||
__printf(2, 3) int ath10k_info(struct ath10k *ar, const char *fmt, ...);
|
||||
__printf(2, 3) int ath10k_err(struct ath10k *ar, const char *fmt, ...);
|
||||
__printf(2, 3) int ath10k_warn(struct ath10k *ar, const char *fmt, ...);
|
||||
void ath10k_print_driver_info(struct ath10k *ar);
|
||||
|
||||
#ifdef CONFIG_ATH10K_DEBUGFS
|
||||
@ -107,20 +107,24 @@ ath10k_debug_get_new_fw_crash_data(struct ath10k *ar)
|
||||
#endif /* CONFIG_ATH10K_DEBUGFS */
|
||||
|
||||
#ifdef CONFIG_ATH10K_DEBUG
|
||||
__printf(2, 3) void ath10k_dbg(enum ath10k_debug_mask mask,
|
||||
__printf(3, 4) void ath10k_dbg(struct ath10k *ar,
|
||||
enum ath10k_debug_mask mask,
|
||||
const char *fmt, ...);
|
||||
void ath10k_dbg_dump(enum ath10k_debug_mask mask,
|
||||
void ath10k_dbg_dump(struct ath10k *ar,
|
||||
enum ath10k_debug_mask mask,
|
||||
const char *msg, const char *prefix,
|
||||
const void *buf, size_t len);
|
||||
#else /* CONFIG_ATH10K_DEBUG */
|
||||
|
||||
static inline int ath10k_dbg(enum ath10k_debug_mask dbg_mask,
|
||||
static inline int ath10k_dbg(struct ath10k *ar,
|
||||
enum ath10k_debug_mask dbg_mask,
|
||||
const char *fmt, ...)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void ath10k_dbg_dump(enum ath10k_debug_mask mask,
|
||||
static inline void ath10k_dbg_dump(struct ath10k *ar,
|
||||
enum ath10k_debug_mask mask,
|
||||
const char *msg, const char *prefix,
|
||||
const void *buf, size_t len)
|
||||
{
|
||||
|
@ -46,7 +46,7 @@ static struct sk_buff *ath10k_htc_build_tx_ctrl_skb(void *ar)
|
||||
|
||||
skb = dev_alloc_skb(ATH10K_HTC_CONTROL_BUFFER_SIZE);
|
||||
if (!skb) {
|
||||
ath10k_warn("Unable to allocate ctrl skb\n");
|
||||
ath10k_warn(ar, "Unable to allocate ctrl skb\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -56,7 +56,7 @@ static struct sk_buff *ath10k_htc_build_tx_ctrl_skb(void *ar)
|
||||
skb_cb = ATH10K_SKB_CB(skb);
|
||||
memset(skb_cb, 0, sizeof(*skb_cb));
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTC, "%s: skb %p\n", __func__, skb);
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: skb %p\n", __func__, skb);
|
||||
return skb;
|
||||
}
|
||||
|
||||
@ -72,13 +72,15 @@ static inline void ath10k_htc_restore_tx_skb(struct ath10k_htc *htc,
|
||||
static void ath10k_htc_notify_tx_completion(struct ath10k_htc_ep *ep,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
ath10k_dbg(ATH10K_DBG_HTC, "%s: ep %d skb %p\n", __func__,
|
||||
struct ath10k *ar = ep->htc->ar;
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC, "%s: ep %d skb %p\n", __func__,
|
||||
ep->eid, skb);
|
||||
|
||||
ath10k_htc_restore_tx_skb(ep->htc, skb);
|
||||
|
||||
if (!ep->ep_ops.ep_tx_complete) {
|
||||
ath10k_warn("no tx handler for eid %d\n", ep->eid);
|
||||
ath10k_warn(ar, "no tx handler for eid %d\n", ep->eid);
|
||||
dev_kfree_skb_any(skb);
|
||||
return;
|
||||
}
|
||||
@ -89,12 +91,14 @@ static void ath10k_htc_notify_tx_completion(struct ath10k_htc_ep *ep,
|
||||
/* assumes tx_lock is held */
|
||||
static bool ath10k_htc_ep_need_credit_update(struct ath10k_htc_ep *ep)
|
||||
{
|
||||
struct ath10k *ar = ep->htc->ar;
|
||||
|
||||
if (!ep->tx_credit_flow_enabled)
|
||||
return false;
|
||||
if (ep->tx_credits >= ep->tx_credits_per_max_message)
|
||||
return false;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTC, "HTC: endpoint %d needs credit update\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC, "HTC: endpoint %d needs credit update\n",
|
||||
ep->eid);
|
||||
return true;
|
||||
}
|
||||
@ -123,6 +127,7 @@ int ath10k_htc_send(struct ath10k_htc *htc,
|
||||
enum ath10k_htc_ep_id eid,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ath10k *ar = htc->ar;
|
||||
struct ath10k_htc_ep *ep = &htc->endpoint[eid];
|
||||
struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(skb);
|
||||
struct ath10k_hif_sg_item sg_item;
|
||||
@ -134,7 +139,7 @@ int ath10k_htc_send(struct ath10k_htc *htc,
|
||||
return -ECOMM;
|
||||
|
||||
if (eid >= ATH10K_HTC_EP_COUNT) {
|
||||
ath10k_warn("Invalid endpoint id: %d\n", eid);
|
||||
ath10k_warn(ar, "Invalid endpoint id: %d\n", eid);
|
||||
return -ENOENT;
|
||||
}
|
||||
|
||||
@ -149,7 +154,7 @@ int ath10k_htc_send(struct ath10k_htc *htc,
|
||||
goto err_pull;
|
||||
}
|
||||
ep->tx_credits -= credits;
|
||||
ath10k_dbg(ATH10K_DBG_HTC,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC,
|
||||
"htc ep %d consumed %d credits (total %d)\n",
|
||||
eid, credits, ep->tx_credits);
|
||||
spin_unlock_bh(&htc->tx_lock);
|
||||
@ -180,7 +185,7 @@ err_credits:
|
||||
if (ep->tx_credit_flow_enabled) {
|
||||
spin_lock_bh(&htc->tx_lock);
|
||||
ep->tx_credits += credits;
|
||||
ath10k_dbg(ATH10K_DBG_HTC,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC,
|
||||
"htc ep %d reverted %d credits back (total %d)\n",
|
||||
eid, credits, ep->tx_credits);
|
||||
spin_unlock_bh(&htc->tx_lock);
|
||||
@ -219,11 +224,12 @@ ath10k_htc_process_credit_report(struct ath10k_htc *htc,
|
||||
int len,
|
||||
enum ath10k_htc_ep_id eid)
|
||||
{
|
||||
struct ath10k *ar = htc->ar;
|
||||
struct ath10k_htc_ep *ep;
|
||||
int i, n_reports;
|
||||
|
||||
if (len % sizeof(*report))
|
||||
ath10k_warn("Uneven credit report len %d", len);
|
||||
ath10k_warn(ar, "Uneven credit report len %d", len);
|
||||
|
||||
n_reports = len / sizeof(*report);
|
||||
|
||||
@ -235,7 +241,7 @@ ath10k_htc_process_credit_report(struct ath10k_htc *htc,
|
||||
ep = &htc->endpoint[report->eid];
|
||||
ep->tx_credits += report->credits;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTC, "htc ep %d got %d credits (total %d)\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC, "htc ep %d got %d credits (total %d)\n",
|
||||
report->eid, report->credits, ep->tx_credits);
|
||||
|
||||
if (ep->ep_ops.ep_tx_credits) {
|
||||
@ -252,6 +258,7 @@ static int ath10k_htc_process_trailer(struct ath10k_htc *htc,
|
||||
int length,
|
||||
enum ath10k_htc_ep_id src_eid)
|
||||
{
|
||||
struct ath10k *ar = htc->ar;
|
||||
int status = 0;
|
||||
struct ath10k_htc_record *record;
|
||||
u8 *orig_buffer;
|
||||
@ -271,7 +278,7 @@ static int ath10k_htc_process_trailer(struct ath10k_htc *htc,
|
||||
|
||||
if (record->hdr.len > length) {
|
||||
/* no room left in buffer for record */
|
||||
ath10k_warn("Invalid record length: %d\n",
|
||||
ath10k_warn(ar, "Invalid record length: %d\n",
|
||||
record->hdr.len);
|
||||
status = -EINVAL;
|
||||
break;
|
||||
@ -281,7 +288,7 @@ static int ath10k_htc_process_trailer(struct ath10k_htc *htc,
|
||||
case ATH10K_HTC_RECORD_CREDITS:
|
||||
len = sizeof(struct ath10k_htc_credit_report);
|
||||
if (record->hdr.len < len) {
|
||||
ath10k_warn("Credit report too long\n");
|
||||
ath10k_warn(ar, "Credit report too long\n");
|
||||
status = -EINVAL;
|
||||
break;
|
||||
}
|
||||
@ -291,7 +298,7 @@ static int ath10k_htc_process_trailer(struct ath10k_htc *htc,
|
||||
src_eid);
|
||||
break;
|
||||
default:
|
||||
ath10k_warn("Unhandled record: id:%d length:%d\n",
|
||||
ath10k_warn(ar, "Unhandled record: id:%d length:%d\n",
|
||||
record->hdr.id, record->hdr.len);
|
||||
break;
|
||||
}
|
||||
@ -305,7 +312,7 @@ static int ath10k_htc_process_trailer(struct ath10k_htc *htc,
|
||||
}
|
||||
|
||||
if (status)
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTC, "htc rx bad trailer", "",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTC, "htc rx bad trailer", "",
|
||||
orig_buffer, orig_length);
|
||||
|
||||
return status;
|
||||
@ -331,8 +338,8 @@ static int ath10k_htc_rx_completion_handler(struct ath10k *ar,
|
||||
eid = hdr->eid;
|
||||
|
||||
if (eid >= ATH10K_HTC_EP_COUNT) {
|
||||
ath10k_warn("HTC Rx: invalid eid %d\n", eid);
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTC, "htc bad header", "",
|
||||
ath10k_warn(ar, "HTC Rx: invalid eid %d\n", eid);
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTC, "htc bad header", "",
|
||||
hdr, sizeof(*hdr));
|
||||
status = -EINVAL;
|
||||
goto out;
|
||||
@ -352,19 +359,19 @@ static int ath10k_htc_rx_completion_handler(struct ath10k *ar,
|
||||
payload_len = __le16_to_cpu(hdr->len);
|
||||
|
||||
if (payload_len + sizeof(*hdr) > ATH10K_HTC_MAX_LEN) {
|
||||
ath10k_warn("HTC rx frame too long, len: %zu\n",
|
||||
ath10k_warn(ar, "HTC rx frame too long, len: %zu\n",
|
||||
payload_len + sizeof(*hdr));
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTC, "htc bad rx pkt len", "",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTC, "htc bad rx pkt len", "",
|
||||
hdr, sizeof(*hdr));
|
||||
status = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
if (skb->len < payload_len) {
|
||||
ath10k_dbg(ATH10K_DBG_HTC,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC,
|
||||
"HTC Rx: insufficient length, got %d, expected %d\n",
|
||||
skb->len, payload_len);
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTC, "htc bad rx pkt len",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTC, "htc bad rx pkt len",
|
||||
"", hdr, sizeof(*hdr));
|
||||
status = -EINVAL;
|
||||
goto out;
|
||||
@ -380,7 +387,7 @@ static int ath10k_htc_rx_completion_handler(struct ath10k *ar,
|
||||
|
||||
if ((trailer_len < min_len) ||
|
||||
(trailer_len > payload_len)) {
|
||||
ath10k_warn("Invalid trailer length: %d\n",
|
||||
ath10k_warn(ar, "Invalid trailer length: %d\n",
|
||||
trailer_len);
|
||||
status = -EPROTO;
|
||||
goto out;
|
||||
@ -413,7 +420,7 @@ static int ath10k_htc_rx_completion_handler(struct ath10k *ar,
|
||||
* this is a fatal error, target should not be
|
||||
* sending unsolicited messages on the ep 0
|
||||
*/
|
||||
ath10k_warn("HTC rx ctrl still processing\n");
|
||||
ath10k_warn(ar, "HTC rx ctrl still processing\n");
|
||||
status = -EINVAL;
|
||||
complete(&htc->ctl_resp);
|
||||
goto out;
|
||||
@ -434,7 +441,7 @@ static int ath10k_htc_rx_completion_handler(struct ath10k *ar,
|
||||
goto out;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTC, "htc rx completion ep %d skb %p\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC, "htc rx completion ep %d skb %p\n",
|
||||
eid, skb);
|
||||
ep->ep_ops.ep_rx_complete(ar, skb);
|
||||
|
||||
@ -451,7 +458,7 @@ static void ath10k_htc_control_rx_complete(struct ath10k *ar,
|
||||
{
|
||||
/* This is unexpected. FW is not supposed to send regular rx on this
|
||||
* endpoint. */
|
||||
ath10k_warn("unexpected htc rx\n");
|
||||
ath10k_warn(ar, "unexpected htc rx\n");
|
||||
kfree_skb(skb);
|
||||
}
|
||||
|
||||
@ -538,6 +545,7 @@ static u8 ath10k_htc_get_credit_allocation(struct ath10k_htc *htc,
|
||||
|
||||
int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
{
|
||||
struct ath10k *ar = htc->ar;
|
||||
int i, status = 0;
|
||||
struct ath10k_htc_svc_conn_req conn_req;
|
||||
struct ath10k_htc_svc_conn_resp conn_resp;
|
||||
@ -555,7 +563,7 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
* iomap writes unmasking PCI CE irqs aren't propagated
|
||||
* properly in KVM PCI-passthrough sometimes.
|
||||
*/
|
||||
ath10k_warn("failed to receive control response completion, polling..\n");
|
||||
ath10k_warn(ar, "failed to receive control response completion, polling..\n");
|
||||
|
||||
for (i = 0; i < CE_COUNT; i++)
|
||||
ath10k_hif_send_complete_check(htc->ar, i, 1);
|
||||
@ -568,12 +576,12 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
}
|
||||
|
||||
if (status < 0) {
|
||||
ath10k_err("ctl_resp never came in (%d)\n", status);
|
||||
ath10k_err(ar, "ctl_resp never came in (%d)\n", status);
|
||||
return status;
|
||||
}
|
||||
|
||||
if (htc->control_resp_len < sizeof(msg->hdr) + sizeof(msg->ready)) {
|
||||
ath10k_err("Invalid HTC ready msg len:%d\n",
|
||||
ath10k_err(ar, "Invalid HTC ready msg len:%d\n",
|
||||
htc->control_resp_len);
|
||||
return -ECOMM;
|
||||
}
|
||||
@ -584,21 +592,21 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
credit_size = __le16_to_cpu(msg->ready.credit_size);
|
||||
|
||||
if (message_id != ATH10K_HTC_MSG_READY_ID) {
|
||||
ath10k_err("Invalid HTC ready msg: 0x%x\n", message_id);
|
||||
ath10k_err(ar, "Invalid HTC ready msg: 0x%x\n", message_id);
|
||||
return -ECOMM;
|
||||
}
|
||||
|
||||
htc->total_transmit_credits = credit_count;
|
||||
htc->target_credit_size = credit_size;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTC,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC,
|
||||
"Target ready! transmit resources: %d size:%d\n",
|
||||
htc->total_transmit_credits,
|
||||
htc->target_credit_size);
|
||||
|
||||
if ((htc->total_transmit_credits == 0) ||
|
||||
(htc->target_credit_size == 0)) {
|
||||
ath10k_err("Invalid credit size received\n");
|
||||
ath10k_err(ar, "Invalid credit size received\n");
|
||||
return -ECOMM;
|
||||
}
|
||||
|
||||
@ -615,7 +623,8 @@ int ath10k_htc_wait_target(struct ath10k_htc *htc)
|
||||
/* connect fake service */
|
||||
status = ath10k_htc_connect_service(htc, &conn_req, &conn_resp);
|
||||
if (status) {
|
||||
ath10k_err("could not connect to htc service (%d)\n", status);
|
||||
ath10k_err(ar, "could not connect to htc service (%d)\n",
|
||||
status);
|
||||
return status;
|
||||
}
|
||||
|
||||
@ -626,6 +635,7 @@ int ath10k_htc_connect_service(struct ath10k_htc *htc,
|
||||
struct ath10k_htc_svc_conn_req *conn_req,
|
||||
struct ath10k_htc_svc_conn_resp *conn_resp)
|
||||
{
|
||||
struct ath10k *ar = htc->ar;
|
||||
struct ath10k_htc_msg *msg;
|
||||
struct ath10k_htc_conn_svc *req_msg;
|
||||
struct ath10k_htc_conn_svc_response resp_msg_dummy;
|
||||
@ -651,13 +661,13 @@ int ath10k_htc_connect_service(struct ath10k_htc *htc,
|
||||
tx_alloc = ath10k_htc_get_credit_allocation(htc,
|
||||
conn_req->service_id);
|
||||
if (!tx_alloc)
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"boot htc service %s does not allocate target credits\n",
|
||||
htc_service_name(conn_req->service_id));
|
||||
|
||||
skb = ath10k_htc_build_tx_ctrl_skb(htc->ar);
|
||||
if (!skb) {
|
||||
ath10k_err("Failed to allocate HTC packet\n");
|
||||
ath10k_err(ar, "Failed to allocate HTC packet\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
@ -695,7 +705,7 @@ int ath10k_htc_connect_service(struct ath10k_htc *htc,
|
||||
if (status <= 0) {
|
||||
if (status == 0)
|
||||
status = -ETIMEDOUT;
|
||||
ath10k_err("Service connect timeout: %d\n", status);
|
||||
ath10k_err(ar, "Service connect timeout: %d\n", status);
|
||||
return status;
|
||||
}
|
||||
|
||||
@ -708,11 +718,11 @@ int ath10k_htc_connect_service(struct ath10k_htc *htc,
|
||||
if ((message_id != ATH10K_HTC_MSG_CONNECT_SERVICE_RESP_ID) ||
|
||||
(htc->control_resp_len < sizeof(msg->hdr) +
|
||||
sizeof(msg->connect_service_response))) {
|
||||
ath10k_err("Invalid resp message ID 0x%x", message_id);
|
||||
ath10k_err(ar, "Invalid resp message ID 0x%x", message_id);
|
||||
return -EPROTO;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTC,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC,
|
||||
"HTC Service %s connect response: status: 0x%x, assigned ep: 0x%x\n",
|
||||
htc_service_name(service_id),
|
||||
resp_msg->status, resp_msg->eid);
|
||||
@ -721,7 +731,7 @@ int ath10k_htc_connect_service(struct ath10k_htc *htc,
|
||||
|
||||
/* check response status */
|
||||
if (resp_msg->status != ATH10K_HTC_CONN_SVC_STATUS_SUCCESS) {
|
||||
ath10k_err("HTC Service %s connect request failed: 0x%x)\n",
|
||||
ath10k_err(ar, "HTC Service %s connect request failed: 0x%x)\n",
|
||||
htc_service_name(service_id),
|
||||
resp_msg->status);
|
||||
return -EPROTO;
|
||||
@ -772,18 +782,18 @@ setup:
|
||||
if (status)
|
||||
return status;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"boot htc service '%s' ul pipe %d dl pipe %d eid %d ready\n",
|
||||
htc_service_name(ep->service_id), ep->ul_pipe_id,
|
||||
ep->dl_pipe_id, ep->eid);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"boot htc ep %d ul polled %d dl polled %d\n",
|
||||
ep->eid, ep->ul_is_polled, ep->dl_is_polled);
|
||||
|
||||
if (disable_credit_flow_ctrl && ep->tx_credit_flow_enabled) {
|
||||
ep->tx_credit_flow_enabled = false;
|
||||
ath10k_dbg(ATH10K_DBG_BOOT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT,
|
||||
"boot htc service '%s' eid %d TX flow control disabled\n",
|
||||
htc_service_name(ep->service_id), assigned_eid);
|
||||
}
|
||||
@ -791,13 +801,13 @@ setup:
|
||||
return status;
|
||||
}
|
||||
|
||||
struct sk_buff *ath10k_htc_alloc_skb(int size)
|
||||
struct sk_buff *ath10k_htc_alloc_skb(struct ath10k *ar, int size)
|
||||
{
|
||||
struct sk_buff *skb;
|
||||
|
||||
skb = dev_alloc_skb(size + sizeof(struct ath10k_htc_hdr));
|
||||
if (!skb) {
|
||||
ath10k_warn("could not allocate HTC tx skb\n");
|
||||
ath10k_warn(ar, "could not allocate HTC tx skb\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -805,13 +815,14 @@ struct sk_buff *ath10k_htc_alloc_skb(int size)
|
||||
|
||||
/* FW/HTC requires 4-byte aligned streams */
|
||||
if (!IS_ALIGNED((unsigned long)skb->data, 4))
|
||||
ath10k_warn("Unaligned HTC tx skb\n");
|
||||
ath10k_warn(ar, "Unaligned HTC tx skb\n");
|
||||
|
||||
return skb;
|
||||
}
|
||||
|
||||
int ath10k_htc_start(struct ath10k_htc *htc)
|
||||
{
|
||||
struct ath10k *ar = htc->ar;
|
||||
struct sk_buff *skb;
|
||||
int status = 0;
|
||||
struct ath10k_htc_msg *msg;
|
||||
@ -827,7 +838,7 @@ int ath10k_htc_start(struct ath10k_htc *htc)
|
||||
msg->hdr.message_id =
|
||||
__cpu_to_le16(ATH10K_HTC_MSG_SETUP_COMPLETE_EX_ID);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTC, "HTC is using TX credit flow control\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTC, "HTC is using TX credit flow control\n");
|
||||
|
||||
status = ath10k_htc_send(htc, ATH10K_HTC_EP_0, skb);
|
||||
if (status) {
|
||||
|
@ -355,6 +355,6 @@ int ath10k_htc_connect_service(struct ath10k_htc *htc,
|
||||
struct ath10k_htc_svc_conn_resp *conn_resp);
|
||||
int ath10k_htc_send(struct ath10k_htc *htc, enum ath10k_htc_ep_id eid,
|
||||
struct sk_buff *packet);
|
||||
struct sk_buff *ath10k_htc_alloc_skb(int size);
|
||||
struct sk_buff *ath10k_htc_alloc_skb(struct ath10k *ar, int size);
|
||||
|
||||
#endif
|
||||
|
@ -74,12 +74,14 @@ int ath10k_htt_init(struct ath10k *ar)
|
||||
|
||||
static int ath10k_htt_verify_version(struct ath10k_htt *htt)
|
||||
{
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "htt target version %d.%d\n",
|
||||
struct ath10k *ar = htt->ar;
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt target version %d.%d\n",
|
||||
htt->target_version_major, htt->target_version_minor);
|
||||
|
||||
if (htt->target_version_major != 2 &&
|
||||
htt->target_version_major != 3) {
|
||||
ath10k_err("unsupported htt major version %d. supported versions are 2 and 3\n",
|
||||
ath10k_err(ar, "unsupported htt major version %d. supported versions are 2 and 3\n",
|
||||
htt->target_version_major);
|
||||
return -ENOTSUPP;
|
||||
}
|
||||
@ -89,6 +91,7 @@ static int ath10k_htt_verify_version(struct ath10k_htt *htt)
|
||||
|
||||
int ath10k_htt_setup(struct ath10k_htt *htt)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
int status;
|
||||
|
||||
init_completion(&htt->target_version_received);
|
||||
@ -100,7 +103,7 @@ int ath10k_htt_setup(struct ath10k_htt *htt)
|
||||
status = wait_for_completion_timeout(&htt->target_version_received,
|
||||
HTT_TARGET_VERSION_TIMEOUT_HZ);
|
||||
if (status <= 0) {
|
||||
ath10k_warn("htt version request timed out\n");
|
||||
ath10k_warn(ar, "htt version request timed out\n");
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
|
@ -271,13 +271,14 @@ void ath10k_htt_rx_free(struct ath10k_htt *htt)
|
||||
|
||||
static inline struct sk_buff *ath10k_htt_rx_netbuf_pop(struct ath10k_htt *htt)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
int idx;
|
||||
struct sk_buff *msdu;
|
||||
|
||||
lockdep_assert_held(&htt->rx_ring.lock);
|
||||
|
||||
if (htt->rx_ring.fill_cnt == 0) {
|
||||
ath10k_warn("tried to pop sk_buff from an empty rx ring\n");
|
||||
ath10k_warn(ar, "tried to pop sk_buff from an empty rx ring\n");
|
||||
return NULL;
|
||||
}
|
||||
|
||||
@ -311,6 +312,7 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
||||
struct sk_buff **tail_msdu,
|
||||
u32 *attention)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
int msdu_len, msdu_chaining = 0;
|
||||
struct sk_buff *msdu;
|
||||
struct htt_rx_desc *rx_desc;
|
||||
@ -318,7 +320,7 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
||||
lockdep_assert_held(&htt->rx_ring.lock);
|
||||
|
||||
if (htt->rx_confused) {
|
||||
ath10k_warn("htt is confused. refusing rx\n");
|
||||
ath10k_warn(ar, "htt is confused. refusing rx\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
@ -331,7 +333,7 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
||||
msdu->len + skb_tailroom(msdu),
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx pop: ",
|
||||
msdu->data, msdu->len + skb_tailroom(msdu));
|
||||
|
||||
rx_desc = (struct htt_rx_desc *)msdu->data;
|
||||
@ -354,7 +356,7 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
||||
ath10k_htt_rx_free_msdu_chain(*head_msdu);
|
||||
*head_msdu = NULL;
|
||||
msdu = NULL;
|
||||
ath10k_err("htt rx stopped. cannot recover\n");
|
||||
ath10k_err(ar, "htt rx stopped. cannot recover\n");
|
||||
htt->rx_confused = true;
|
||||
break;
|
||||
}
|
||||
@ -429,7 +431,7 @@ static int ath10k_htt_rx_amsdu_pop(struct ath10k_htt *htt,
|
||||
next->len + skb_tailroom(next),
|
||||
DMA_FROM_DEVICE);
|
||||
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL,
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL,
|
||||
"htt rx chained: ", next->data,
|
||||
next->len + skb_tailroom(next));
|
||||
|
||||
@ -483,13 +485,14 @@ static void ath10k_htt_rx_replenish_task(unsigned long ptr)
|
||||
|
||||
int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
dma_addr_t paddr;
|
||||
void *vaddr;
|
||||
struct timer_list *timer = &htt->rx_ring.refill_retry_timer;
|
||||
|
||||
htt->rx_ring.size = ath10k_htt_rx_ring_size(htt);
|
||||
if (!is_power_of_2(htt->rx_ring.size)) {
|
||||
ath10k_warn("htt rx ring size is not power of 2\n");
|
||||
ath10k_warn(ar, "htt rx ring size is not power of 2\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -550,7 +553,7 @@ int ath10k_htt_rx_alloc(struct ath10k_htt *htt)
|
||||
tasklet_init(&htt->txrx_compl_task, ath10k_htt_txrx_compl_task,
|
||||
(unsigned long)htt);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt rx ring size %d fill_level %d\n",
|
||||
htt->rx_ring.size, htt->rx_ring.fill_level);
|
||||
return 0;
|
||||
|
||||
@ -572,7 +575,8 @@ err_netbuf:
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
|
||||
static int ath10k_htt_rx_crypto_param_len(struct ath10k *ar,
|
||||
enum htt_rx_mpdu_encrypt_type type)
|
||||
{
|
||||
switch (type) {
|
||||
case HTT_RX_MPDU_ENCRYPT_WEP40:
|
||||
@ -588,11 +592,12 @@ static int ath10k_htt_rx_crypto_param_len(enum htt_rx_mpdu_encrypt_type type)
|
||||
return 0;
|
||||
}
|
||||
|
||||
ath10k_warn("unknown encryption type %d\n", type);
|
||||
ath10k_warn(ar, "unknown encryption type %d\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
|
||||
static int ath10k_htt_rx_crypto_tail_len(struct ath10k *ar,
|
||||
enum htt_rx_mpdu_encrypt_type type)
|
||||
{
|
||||
switch (type) {
|
||||
case HTT_RX_MPDU_ENCRYPT_NONE:
|
||||
@ -608,7 +613,7 @@ static int ath10k_htt_rx_crypto_tail_len(enum htt_rx_mpdu_encrypt_type type)
|
||||
return 8;
|
||||
}
|
||||
|
||||
ath10k_warn("unknown encryption type %d\n", type);
|
||||
ath10k_warn(ar, "unknown encryption type %d\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -859,7 +864,7 @@ static void ath10k_process_rx(struct ath10k *ar,
|
||||
status = IEEE80211_SKB_RXCB(skb);
|
||||
*status = *rx_status;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_DATA,
|
||||
ath10k_dbg(ar, ATH10K_DBG_DATA,
|
||||
"rx skb %p len %u peer %pM %s %s sn %u %s%s%s%s%s %srate_idx %u vht_nss %u freq %u band %u flag 0x%x fcs-err %i mic-err %i amsdu-more %i\n",
|
||||
skb,
|
||||
skb->len,
|
||||
@ -881,7 +886,7 @@ static void ath10k_process_rx(struct ath10k *ar,
|
||||
!!(status->flag & RX_FLAG_FAILED_FCS_CRC),
|
||||
!!(status->flag & RX_FLAG_MMIC_ERROR),
|
||||
!!(status->flag & RX_FLAG_AMSDU_MORE));
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "rx skb: ",
|
||||
skb->data, skb->len);
|
||||
|
||||
ieee80211_rx(ar->hw, skb);
|
||||
@ -897,6 +902,7 @@ static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
|
||||
struct ieee80211_rx_status *rx_status,
|
||||
struct sk_buff *skb_in)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct htt_rx_desc *rxd;
|
||||
struct sk_buff *skb = skb_in;
|
||||
struct sk_buff *first;
|
||||
@ -930,8 +936,8 @@ static void ath10k_htt_rx_amsdu(struct ath10k_htt *htt,
|
||||
/* First frame in an A-MSDU chain has more decapped data. */
|
||||
if (skb == first) {
|
||||
len = round_up(ieee80211_hdrlen(hdr->frame_control), 4);
|
||||
len += round_up(ath10k_htt_rx_crypto_param_len(enctype),
|
||||
4);
|
||||
len += round_up(ath10k_htt_rx_crypto_param_len(ar,
|
||||
enctype), 4);
|
||||
decap_hdr += len;
|
||||
}
|
||||
|
||||
@ -1006,6 +1012,7 @@ static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
|
||||
struct ieee80211_rx_status *rx_status,
|
||||
struct sk_buff *skb)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct htt_rx_desc *rxd;
|
||||
struct ieee80211_hdr *hdr;
|
||||
enum rx_msdu_decap_format fmt;
|
||||
@ -1015,7 +1022,7 @@ static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
|
||||
|
||||
/* This shouldn't happen. If it does than it may be a FW bug. */
|
||||
if (skb->next) {
|
||||
ath10k_warn("htt rx received chained non A-MSDU frame\n");
|
||||
ath10k_warn(ar, "htt rx received chained non A-MSDU frame\n");
|
||||
ath10k_htt_rx_free_msdu_chain(skb->next);
|
||||
skb->next = NULL;
|
||||
}
|
||||
@ -1052,7 +1059,8 @@ static void ath10k_htt_rx_msdu(struct ath10k_htt *htt,
|
||||
|
||||
rfc1042 = hdr;
|
||||
rfc1042 += roundup(hdr_len, 4);
|
||||
rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(enctype), 4);
|
||||
rfc1042 += roundup(ath10k_htt_rx_crypto_param_len(ar,
|
||||
enctype), 4);
|
||||
|
||||
skb_pull(skb, sizeof(struct ethhdr));
|
||||
memcpy(skb_push(skb, sizeof(struct rfc1042_hdr)),
|
||||
@ -1161,27 +1169,29 @@ static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
|
||||
bool channel_set,
|
||||
u32 attention)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
|
||||
if (head->len == 0) {
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx dropping due to zero-len\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
if (attention & RX_ATTENTION_FLAGS_DECRYPT_ERR) {
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx dropping due to decrypt-err\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
if (!channel_set) {
|
||||
ath10k_warn("no channel configured; ignoring frame!\n");
|
||||
ath10k_warn(ar, "no channel configured; ignoring frame!\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
/* Skip mgmt frames while we handle this in WMI */
|
||||
if (status == HTT_RX_IND_MPDU_STATUS_MGMT_CTRL ||
|
||||
attention & RX_ATTENTION_FLAGS_MGMT_TYPE) {
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx mgmt ctrl\n");
|
||||
return false;
|
||||
}
|
||||
|
||||
@ -1189,14 +1199,14 @@ static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
|
||||
status != HTT_RX_IND_MPDU_STATUS_TKIP_MIC_ERR &&
|
||||
status != HTT_RX_IND_MPDU_STATUS_ERR_INV_PEER &&
|
||||
!htt->ar->monitor_started) {
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx ignoring frame w/ status %d\n",
|
||||
status);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (test_bit(ATH10K_CAC_RUNNING, &htt->ar->dev_flags)) {
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx CAC running\n");
|
||||
return false;
|
||||
}
|
||||
@ -1207,6 +1217,7 @@ static bool ath10k_htt_rx_amsdu_allowed(struct ath10k_htt *htt,
|
||||
static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
|
||||
struct htt_rx_indication *rx)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct ieee80211_rx_status *rx_status = &htt->rx_status;
|
||||
struct htt_rx_indication_mpdu_range *mpdu_ranges;
|
||||
struct htt_rx_desc *rxd;
|
||||
@ -1252,7 +1263,7 @@ static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
|
||||
rx_status);
|
||||
}
|
||||
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx ind: ",
|
||||
rx, sizeof(*rx) +
|
||||
(sizeof(struct htt_rx_indication_mpdu_range) *
|
||||
num_mpdu_ranges));
|
||||
@ -1274,7 +1285,7 @@ static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
|
||||
&attention);
|
||||
|
||||
if (ret < 0) {
|
||||
ath10k_warn("failed to pop amsdu from htt rx ring %d\n",
|
||||
ath10k_warn(ar, "failed to pop amsdu from htt rx ring %d\n",
|
||||
ret);
|
||||
ath10k_htt_rx_free_msdu_chain(msdu_head);
|
||||
continue;
|
||||
@ -1323,6 +1334,7 @@ static void ath10k_htt_rx_handler(struct ath10k_htt *htt,
|
||||
static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
|
||||
struct htt_rx_fragment_indication *frag)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct sk_buff *msdu_head, *msdu_tail;
|
||||
enum htt_rx_mpdu_encrypt_type enctype;
|
||||
struct htt_rx_desc *rxd;
|
||||
@ -1349,10 +1361,10 @@ static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
|
||||
&attention);
|
||||
spin_unlock_bh(&htt->rx_ring.lock);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT_DUMP, "htt rx frag ahead\n");
|
||||
|
||||
if (ret) {
|
||||
ath10k_warn("failed to pop amsdu from httr rx ring for fragmented rx %d\n",
|
||||
ath10k_warn(ar, "failed to pop amsdu from httr rx ring for fragmented rx %d\n",
|
||||
ret);
|
||||
ath10k_htt_rx_free_msdu_chain(msdu_head);
|
||||
return;
|
||||
@ -1369,7 +1381,7 @@ static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
|
||||
RX_MSDU_START_INFO1_DECAP_FORMAT);
|
||||
|
||||
if (fmt != RX_MSDU_DECAP_RAW) {
|
||||
ath10k_warn("we dont support non-raw fragmented rx yet\n");
|
||||
ath10k_warn(ar, "we dont support non-raw fragmented rx yet\n");
|
||||
dev_kfree_skb_any(msdu_head);
|
||||
goto end;
|
||||
}
|
||||
@ -1381,17 +1393,17 @@ static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
|
||||
msdu_head->ip_summed = ath10k_htt_rx_get_csum_state(msdu_head);
|
||||
|
||||
if (tkip_mic_err)
|
||||
ath10k_warn("tkip mic error\n");
|
||||
ath10k_warn(ar, "tkip mic error\n");
|
||||
|
||||
if (decrypt_err) {
|
||||
ath10k_warn("decryption err in fragmented rx\n");
|
||||
ath10k_warn(ar, "decryption err in fragmented rx\n");
|
||||
dev_kfree_skb_any(msdu_head);
|
||||
goto end;
|
||||
}
|
||||
|
||||
if (enctype != HTT_RX_MPDU_ENCRYPT_NONE) {
|
||||
hdrlen = ieee80211_hdrlen(hdr->frame_control);
|
||||
paramlen = ath10k_htt_rx_crypto_param_len(enctype);
|
||||
paramlen = ath10k_htt_rx_crypto_param_len(ar, enctype);
|
||||
|
||||
/* It is more efficient to move the header than the payload */
|
||||
memmove((void *)msdu_head->data + paramlen,
|
||||
@ -1405,7 +1417,7 @@ static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
|
||||
trim = 4;
|
||||
|
||||
/* remove crypto trailer */
|
||||
trim += ath10k_htt_rx_crypto_tail_len(enctype);
|
||||
trim += ath10k_htt_rx_crypto_tail_len(ar, enctype);
|
||||
|
||||
/* last fragment of TKIP frags has MIC */
|
||||
if (!ieee80211_has_morefrags(hdr->frame_control) &&
|
||||
@ -1413,20 +1425,20 @@ static void ath10k_htt_rx_frag_handler(struct ath10k_htt *htt,
|
||||
trim += 8;
|
||||
|
||||
if (trim > msdu_head->len) {
|
||||
ath10k_warn("htt rx fragment: trailer longer than the frame itself? drop\n");
|
||||
ath10k_warn(ar, "htt rx fragment: trailer longer than the frame itself? drop\n");
|
||||
dev_kfree_skb_any(msdu_head);
|
||||
goto end;
|
||||
}
|
||||
|
||||
skb_trim(msdu_head, msdu_head->len - trim);
|
||||
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt rx frag mpdu: ",
|
||||
msdu_head->data, msdu_head->len);
|
||||
ath10k_process_rx(htt->ar, rx_status, msdu_head);
|
||||
|
||||
end:
|
||||
if (fw_desc_len > 0) {
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"expecting more fragmented rx in one indication %d\n",
|
||||
fw_desc_len);
|
||||
}
|
||||
@ -1456,12 +1468,12 @@ static void ath10k_htt_rx_frm_tx_compl(struct ath10k *ar,
|
||||
tx_done.discard = true;
|
||||
break;
|
||||
default:
|
||||
ath10k_warn("unhandled tx completion status %d\n", status);
|
||||
ath10k_warn(ar, "unhandled tx completion status %d\n", status);
|
||||
tx_done.discard = true;
|
||||
break;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion num_msdus %d\n",
|
||||
resp->data_tx_completion.num_msdus);
|
||||
|
||||
for (i = 0; i < resp->data_tx_completion.num_msdus; i++) {
|
||||
@ -1482,14 +1494,14 @@ static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
|
||||
tid = MS(info0, HTT_RX_BA_INFO0_TID);
|
||||
peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx addba tid %hu peer_id %hu size %hhu\n",
|
||||
tid, peer_id, ev->window_size);
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
peer = ath10k_peer_find_by_id(ar, peer_id);
|
||||
if (!peer) {
|
||||
ath10k_warn("received addba event for invalid peer_id: %hu\n",
|
||||
ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
|
||||
peer_id);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
return;
|
||||
@ -1497,13 +1509,13 @@ static void ath10k_htt_rx_addba(struct ath10k *ar, struct htt_resp *resp)
|
||||
|
||||
arvif = ath10k_get_arvif(ar, peer->vdev_id);
|
||||
if (!arvif) {
|
||||
ath10k_warn("received addba event for invalid vdev_id: %u\n",
|
||||
ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
|
||||
peer->vdev_id);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
return;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx start rx ba session sta %pM tid %hu size %hhu\n",
|
||||
peer->addr, tid, ev->window_size);
|
||||
|
||||
@ -1522,14 +1534,14 @@ static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
|
||||
tid = MS(info0, HTT_RX_BA_INFO0_TID);
|
||||
peer_id = MS(info0, HTT_RX_BA_INFO0_PEER_ID);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx delba tid %hu peer_id %hu\n",
|
||||
tid, peer_id);
|
||||
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
peer = ath10k_peer_find_by_id(ar, peer_id);
|
||||
if (!peer) {
|
||||
ath10k_warn("received addba event for invalid peer_id: %hu\n",
|
||||
ath10k_warn(ar, "received addba event for invalid peer_id: %hu\n",
|
||||
peer_id);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
return;
|
||||
@ -1537,13 +1549,13 @@ static void ath10k_htt_rx_delba(struct ath10k *ar, struct htt_resp *resp)
|
||||
|
||||
arvif = ath10k_get_arvif(ar, peer->vdev_id);
|
||||
if (!arvif) {
|
||||
ath10k_warn("received addba event for invalid vdev_id: %u\n",
|
||||
ath10k_warn(ar, "received addba event for invalid vdev_id: %u\n",
|
||||
peer->vdev_id);
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
return;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt rx stop rx ba session sta %pM tid %hu\n",
|
||||
peer->addr, tid);
|
||||
|
||||
@ -1558,9 +1570,9 @@ void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
|
||||
|
||||
/* confirm alignment */
|
||||
if (!IS_ALIGNED((unsigned long)skb->data, 4))
|
||||
ath10k_warn("unaligned htt message, expect trouble\n");
|
||||
ath10k_warn(ar, "unaligned htt message, expect trouble\n");
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt rx, msg_type: 0x%0X\n",
|
||||
resp->hdr.msg_type);
|
||||
switch (resp->hdr.msg_type) {
|
||||
case HTT_T2H_MSG_TYPE_VERSION_CONF: {
|
||||
@ -1624,7 +1636,7 @@ void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct htt_security_indication *ev = &resp->security_indication;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"sec ind peer_id %d unicast %d type %d\n",
|
||||
__le16_to_cpu(ev->peer_id),
|
||||
!!(ev->flags & HTT_SECURITY_IS_UNICAST),
|
||||
@ -1633,7 +1645,7 @@ void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
}
|
||||
case HTT_T2H_MSG_TYPE_RX_FRAG_IND: {
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
|
||||
skb->data, skb->len);
|
||||
ath10k_htt_rx_frag_handler(htt, &resp->rx_frag_ind);
|
||||
break;
|
||||
@ -1650,7 +1662,7 @@ void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
|
||||
* sends all tx frames as already inspected so this shouldn't
|
||||
* happen unless fw has a bug.
|
||||
*/
|
||||
ath10k_warn("received an unexpected htt tx inspect event\n");
|
||||
ath10k_warn(ar, "received an unexpected htt tx inspect event\n");
|
||||
break;
|
||||
case HTT_T2H_MSG_TYPE_RX_ADDBA:
|
||||
ath10k_htt_rx_addba(ar, resp);
|
||||
@ -1665,9 +1677,9 @@ void ath10k_htt_t2h_msg_handler(struct ath10k *ar, struct sk_buff *skb)
|
||||
break;
|
||||
}
|
||||
default:
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt event (%d) not handled\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt event (%d) not handled\n",
|
||||
resp->hdr.msg_type);
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt event: ",
|
||||
skb->data, skb->len);
|
||||
break;
|
||||
};
|
||||
|
@ -58,6 +58,7 @@ exit:
|
||||
|
||||
int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
int msdu_id;
|
||||
|
||||
lockdep_assert_held(&htt->tx_lock);
|
||||
@ -67,24 +68,29 @@ int ath10k_htt_tx_alloc_msdu_id(struct ath10k_htt *htt)
|
||||
if (msdu_id == htt->max_num_pending_tx)
|
||||
return -ENOBUFS;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx alloc msdu_id %d\n", msdu_id);
|
||||
__set_bit(msdu_id, htt->used_msdu_ids);
|
||||
return msdu_id;
|
||||
}
|
||||
|
||||
void ath10k_htt_tx_free_msdu_id(struct ath10k_htt *htt, u16 msdu_id)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
|
||||
lockdep_assert_held(&htt->tx_lock);
|
||||
|
||||
if (!test_bit(msdu_id, htt->used_msdu_ids))
|
||||
ath10k_warn("trying to free unallocated msdu_id %d\n", msdu_id);
|
||||
ath10k_warn(ar, "trying to free unallocated msdu_id %d\n",
|
||||
msdu_id);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx free msdu_id %hu\n", msdu_id);
|
||||
__clear_bit(msdu_id, htt->used_msdu_ids);
|
||||
}
|
||||
|
||||
int ath10k_htt_tx_alloc(struct ath10k_htt *htt)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
|
||||
spin_lock_init(&htt->tx_lock);
|
||||
init_waitqueue_head(&htt->empty_tx_wq);
|
||||
|
||||
@ -93,7 +99,7 @@ int ath10k_htt_tx_alloc(struct ath10k_htt *htt)
|
||||
else
|
||||
htt->max_num_pending_tx = TARGET_NUM_MSDU_DESC;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "htt tx max num pending tx %d\n",
|
||||
htt->max_num_pending_tx);
|
||||
|
||||
htt->pending_tx = kzalloc(sizeof(*htt->pending_tx) *
|
||||
@ -122,6 +128,7 @@ int ath10k_htt_tx_alloc(struct ath10k_htt *htt)
|
||||
|
||||
static void ath10k_htt_tx_free_pending(struct ath10k_htt *htt)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct htt_tx_done tx_done = {0};
|
||||
int msdu_id;
|
||||
|
||||
@ -130,7 +137,7 @@ static void ath10k_htt_tx_free_pending(struct ath10k_htt *htt)
|
||||
if (!test_bit(msdu_id, htt->used_msdu_ids))
|
||||
continue;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "force cleanup msdu_id %hu\n",
|
||||
msdu_id);
|
||||
|
||||
tx_done.discard = 1;
|
||||
@ -157,6 +164,7 @@ void ath10k_htt_htc_tx_complete(struct ath10k *ar, struct sk_buff *skb)
|
||||
|
||||
int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct sk_buff *skb;
|
||||
struct htt_cmd *cmd;
|
||||
int len = 0;
|
||||
@ -165,7 +173,7 @@ int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
|
||||
len += sizeof(cmd->hdr);
|
||||
len += sizeof(cmd->ver_req);
|
||||
|
||||
skb = ath10k_htc_alloc_skb(len);
|
||||
skb = ath10k_htc_alloc_skb(ar, len);
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -184,6 +192,7 @@ int ath10k_htt_h2t_ver_req_msg(struct ath10k_htt *htt)
|
||||
|
||||
int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct htt_stats_req *req;
|
||||
struct sk_buff *skb;
|
||||
struct htt_cmd *cmd;
|
||||
@ -192,7 +201,7 @@ int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
|
||||
len += sizeof(cmd->hdr);
|
||||
len += sizeof(cmd->stats_req);
|
||||
|
||||
skb = ath10k_htc_alloc_skb(len);
|
||||
skb = ath10k_htc_alloc_skb(ar, len);
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -214,7 +223,8 @@ int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
|
||||
|
||||
ret = ath10k_htc_send(&htt->ar->htc, htt->eid, skb);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to send htt type stats request: %d", ret);
|
||||
ath10k_warn(ar, "failed to send htt type stats request: %d",
|
||||
ret);
|
||||
dev_kfree_skb_any(skb);
|
||||
return ret;
|
||||
}
|
||||
@ -224,6 +234,7 @@ int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u8 mask, u64 cookie)
|
||||
|
||||
int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct sk_buff *skb;
|
||||
struct htt_cmd *cmd;
|
||||
struct htt_rx_ring_setup_ring *ring;
|
||||
@ -242,7 +253,7 @@ int ath10k_htt_send_rx_ring_cfg_ll(struct ath10k_htt *htt)
|
||||
|
||||
len = sizeof(cmd->hdr) + sizeof(cmd->rx_setup.hdr)
|
||||
+ (sizeof(*ring) * num_rx_ring);
|
||||
skb = ath10k_htc_alloc_skb(len);
|
||||
skb = ath10k_htc_alloc_skb(ar, len);
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -311,6 +322,7 @@ int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt,
|
||||
u8 max_subfrms_ampdu,
|
||||
u8 max_subfrms_amsdu)
|
||||
{
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct htt_aggr_conf *aggr_conf;
|
||||
struct sk_buff *skb;
|
||||
struct htt_cmd *cmd;
|
||||
@ -328,7 +340,7 @@ int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt,
|
||||
len = sizeof(cmd->hdr);
|
||||
len += sizeof(cmd->aggr_conf);
|
||||
|
||||
skb = ath10k_htc_alloc_skb(len);
|
||||
skb = ath10k_htc_alloc_skb(ar, len);
|
||||
if (!skb)
|
||||
return -ENOMEM;
|
||||
|
||||
@ -340,7 +352,7 @@ int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt,
|
||||
aggr_conf->max_num_ampdu_subframes = max_subfrms_ampdu;
|
||||
aggr_conf->max_num_amsdu_subframes = max_subfrms_amsdu;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt h2t aggr cfg msg amsdu %d ampdu %d",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt h2t aggr cfg msg amsdu %d ampdu %d",
|
||||
aggr_conf->max_num_amsdu_subframes,
|
||||
aggr_conf->max_num_ampdu_subframes);
|
||||
|
||||
@ -355,7 +367,8 @@ int ath10k_htt_h2t_aggr_cfg_msg(struct ath10k_htt *htt,
|
||||
|
||||
int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
|
||||
{
|
||||
struct device *dev = htt->ar->dev;
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct device *dev = ar->dev;
|
||||
struct sk_buff *txdesc = NULL;
|
||||
struct htt_cmd *cmd;
|
||||
struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
|
||||
@ -382,7 +395,7 @@ int ath10k_htt_mgmt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
|
||||
htt->pending_tx[msdu_id] = msdu;
|
||||
spin_unlock_bh(&htt->tx_lock);
|
||||
|
||||
txdesc = ath10k_htc_alloc_skb(len);
|
||||
txdesc = ath10k_htc_alloc_skb(ar, len);
|
||||
if (!txdesc) {
|
||||
res = -ENOMEM;
|
||||
goto err_free_msdu_id;
|
||||
@ -429,7 +442,8 @@ err:
|
||||
|
||||
int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
|
||||
{
|
||||
struct device *dev = htt->ar->dev;
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct device *dev = ar->dev;
|
||||
struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)msdu->data;
|
||||
struct ath10k_skb_cb *skb_cb = ATH10K_SKB_CB(msdu);
|
||||
struct ath10k_hif_sg_item sg_items[2];
|
||||
@ -545,11 +559,11 @@ int ath10k_htt_tx(struct ath10k_htt *htt, struct sk_buff *msdu)
|
||||
skb_cb->htt.txbuf->cmd_tx.frags_paddr = __cpu_to_le32(frags_paddr);
|
||||
skb_cb->htt.txbuf->cmd_tx.peerid = __cpu_to_le32(HTT_INVALID_PEERID);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT,
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT,
|
||||
"htt tx flags0 %hhu flags1 %hu len %d id %hu frags_paddr %08x, msdu_paddr %08x vdev %hhu tid %hhu\n",
|
||||
flags0, flags1, msdu->len, msdu_id, frags_paddr,
|
||||
(u32)skb_cb->paddr, vdev_id, tid);
|
||||
ath10k_dbg_dump(ATH10K_DBG_HTT_DUMP, NULL, "htt tx msdu: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_HTT_DUMP, NULL, "htt tx msdu: ",
|
||||
msdu->data, msdu->len);
|
||||
|
||||
sg_items[0].transfer_id = 0;
|
||||
|
File diff suppressed because it is too large
Load Diff
@ -296,7 +296,7 @@ static int __ath10k_pci_rx_post_buf(struct ath10k_pci_pipe *pipe)
|
||||
skb->len + skb_tailroom(skb),
|
||||
DMA_FROM_DEVICE);
|
||||
if (unlikely(dma_mapping_error(ar->dev, paddr))) {
|
||||
ath10k_warn("failed to dma map pci rx buf\n");
|
||||
ath10k_warn(ar, "failed to dma map pci rx buf\n");
|
||||
dev_kfree_skb_any(skb);
|
||||
return -EIO;
|
||||
}
|
||||
@ -305,7 +305,7 @@ static int __ath10k_pci_rx_post_buf(struct ath10k_pci_pipe *pipe)
|
||||
|
||||
ret = __ath10k_ce_rx_post_buf(ce_pipe, skb, paddr);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to post pci rx buf: %d\n", ret);
|
||||
ath10k_warn(ar, "failed to post pci rx buf: %d\n", ret);
|
||||
dma_unmap_single(ar->dev, paddr, skb->len + skb_tailroom(skb),
|
||||
DMA_FROM_DEVICE);
|
||||
dev_kfree_skb_any(skb);
|
||||
@ -334,7 +334,7 @@ static void __ath10k_pci_rx_post_pipe(struct ath10k_pci_pipe *pipe)
|
||||
while (num--) {
|
||||
ret = __ath10k_pci_rx_post_buf(pipe);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to post pci rx buf: %d\n", ret);
|
||||
ath10k_warn(ar, "failed to post pci rx buf: %d\n", ret);
|
||||
mod_timer(&ar_pci->rx_post_retry, jiffies +
|
||||
ATH10K_PCI_RX_POST_RETRY_MS);
|
||||
break;
|
||||
@ -514,7 +514,7 @@ done:
|
||||
__le32_to_cpu(((__le32 *)data_buf)[i]);
|
||||
}
|
||||
} else
|
||||
ath10k_warn("failed to read diag value at 0x%x: %d\n",
|
||||
ath10k_warn(ar, "failed to read diag value at 0x%x: %d\n",
|
||||
address, ret);
|
||||
|
||||
if (data_buf)
|
||||
@ -539,14 +539,14 @@ static int __ath10k_pci_diag_read_hi(struct ath10k *ar, void *dest,
|
||||
|
||||
ret = ath10k_pci_diag_read32(ar, host_addr, &addr);
|
||||
if (ret != 0) {
|
||||
ath10k_warn("failed to get memcpy hi address for firmware address %d: %d\n",
|
||||
ath10k_warn(ar, "failed to get memcpy hi address for firmware address %d: %d\n",
|
||||
src, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_diag_read_mem(ar, addr, dest, len);
|
||||
if (ret != 0) {
|
||||
ath10k_warn("failed to memcpy firmware memory from %d (%d B): %d\n",
|
||||
ath10k_warn(ar, "failed to memcpy firmware memory from %d (%d B): %d\n",
|
||||
addr, len, ret);
|
||||
return ret;
|
||||
}
|
||||
@ -695,7 +695,7 @@ done:
|
||||
}
|
||||
|
||||
if (ret != 0)
|
||||
ath10k_warn("failed to write diag value at 0x%x: %d\n",
|
||||
ath10k_warn(ar, "failed to write diag value at 0x%x: %d\n",
|
||||
address, ret);
|
||||
|
||||
return ret;
|
||||
@ -798,7 +798,7 @@ static void ath10k_pci_ce_recv_data(struct ath10k_ce_pipe *ce_state)
|
||||
max_nbytes, DMA_FROM_DEVICE);
|
||||
|
||||
if (unlikely(max_nbytes < nbytes)) {
|
||||
ath10k_warn("rxed more than expected (nbytes %d, max %d)",
|
||||
ath10k_warn(ar, "rxed more than expected (nbytes %d, max %d)",
|
||||
nbytes, max_nbytes);
|
||||
dev_kfree_skb_any(skb);
|
||||
continue;
|
||||
@ -836,10 +836,10 @@ static int ath10k_pci_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
|
||||
}
|
||||
|
||||
for (i = 0; i < n_items - 1; i++) {
|
||||
ath10k_dbg(ATH10K_DBG_PCI,
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI,
|
||||
"pci tx item %d paddr 0x%08x len %d n_items %d\n",
|
||||
i, items[i].paddr, items[i].len, n_items);
|
||||
ath10k_dbg_dump(ATH10K_DBG_PCI_DUMP, NULL, "item data: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci tx data: ",
|
||||
items[i].vaddr, items[i].len);
|
||||
|
||||
err = ath10k_ce_send_nolock(ce_pipe,
|
||||
@ -854,10 +854,10 @@ static int ath10k_pci_hif_tx_sg(struct ath10k *ar, u8 pipe_id,
|
||||
|
||||
/* `i` is equal to `n_items -1` after for() */
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_PCI,
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI,
|
||||
"pci tx item %d paddr 0x%08x len %d n_items %d\n",
|
||||
i, items[i].paddr, items[i].len, n_items);
|
||||
ath10k_dbg_dump(ATH10K_DBG_PCI_DUMP, NULL, "item data: ",
|
||||
ath10k_dbg_dump(ar, ATH10K_DBG_PCI_DUMP, NULL, "pci tx data: ",
|
||||
items[i].vaddr, items[i].len);
|
||||
|
||||
err = ath10k_ce_send_nolock(ce_pipe,
|
||||
@ -884,7 +884,7 @@ static u16 ath10k_pci_hif_get_free_queue_number(struct ath10k *ar, u8 pipe)
|
||||
{
|
||||
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_PCI, "pci hif get free queue number\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif get free queue number\n");
|
||||
|
||||
return ath10k_ce_num_free_src_entries(ar_pci->pipe_info[pipe].ce_hdl);
|
||||
}
|
||||
@ -901,15 +901,15 @@ static void ath10k_pci_dump_registers(struct ath10k *ar,
|
||||
hi_failure_state,
|
||||
REG_DUMP_COUNT_QCA988X * sizeof(u32));
|
||||
if (ret) {
|
||||
ath10k_err("failed to read firmware dump area: %d\n", ret);
|
||||
ath10k_err(ar, "failed to read firmware dump area: %d\n", ret);
|
||||
return;
|
||||
}
|
||||
|
||||
BUILD_BUG_ON(REG_DUMP_COUNT_QCA988X % 4);
|
||||
|
||||
ath10k_err("firmware register dump:\n");
|
||||
ath10k_err(ar, "firmware register dump:\n");
|
||||
for (i = 0; i < REG_DUMP_COUNT_QCA988X; i += 4)
|
||||
ath10k_err("[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X\n",
|
||||
ath10k_err(ar, "[%02d]: 0x%08X 0x%08X 0x%08X 0x%08X\n",
|
||||
i,
|
||||
reg_dump_values[i],
|
||||
reg_dump_values[i + 1],
|
||||
@ -935,7 +935,7 @@ static void ath10k_pci_fw_crashed_dump(struct ath10k *ar)
|
||||
else
|
||||
scnprintf(uuid, sizeof(uuid), "n/a");
|
||||
|
||||
ath10k_err("firmware crashed! (uuid %s)\n", uuid);
|
||||
ath10k_err(ar, "firmware crashed! (uuid %s)\n", uuid);
|
||||
ath10k_print_driver_info(ar);
|
||||
|
||||
if (!crash_data)
|
||||
@ -952,7 +952,7 @@ exit:
|
||||
static void ath10k_pci_hif_send_complete_check(struct ath10k *ar, u8 pipe,
|
||||
int force)
|
||||
{
|
||||
ath10k_dbg(ATH10K_DBG_PCI, "pci hif send complete check\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif send complete check\n");
|
||||
|
||||
if (!force) {
|
||||
int resources;
|
||||
@ -980,7 +980,7 @@ static void ath10k_pci_hif_set_callbacks(struct ath10k *ar,
|
||||
{
|
||||
struct ath10k_pci *ar_pci = ath10k_pci_priv(ar);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_PCI, "pci hif set callbacks\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif set callbacks\n");
|
||||
|
||||
memcpy(&ar_pci->msg_callbacks_current, callbacks,
|
||||
sizeof(ar_pci->msg_callbacks_current));
|
||||
@ -1008,7 +1008,7 @@ static int ath10k_pci_hif_map_service_to_pipe(struct ath10k *ar,
|
||||
{
|
||||
int ret = 0;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_PCI, "pci hif map service\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif map service\n");
|
||||
|
||||
/* polling for received messages not supported */
|
||||
*dl_is_polled = 0;
|
||||
@ -1069,7 +1069,7 @@ static void ath10k_pci_hif_get_default_pipe(struct ath10k *ar,
|
||||
{
|
||||
int ul_is_polled, dl_is_polled;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_PCI, "pci hif get default pipe\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI, "pci hif get default pipe\n");
|
||||
|
||||
(void)ath10k_pci_hif_map_service_to_pipe(ar,
|
||||
ATH10K_HTC_SVC_ID_RSVD_CTRL,
|
||||
@ -1115,7 +1115,7 @@ static void ath10k_pci_irq_enable(struct ath10k *ar)
|
||||
|
||||
static int ath10k_pci_hif_start(struct ath10k *ar)
|
||||
{
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot hif start\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif start\n");
|
||||
|
||||
ath10k_pci_irq_enable(ar);
|
||||
ath10k_pci_rx_post(ar);
|
||||
@ -1222,7 +1222,7 @@ static void ath10k_pci_flush(struct ath10k *ar)
|
||||
|
||||
static void ath10k_pci_hif_stop(struct ath10k *ar)
|
||||
{
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot hif stop\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif stop\n");
|
||||
|
||||
ath10k_pci_irq_disable(ar);
|
||||
ath10k_pci_flush(ar);
|
||||
@ -1340,6 +1340,7 @@ static void ath10k_pci_bmi_send_done(struct ath10k_ce_pipe *ce_state)
|
||||
|
||||
static void ath10k_pci_bmi_recv_data(struct ath10k_ce_pipe *ce_state)
|
||||
{
|
||||
struct ath10k *ar = ce_state->ar;
|
||||
struct bmi_xfer *xfer;
|
||||
u32 ce_data;
|
||||
unsigned int nbytes;
|
||||
@ -1351,7 +1352,7 @@ static void ath10k_pci_bmi_recv_data(struct ath10k_ce_pipe *ce_state)
|
||||
return;
|
||||
|
||||
if (!xfer->wait_for_resp) {
|
||||
ath10k_warn("unexpected: BMI data received; ignoring\n");
|
||||
ath10k_warn(ar, "unexpected: BMI data received; ignoring\n");
|
||||
return;
|
||||
}
|
||||
|
||||
@ -1487,7 +1488,7 @@ static int ath10k_pci_wake_target_cpu(struct ath10k *ar)
|
||||
CORE_CTRL_ADDRESS,
|
||||
&core_ctrl);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to read core_ctrl: %d\n", ret);
|
||||
ath10k_warn(ar, "failed to read core_ctrl: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1498,7 +1499,7 @@ static int ath10k_pci_wake_target_cpu(struct ath10k *ar)
|
||||
CORE_CTRL_ADDRESS,
|
||||
core_ctrl);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to set target CPU interrupt mask: %d\n",
|
||||
ath10k_warn(ar, "failed to set target CPU interrupt mask: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
@ -1527,13 +1528,13 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
ret = ath10k_pci_diag_read_access(ar, interconnect_targ_addr,
|
||||
&pcie_state_targ_addr);
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to get pcie state addr: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to get pcie state addr: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (pcie_state_targ_addr == 0) {
|
||||
ret = -EIO;
|
||||
ath10k_err("Invalid pcie state addr\n");
|
||||
ath10k_err(ar, "Invalid pcie state addr\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1542,13 +1543,13 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
pipe_cfg_addr),
|
||||
&pipe_cfg_targ_addr);
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to get pipe cfg addr: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to get pipe cfg addr: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (pipe_cfg_targ_addr == 0) {
|
||||
ret = -EIO;
|
||||
ath10k_err("Invalid pipe cfg addr\n");
|
||||
ath10k_err(ar, "Invalid pipe cfg addr\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1557,7 +1558,7 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
sizeof(target_ce_config_wlan));
|
||||
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to write pipe cfg: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to write pipe cfg: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1566,13 +1567,13 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
svc_to_pipe_map),
|
||||
&svc_to_pipe_map);
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to get svc/pipe map: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to get svc/pipe map: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (svc_to_pipe_map == 0) {
|
||||
ret = -EIO;
|
||||
ath10k_err("Invalid svc_to_pipe map\n");
|
||||
ath10k_err(ar, "Invalid svc_to_pipe map\n");
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1580,7 +1581,7 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
target_service_to_ce_map_wlan,
|
||||
sizeof(target_service_to_ce_map_wlan));
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to write svc/pipe map: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to write svc/pipe map: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1589,7 +1590,7 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
config_flags),
|
||||
&pcie_config_flags);
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to get pcie config_flags: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to get pcie config_flags: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1600,7 +1601,7 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
&pcie_config_flags,
|
||||
sizeof(pcie_config_flags));
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to write pcie config_flags: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to write pcie config_flags: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1609,7 +1610,7 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_pci_diag_read_access(ar, ealloc_targ_addr, &ealloc_value);
|
||||
if (ret != 0) {
|
||||
ath10k_err("Faile to get early alloc val: %d\n", ret);
|
||||
ath10k_err(ar, "Faile to get early alloc val: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1621,7 +1622,7 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_pci_diag_write_access(ar, ealloc_targ_addr, ealloc_value);
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to set early alloc val: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to set early alloc val: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1630,7 +1631,7 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_pci_diag_read_access(ar, flag2_targ_addr, &flag2_value);
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to get option val: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to get option val: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1638,7 +1639,7 @@ static int ath10k_pci_init_config(struct ath10k *ar)
|
||||
|
||||
ret = ath10k_pci_diag_write_access(ar, flag2_targ_addr, flag2_value);
|
||||
if (ret != 0) {
|
||||
ath10k_err("Failed to set option val: %d\n", ret);
|
||||
ath10k_err(ar, "Failed to set option val: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
@ -1652,7 +1653,7 @@ static int ath10k_pci_alloc_ce(struct ath10k *ar)
|
||||
for (i = 0; i < CE_COUNT; i++) {
|
||||
ret = ath10k_ce_alloc_pipe(ar, i, &host_ce_config_wlan[i]);
|
||||
if (ret) {
|
||||
ath10k_err("failed to allocate copy engine pipe %d: %d\n",
|
||||
ath10k_err(ar, "failed to allocate copy engine pipe %d: %d\n",
|
||||
i, ret);
|
||||
return ret;
|
||||
}
|
||||
@ -1687,7 +1688,7 @@ static int ath10k_pci_ce_init(struct ath10k *ar)
|
||||
ath10k_pci_ce_send_done,
|
||||
ath10k_pci_ce_recv_data);
|
||||
if (ret) {
|
||||
ath10k_err("failed to initialize copy engine pipe %d: %d\n",
|
||||
ath10k_err(ar, "failed to initialize copy engine pipe %d: %d\n",
|
||||
pipe_num, ret);
|
||||
return ret;
|
||||
}
|
||||
@ -1746,16 +1747,17 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
|
||||
{
|
||||
u32 val;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot warm reset\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset\n");
|
||||
|
||||
/* debug */
|
||||
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
PCIE_INTR_CAUSE_ADDRESS);
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot host cpu intr cause: 0x%08x\n", val);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot host cpu intr cause: 0x%08x\n",
|
||||
val);
|
||||
|
||||
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
CPU_INTR_ADDRESS);
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot target cpu intr cause: 0x%08x\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target cpu intr cause: 0x%08x\n",
|
||||
val);
|
||||
|
||||
/* disable pending irqs */
|
||||
@ -1798,11 +1800,12 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
|
||||
/* debug */
|
||||
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
PCIE_INTR_CAUSE_ADDRESS);
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot host cpu intr cause: 0x%08x\n", val);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot host cpu intr cause: 0x%08x\n",
|
||||
val);
|
||||
|
||||
val = ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS +
|
||||
CPU_INTR_ADDRESS);
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot target cpu intr cause: 0x%08x\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target cpu intr cause: 0x%08x\n",
|
||||
val);
|
||||
|
||||
/* CPU warm reset */
|
||||
@ -1813,11 +1816,12 @@ static int ath10k_pci_warm_reset(struct ath10k *ar)
|
||||
|
||||
val = ath10k_pci_read32(ar, RTC_SOC_BASE_ADDRESS +
|
||||
SOC_RESET_CONTROL_ADDRESS);
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot target reset state: 0x%08x\n", val);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target reset state: 0x%08x\n",
|
||||
val);
|
||||
|
||||
msleep(100);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot warm reset complete\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot warm reset complete\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -1842,31 +1846,31 @@ static int __ath10k_pci_hif_power_up(struct ath10k *ar, bool cold_reset)
|
||||
ret = ath10k_pci_warm_reset(ar);
|
||||
|
||||
if (ret) {
|
||||
ath10k_err("failed to reset target: %d\n", ret);
|
||||
ath10k_err(ar, "failed to reset target: %d\n", ret);
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_ce_init(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to initialize CE: %d\n", ret);
|
||||
ath10k_err(ar, "failed to initialize CE: %d\n", ret);
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_wait_for_target_init(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to wait for target to init: %d\n", ret);
|
||||
ath10k_err(ar, "failed to wait for target to init: %d\n", ret);
|
||||
goto err_ce;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_init_config(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to setup init config: %d\n", ret);
|
||||
ath10k_err(ar, "failed to setup init config: %d\n", ret);
|
||||
goto err_ce;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_wake_target_cpu(ar);
|
||||
if (ret) {
|
||||
ath10k_err("could not wake up target CPU: %d\n", ret);
|
||||
ath10k_err(ar, "could not wake up target CPU: %d\n", ret);
|
||||
goto err_ce;
|
||||
}
|
||||
|
||||
@ -1894,7 +1898,7 @@ static int ath10k_pci_hif_power_up_warm(struct ath10k *ar)
|
||||
if (ret == 0)
|
||||
break;
|
||||
|
||||
ath10k_warn("failed to warm reset (attempt %d out of %d): %d\n",
|
||||
ath10k_warn(ar, "failed to warm reset (attempt %d out of %d): %d\n",
|
||||
i + 1, ATH10K_PCI_NUM_WARM_RESET_ATTEMPTS, ret);
|
||||
}
|
||||
|
||||
@ -1905,7 +1909,7 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot hif power up\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power up\n");
|
||||
|
||||
/*
|
||||
* Hardware CUS232 version 2 has some issues with cold reset and the
|
||||
@ -1917,17 +1921,17 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar)
|
||||
*/
|
||||
ret = ath10k_pci_hif_power_up_warm(ar);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to power up target using warm reset: %d\n",
|
||||
ath10k_warn(ar, "failed to power up target using warm reset: %d\n",
|
||||
ret);
|
||||
|
||||
if (ath10k_pci_reset_mode == ATH10K_PCI_RESET_WARM_ONLY)
|
||||
return ret;
|
||||
|
||||
ath10k_warn("trying cold reset\n");
|
||||
ath10k_warn(ar, "trying cold reset\n");
|
||||
|
||||
ret = __ath10k_pci_hif_power_up(ar, true);
|
||||
if (ret) {
|
||||
ath10k_err("failed to power up target using cold reset too (%d)\n",
|
||||
ath10k_err(ar, "failed to power up target using cold reset too (%d)\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
@ -1938,7 +1942,7 @@ static int ath10k_pci_hif_power_up(struct ath10k *ar)
|
||||
|
||||
static void ath10k_pci_hif_power_down(struct ath10k *ar)
|
||||
{
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot hif power down\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot hif power down\n");
|
||||
|
||||
ath10k_pci_warm_reset(ar);
|
||||
}
|
||||
@ -2023,7 +2027,7 @@ static void ath10k_msi_err_tasklet(unsigned long data)
|
||||
struct ath10k *ar = (struct ath10k *)data;
|
||||
|
||||
if (!ath10k_pci_has_fw_crashed(ar)) {
|
||||
ath10k_warn("received unsolicited fw crash interrupt\n");
|
||||
ath10k_warn(ar, "received unsolicited fw crash interrupt\n");
|
||||
return;
|
||||
}
|
||||
|
||||
@ -2042,7 +2046,8 @@ static irqreturn_t ath10k_pci_per_engine_handler(int irq, void *arg)
|
||||
int ce_id = irq - ar_pci->pdev->irq - MSI_ASSIGN_CE_INITIAL;
|
||||
|
||||
if (ce_id < 0 || ce_id >= ARRAY_SIZE(ar_pci->pipe_info)) {
|
||||
ath10k_warn("unexpected/invalid irq %d ce_id %d\n", irq, ce_id);
|
||||
ath10k_warn(ar, "unexpected/invalid irq %d ce_id %d\n", irq,
|
||||
ce_id);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
@ -2116,7 +2121,7 @@ static int ath10k_pci_request_irq_msix(struct ath10k *ar)
|
||||
ath10k_pci_msi_fw_handler,
|
||||
IRQF_SHARED, "ath10k_pci", ar);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to request MSI-X fw irq %d: %d\n",
|
||||
ath10k_warn(ar, "failed to request MSI-X fw irq %d: %d\n",
|
||||
ar_pci->pdev->irq + MSI_ASSIGN_FW, ret);
|
||||
return ret;
|
||||
}
|
||||
@ -2126,7 +2131,7 @@ static int ath10k_pci_request_irq_msix(struct ath10k *ar)
|
||||
ath10k_pci_per_engine_handler,
|
||||
IRQF_SHARED, "ath10k_pci", ar);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to request MSI-X ce irq %d: %d\n",
|
||||
ath10k_warn(ar, "failed to request MSI-X ce irq %d: %d\n",
|
||||
ar_pci->pdev->irq + i, ret);
|
||||
|
||||
for (i--; i >= MSI_ASSIGN_CE_INITIAL; i--)
|
||||
@ -2149,7 +2154,7 @@ static int ath10k_pci_request_irq_msi(struct ath10k *ar)
|
||||
ath10k_pci_interrupt_handler,
|
||||
IRQF_SHARED, "ath10k_pci", ar);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to request MSI irq %d: %d\n",
|
||||
ath10k_warn(ar, "failed to request MSI irq %d: %d\n",
|
||||
ar_pci->pdev->irq, ret);
|
||||
return ret;
|
||||
}
|
||||
@ -2166,7 +2171,7 @@ static int ath10k_pci_request_irq_legacy(struct ath10k *ar)
|
||||
ath10k_pci_interrupt_handler,
|
||||
IRQF_SHARED, "ath10k_pci", ar);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to request legacy irq %d: %d\n",
|
||||
ath10k_warn(ar, "failed to request legacy irq %d: %d\n",
|
||||
ar_pci->pdev->irq, ret);
|
||||
return ret;
|
||||
}
|
||||
@ -2187,7 +2192,7 @@ static int ath10k_pci_request_irq(struct ath10k *ar)
|
||||
return ath10k_pci_request_irq_msix(ar);
|
||||
}
|
||||
|
||||
ath10k_warn("unknown irq configuration upon request\n");
|
||||
ath10k_warn(ar, "unknown irq configuration upon request\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -2226,7 +2231,8 @@ static int ath10k_pci_init_irq(struct ath10k *ar)
|
||||
ath10k_pci_init_irq_tasklets(ar);
|
||||
|
||||
if (ath10k_pci_irq_mode != ATH10K_PCI_IRQ_AUTO)
|
||||
ath10k_info("limiting irq mode to: %d\n", ath10k_pci_irq_mode);
|
||||
ath10k_info(ar, "limiting irq mode to: %d\n",
|
||||
ath10k_pci_irq_mode);
|
||||
|
||||
/* Try MSI-X */
|
||||
if (ath10k_pci_irq_mode == ATH10K_PCI_IRQ_AUTO) {
|
||||
@ -2288,7 +2294,7 @@ static int ath10k_pci_deinit_irq(struct ath10k *ar)
|
||||
pci_disable_msi(ar_pci->pdev);
|
||||
}
|
||||
|
||||
ath10k_warn("unknown irq configuration upon deinit\n");
|
||||
ath10k_warn(ar, "unknown irq configuration upon deinit\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
@ -2298,14 +2304,15 @@ static int ath10k_pci_wait_for_target_init(struct ath10k *ar)
|
||||
unsigned long timeout;
|
||||
u32 val;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot waiting target to initialise\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot waiting target to initialise\n");
|
||||
|
||||
timeout = jiffies + msecs_to_jiffies(ATH10K_PCI_TARGET_WAIT);
|
||||
|
||||
do {
|
||||
val = ath10k_pci_read32(ar, FW_INDICATOR_ADDRESS);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot target indicator %x\n", val);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target indicator %x\n",
|
||||
val);
|
||||
|
||||
/* target should never return this */
|
||||
if (val == 0xffffffff)
|
||||
@ -2329,24 +2336,24 @@ static int ath10k_pci_wait_for_target_init(struct ath10k *ar)
|
||||
} while (time_before(jiffies, timeout));
|
||||
|
||||
if (val == 0xffffffff) {
|
||||
ath10k_err("failed to read device register, device is gone\n");
|
||||
ath10k_err(ar, "failed to read device register, device is gone\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
if (val & FW_IND_EVENT_PENDING) {
|
||||
ath10k_warn("device has crashed during init\n");
|
||||
ath10k_warn(ar, "device has crashed during init\n");
|
||||
ath10k_pci_fw_crashed_clear(ar);
|
||||
ath10k_pci_fw_crashed_dump(ar);
|
||||
return -ECOMM;
|
||||
}
|
||||
|
||||
if (!(val & FW_IND_INITIALIZED)) {
|
||||
ath10k_err("failed to receive initialized event from target: %08x\n",
|
||||
ath10k_err(ar, "failed to receive initialized event from target: %08x\n",
|
||||
val);
|
||||
return -ETIMEDOUT;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot target initialised\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot target initialised\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
@ -2355,7 +2362,7 @@ static int ath10k_pci_cold_reset(struct ath10k *ar)
|
||||
int i;
|
||||
u32 val;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot cold reset\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cold reset\n");
|
||||
|
||||
/* Put Target, including PCIe, into RESET. */
|
||||
val = ath10k_pci_reg_read32(ar, SOC_GLOBAL_RESET_ADDRESS);
|
||||
@ -2380,7 +2387,7 @@ static int ath10k_pci_cold_reset(struct ath10k *ar)
|
||||
msleep(1);
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot cold reset complete\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cold reset complete\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -2396,13 +2403,13 @@ static int ath10k_pci_claim(struct ath10k *ar)
|
||||
|
||||
ret = pci_enable_device(pdev);
|
||||
if (ret) {
|
||||
ath10k_err("failed to enable pci device: %d\n", ret);
|
||||
ath10k_err(ar, "failed to enable pci device: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = pci_request_region(pdev, BAR_NUM, "ath");
|
||||
if (ret) {
|
||||
ath10k_err("failed to request region BAR%d: %d\n", BAR_NUM,
|
||||
ath10k_err(ar, "failed to request region BAR%d: %d\n", BAR_NUM,
|
||||
ret);
|
||||
goto err_device;
|
||||
}
|
||||
@ -2410,13 +2417,13 @@ static int ath10k_pci_claim(struct ath10k *ar)
|
||||
/* Target expects 32 bit DMA. Enforce it. */
|
||||
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||
if (ret) {
|
||||
ath10k_err("failed to set dma mask to 32-bit: %d\n", ret);
|
||||
ath10k_err(ar, "failed to set dma mask to 32-bit: %d\n", ret);
|
||||
goto err_region;
|
||||
}
|
||||
|
||||
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
|
||||
if (ret) {
|
||||
ath10k_err("failed to set consistent dma mask to 32-bit: %d\n",
|
||||
ath10k_err(ar, "failed to set consistent dma mask to 32-bit: %d\n",
|
||||
ret);
|
||||
goto err_region;
|
||||
}
|
||||
@ -2430,12 +2437,12 @@ static int ath10k_pci_claim(struct ath10k *ar)
|
||||
/* Arrange for access to Target SoC registers. */
|
||||
ar_pci->mem = pci_iomap(pdev, BAR_NUM, 0);
|
||||
if (!ar_pci->mem) {
|
||||
ath10k_err("failed to iomap BAR%d\n", BAR_NUM);
|
||||
ath10k_err(ar, "failed to iomap BAR%d\n", BAR_NUM);
|
||||
ret = -EIO;
|
||||
goto err_master;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_BOOT, "boot pci_mem 0x%p\n", ar_pci->mem);
|
||||
ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot pci_mem 0x%p\n", ar_pci->mem);
|
||||
return 0;
|
||||
|
||||
err_master:
|
||||
@ -2469,15 +2476,15 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
|
||||
struct ath10k_pci *ar_pci;
|
||||
u32 chip_id;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_PCI, "pci probe\n");
|
||||
|
||||
ar = ath10k_core_create(sizeof(*ar_pci), &pdev->dev,
|
||||
&ath10k_pci_hif_ops);
|
||||
if (!ar) {
|
||||
ath10k_err("failed to allocate core\n");
|
||||
dev_err(&pdev->dev, "failed to allocate core\n");
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI, "pci probe\n");
|
||||
|
||||
ar_pci = ath10k_pci_priv(ar);
|
||||
ar_pci->pdev = pdev;
|
||||
ar_pci->dev = &pdev->dev;
|
||||
@ -2489,25 +2496,26 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
|
||||
|
||||
ret = ath10k_pci_claim(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to claim device: %d\n", ret);
|
||||
ath10k_err(ar, "failed to claim device: %d\n", ret);
|
||||
goto err_core_destroy;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_wake(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to wake up: %d\n", ret);
|
||||
ath10k_err(ar, "failed to wake up: %d\n", ret);
|
||||
goto err_release;
|
||||
}
|
||||
|
||||
chip_id = ath10k_pci_soc_read32(ar, SOC_CHIP_ID_ADDRESS);
|
||||
if (chip_id == 0xffffffff) {
|
||||
ath10k_err("failed to get chip id\n");
|
||||
ath10k_err(ar, "failed to get chip id\n");
|
||||
goto err_sleep;
|
||||
}
|
||||
|
||||
ret = ath10k_pci_alloc_ce(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to allocate copy engine pipes: %d\n", ret);
|
||||
ath10k_err(ar, "failed to allocate copy engine pipes: %d\n",
|
||||
ret);
|
||||
goto err_sleep;
|
||||
}
|
||||
|
||||
@ -2515,7 +2523,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
|
||||
|
||||
ret = ath10k_ce_disable_interrupts(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to disable copy engine interrupts: %d\n",
|
||||
ath10k_err(ar, "failed to disable copy engine interrupts: %d\n",
|
||||
ret);
|
||||
goto err_free_ce;
|
||||
}
|
||||
@ -2529,17 +2537,17 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
|
||||
|
||||
ret = ath10k_pci_init_irq(ar);
|
||||
if (ret) {
|
||||
ath10k_err("failed to init irqs: %d\n", ret);
|
||||
ath10k_err(ar, "failed to init irqs: %d\n", ret);
|
||||
goto err_free_ce;
|
||||
}
|
||||
|
||||
ath10k_info("pci irq %s interrupts %d irq_mode %d reset_mode %d\n",
|
||||
ath10k_info(ar, "pci irq %s interrupts %d irq_mode %d reset_mode %d\n",
|
||||
ath10k_pci_get_irq_method(ar), ar_pci->num_msi_intrs,
|
||||
ath10k_pci_irq_mode, ath10k_pci_reset_mode);
|
||||
|
||||
ret = ath10k_pci_request_irq(ar);
|
||||
if (ret) {
|
||||
ath10k_warn("failed to request irqs: %d\n", ret);
|
||||
ath10k_warn(ar, "failed to request irqs: %d\n", ret);
|
||||
goto err_deinit_irq;
|
||||
}
|
||||
|
||||
@ -2548,7 +2556,7 @@ static int ath10k_pci_probe(struct pci_dev *pdev,
|
||||
|
||||
ret = ath10k_core_register(ar, chip_id);
|
||||
if (ret) {
|
||||
ath10k_err("failed to register driver core: %d\n", ret);
|
||||
ath10k_err(ar, "failed to register driver core: %d\n", ret);
|
||||
goto err_free_irq;
|
||||
}
|
||||
|
||||
@ -2580,7 +2588,7 @@ static void ath10k_pci_remove(struct pci_dev *pdev)
|
||||
struct ath10k *ar = pci_get_drvdata(pdev);
|
||||
struct ath10k_pci *ar_pci;
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_PCI, "pci remove\n");
|
||||
ath10k_dbg(ar, ATH10K_DBG_PCI, "pci remove\n");
|
||||
|
||||
if (!ar)
|
||||
return;
|
||||
@ -2615,7 +2623,8 @@ static int __init ath10k_pci_init(void)
|
||||
|
||||
ret = pci_register_driver(&ath10k_pci_driver);
|
||||
if (ret)
|
||||
ath10k_err("failed to register PCI driver: %d\n", ret);
|
||||
printk(KERN_ERR "failed to register ath10k pci driver: %d\n",
|
||||
ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
@ -237,7 +237,7 @@ static int ath10k_spectral_scan_config(struct ath10k *ar,
|
||||
WMI_SPECTRAL_TRIGGER_CMD_CLEAR,
|
||||
WMI_SPECTRAL_ENABLE_CMD_DISABLE);
|
||||
if (res < 0) {
|
||||
ath10k_warn("failed to enable spectral scan: %d\n", res);
|
||||
ath10k_warn(ar, "failed to enable spectral scan: %d\n", res);
|
||||
return res;
|
||||
}
|
||||
|
||||
@ -271,7 +271,7 @@ static int ath10k_spectral_scan_config(struct ath10k *ar,
|
||||
|
||||
res = ath10k_wmi_vdev_spectral_conf(ar, &arg);
|
||||
if (res < 0) {
|
||||
ath10k_warn("failed to configure spectral scan: %d\n", res);
|
||||
ath10k_warn(ar, "failed to configure spectral scan: %d\n", res);
|
||||
return res;
|
||||
}
|
||||
|
||||
@ -332,12 +332,12 @@ static ssize_t write_file_spec_scan_ctl(struct file *file,
|
||||
res = ath10k_spectral_scan_config(ar,
|
||||
ar->spectral.mode);
|
||||
if (res < 0) {
|
||||
ath10k_warn("failed to reconfigure spectral scan: %d\n",
|
||||
ath10k_warn(ar, "failed to reconfigure spectral scan: %d\n",
|
||||
res);
|
||||
}
|
||||
res = ath10k_spectral_scan_trigger(ar);
|
||||
if (res < 0) {
|
||||
ath10k_warn("failed to trigger spectral scan: %d\n",
|
||||
ath10k_warn(ar, "failed to trigger spectral scan: %d\n",
|
||||
res);
|
||||
}
|
||||
} else {
|
||||
|
@ -32,14 +32,14 @@ static void ath10k_report_offchan_tx(struct ath10k *ar, struct sk_buff *skb)
|
||||
* offchan_tx_skb. */
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
if (ar->offchan_tx_skb != skb) {
|
||||
ath10k_warn("completed old offchannel frame\n");
|
||||
ath10k_warn(ar, "completed old offchannel frame\n");
|
||||
goto out;
|
||||
}
|
||||
|
||||
complete(&ar->offchan_tx_completed);
|
||||
ar->offchan_tx_skb = NULL; /* just for sanity */
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "completed offchannel skb %p\n", skb);
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "completed offchannel skb %p\n", skb);
|
||||
out:
|
||||
spin_unlock_bh(&ar->data_lock);
|
||||
}
|
||||
@ -47,18 +47,19 @@ out:
|
||||
void ath10k_txrx_tx_unref(struct ath10k_htt *htt,
|
||||
const struct htt_tx_done *tx_done)
|
||||
{
|
||||
struct device *dev = htt->ar->dev;
|
||||
struct ath10k *ar = htt->ar;
|
||||
struct device *dev = ar->dev;
|
||||
struct ieee80211_tx_info *info;
|
||||
struct ath10k_skb_cb *skb_cb;
|
||||
struct sk_buff *msdu;
|
||||
|
||||
lockdep_assert_held(&htt->tx_lock);
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt tx completion msdu_id %u discard %d no_ack %d\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt tx completion msdu_id %u discard %d no_ack %d\n",
|
||||
tx_done->msdu_id, !!tx_done->discard, !!tx_done->no_ack);
|
||||
|
||||
if (tx_done->msdu_id >= htt->max_num_pending_tx) {
|
||||
ath10k_warn("warning: msdu_id %d too big, ignoring\n",
|
||||
ath10k_warn(ar, "warning: msdu_id %d too big, ignoring\n",
|
||||
tx_done->msdu_id);
|
||||
return;
|
||||
}
|
||||
@ -182,7 +183,7 @@ void ath10k_peer_map_event(struct ath10k_htt *htt,
|
||||
wake_up(&ar->peer_mapping_wq);
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt peer map vdev %d peer %pM id %d\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt peer map vdev %d peer %pM id %d\n",
|
||||
ev->vdev_id, ev->addr, ev->peer_id);
|
||||
|
||||
set_bit(ev->peer_id, peer->peer_ids);
|
||||
@ -199,12 +200,12 @@ void ath10k_peer_unmap_event(struct ath10k_htt *htt,
|
||||
spin_lock_bh(&ar->data_lock);
|
||||
peer = ath10k_peer_find_by_id(ar, ev->peer_id);
|
||||
if (!peer) {
|
||||
ath10k_warn("peer-unmap-event: unknown peer id %d\n",
|
||||
ath10k_warn(ar, "peer-unmap-event: unknown peer id %d\n",
|
||||
ev->peer_id);
|
||||
goto exit;
|
||||
}
|
||||
|
||||
ath10k_dbg(ATH10K_DBG_HTT, "htt peer unmap vdev %d peer %pM id %d\n",
|
||||
ath10k_dbg(ar, ATH10K_DBG_HTT, "htt peer unmap vdev %d peer %pM id %d\n",
|
||||
peer->vdev_id, peer->addr, ev->peer_id);
|
||||
|
||||
clear_bit(ev->peer_id, peer->peer_ids);
|
||||
|
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user