forked from Minki/linux
asm-generic: cross-architecture timer cleanup
This cleans up two ancient timer features that were never completed in the past, CONFIG_GENERIC_CLOCKEVENTS and CONFIG_ARCH_USES_GETTIMEOFFSET. There was only one user left for the ARCH_USES_GETTIMEOFFSET variant of clocksource implementations, the ARM EBSA110 platform. Rather than changing to use modern timekeeping, we remove the platform entirely as Russell no longer uses his machine and nobody else seems to have one any more. The conditional code for using arch_gettimeoffset() is removed as a result. For CONFIG_GENERIC_CLOCKEVENTS, there are still a couple of platforms not using clockevent drivers: parisc, ia64, most of m68k, and one Arm platform. These all do timer ticks slighly differently, and this gets cleaned up to the point they at least all call the same helper function. Instead of most platforms using 'select GENERIC_CLOCKEVENTS' in Kconfig, the polarity is now reversed, with the few remaining ones selecting LEGACY_TIMER_TICK instead. Signed-off-by: Arnd Bergmann <arnd@arndb.de> -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAl/Y1v8ACgkQmmx57+YA GNmCvQ/9EDlgCt92r8SB+LGafDtgB8TUQZeIrs9S2mByzdxwnw0lxObIXFCnhQgh RpG3dR+ONRDnC5eI149B377JOEFMZWe2+BtYHUHkFARtUEWatslQcz7yAGvVRK/l TS/qReb6piKltlzuanF1bMZbjy2OhlaDRcm+OlC3y5mALR33M4emb+rJ6cSdfk3K v1iZhrxtfQT77ztesh/oPkPiyQ6kNcz7SfpyYOb6f5VLlml2BZ7YwBSVyGY7urHk RL3XqOUP4KKlMEAI8w0E2nvft6Fk+luziBhrMYWK0GvbmI1OESENuX/c6tgT2OQ1 DRaVHvcPG/EAY8adOKxxVyHhEJDSoz5GJV/EtjlOegsJk6RomczR1uuiT3Kvm7Ah PktMKv4xQht1E15KPSKbOvNIEP18w2s5z6gw+jVDv8pw42pVEQManm1D+BICqrhl fcpw6T1drf9UxAjwX4+zXtmNs+a+mqiFG8puU4VVgT4GpQ8umHvunXz2WUjZO0jc 3m8ErJHBvtJwW5TOHGyXnjl9SkwPzHOfF6IcXTYWEDU4/gQIK9TwUvCjLc0lE27t FMCV2ds7/K1CXwRgpa5IrefSkb8yOXSbRZ56NqqF7Ekxw4J5bYRSaY7jb+qD/e+3 5O1y+iPxFrpH+16hSahvzrtcdFNbLQvBBuRtEQOYuHLt2UJrNoU= =QpNs -----END PGP SIGNATURE----- Merge tag 'asm-generic-timers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic Pull asm-generic cross-architecture timer cleanup from Arnd Bergmann: "This cleans up two ancient timer features that were never completed in the past, CONFIG_GENERIC_CLOCKEVENTS and CONFIG_ARCH_USES_GETTIMEOFFSET. There was only one user left for the ARCH_USES_GETTIMEOFFSET variant of clocksource implementations, the ARM EBSA110 platform. Rather than changing to use modern timekeeping, we remove the platform entirely as Russell no longer uses his machine and nobody else seems to have one any more. The conditional code for using arch_gettimeoffset() is removed as a result. For CONFIG_GENERIC_CLOCKEVENTS, there are still a couple of platforms not using clockevent drivers: parisc, ia64, most of m68k, and one Arm platform. These all do timer ticks slighly differently, and this gets cleaned up to the point they at least all call the same helper function. Instead of most platforms using 'select GENERIC_CLOCKEVENTS' in Kconfig, the polarity is now reversed, with the few remaining ones selecting LEGACY_TIMER_TICK instead" * tag 'asm-generic-timers-5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: timekeeping: default GENERIC_CLOCKEVENTS to enabled timekeeping: remove xtime_update m68k: remove timer_interrupt() function m68k: change remaining timers to legacy_timer_tick m68k: m68328: use legacy_timer_tick() m68k: sun3/sun3c: use legacy_timer_tick m68k: split heartbeat out of timer function m68k: coldfire: use legacy_timer_tick() parisc: use legacy_timer_tick ARM: rpc: use legacy_timer_tick ia64: convert to legacy_timer_tick timekeeping: add CONFIG_LEGACY_TIMER_TICK timekeeping: remove arch_gettimeoffset net: remove am79c961a driver ARM: remove ebsa110 platform
This commit is contained in:
Linus Torvalds
commit
7a932e5702
@ -1,6 +1,6 @@
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#
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#
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# Feature name: clockevents
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# Feature name: clockevents
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# Kconfig: GENERIC_CLOCKEVENTS
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# Kconfig: !LEGACY_TIMER_TICK
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# description: arch support generic clock events
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# description: arch support generic clock events
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#
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#
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-----------------------
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-----------------------
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@ -8,20 +8,20 @@
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-----------------------
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-----------------------
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| alpha: | ok |
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| alpha: | ok |
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| arc: | ok |
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| arc: | ok |
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| arm: | ok |
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| arm: | TODO |
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| arm64: | ok |
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| arm64: | ok |
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| c6x: | ok |
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| c6x: | ok |
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| csky: | ok |
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| csky: | ok |
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| h8300: | ok |
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| h8300: | ok |
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| hexagon: | ok |
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| hexagon: | ok |
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| ia64: | TODO |
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| ia64: | TODO |
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| m68k: | ok |
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| m68k: | TODO |
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| microblaze: | ok |
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| microblaze: | ok |
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| mips: | ok |
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| mips: | ok |
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| nds32: | ok |
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| nds32: | ok |
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| nios2: | ok |
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| nios2: | ok |
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| openrisc: | ok |
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| openrisc: | ok |
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| parisc: | ok |
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| parisc: | TODO |
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| powerpc: | ok |
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| powerpc: | ok |
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| riscv: | ok |
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| riscv: | ok |
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| s390: | ok |
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| s390: | ok |
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@ -1,33 +0,0 @@
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#
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# Feature name: modern-timekeeping
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# Kconfig: !ARCH_USES_GETTIMEOFFSET
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# description: arch does not use arch_gettimeoffset() anymore
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#
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-----------------------
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| arch |status|
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-----------------------
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| alpha: | ok |
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| arc: | ok |
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| arm: | TODO |
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| arm64: | ok |
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| c6x: | ok |
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| csky: | ok |
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| h8300: | ok |
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| hexagon: | ok |
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| ia64: | ok |
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| m68k: | ok |
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| microblaze: | ok |
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| mips: | ok |
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| nds32: | ok |
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| nios2: | ok |
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| openrisc: | ok |
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| parisc: | ok |
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| powerpc: | ok |
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| riscv: | ok |
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| s390: | ok |
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| sh: | ok |
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| sparc: | ok |
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| um: | ok |
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| x86: | ok |
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| xtensa: | ok |
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-----------------------
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@ -1799,14 +1799,6 @@ F: drivers/firmware/turris-mox-rwtm.c
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F: drivers/gpio/gpio-moxtet.c
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F: drivers/gpio/gpio-moxtet.c
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F: include/linux/moxtet.h
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F: include/linux/moxtet.h
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ARM/EBSA110 MACHINE SUPPORT
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M: Russell King <linux@armlinux.org.uk>
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L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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W: http://www.armlinux.org.uk/
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F: arch/arm/mach-ebsa110/
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F: drivers/net/ethernet/amd/am79c961a.*
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ARM/ENERGY MICRO (SILICON LABS) EFM32 SUPPORT
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ARM/ENERGY MICRO (SILICON LABS) EFM32 SUPPORT
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M: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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M: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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R: Pengutronix Kernel Team <kernel@pengutronix.de>
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R: Pengutronix Kernel Team <kernel@pengutronix.de>
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@ -27,7 +27,6 @@ config ALPHA
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select ARCH_WANT_IPC_PARSE_VERSION
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select ARCH_WANT_IPC_PARSE_VERSION
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select ARCH_HAVE_NMI_SAFE_CMPXCHG
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select ARCH_HAVE_NMI_SAFE_CMPXCHG
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select AUDIT_ARCH
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select AUDIT_ARCH
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select GENERIC_CLOCKEVENTS
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select GENERIC_CPU_VULNERABILITIES
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select GENERIC_CPU_VULNERABILITIES
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_SMP_IDLE_THREAD
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select GENERIC_STRNCPY_FROM_USER
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select GENERIC_STRNCPY_FROM_USER
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@ -19,7 +19,6 @@ config ARC
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select COMMON_CLK
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select COMMON_CLK
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select DMA_DIRECT_REMAP
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select DMA_DIRECT_REMAP
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select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
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select GENERIC_ATOMIC64 if !ISA_ARCV2 || !(ARC_HAS_LL64 && ARC_HAS_LLSC)
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select GENERIC_CLOCKEVENTS
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select GENERIC_FIND_FIRST_BIT
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select GENERIC_FIND_FIRST_BIT
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# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
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# for now, we don't need GENERIC_IRQ_PROBE, CONFIG_GENERIC_IRQ_CHIP
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select GENERIC_IRQ_SHOW
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select GENERIC_IRQ_SHOW
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@ -269,8 +269,7 @@ config PHYS_OFFSET
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hex "Physical address of main memory" if MMU
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hex "Physical address of main memory" if MMU
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depends on !ARM_PATCH_PHYS_VIRT
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depends on !ARM_PATCH_PHYS_VIRT
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default DRAM_BASE if !MMU
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default DRAM_BASE if !MMU
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default 0x00000000 if ARCH_EBSA110 || \
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default 0x00000000 if ARCH_FOOTBRIDGE
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ARCH_FOOTBRIDGE
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default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
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default 0x10000000 if ARCH_OMAP1 || ARCH_RPC
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default 0x20000000 if ARCH_S5PV210
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default 0x20000000 if ARCH_S5PV210
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default 0xc0000000 if ARCH_SA1100
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default 0xc0000000 if ARCH_SA1100
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@ -324,7 +323,6 @@ config ARCH_MULTIPLATFORM
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select AUTO_ZRELADDR
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select AUTO_ZRELADDR
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select TIMER_OF
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select TIMER_OF
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select COMMON_CLK
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select COMMON_CLK
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_MULTI_HANDLER
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select GENERIC_IRQ_MULTI_HANDLER
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select HAVE_PCI
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select HAVE_PCI
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select PCI_DOMAINS_GENERIC if PCI
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select PCI_DOMAINS_GENERIC if PCI
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@ -339,25 +337,10 @@ config ARM_SINGLE_ARMV7M
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select TIMER_OF
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select TIMER_OF
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select COMMON_CLK
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select COMMON_CLK
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select CPU_V7M
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select CPU_V7M
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select GENERIC_CLOCKEVENTS
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select NO_IOPORT_MAP
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select NO_IOPORT_MAP
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select SPARSE_IRQ
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select SPARSE_IRQ
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select USE_OF
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select USE_OF
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config ARCH_EBSA110
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bool "EBSA-110"
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select ARCH_USES_GETTIMEOFFSET
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select CPU_SA110
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select ISA
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select NEED_MACH_IO_H
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select NEED_MACH_MEMORY_H
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select NO_IOPORT_MAP
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help
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This is an evaluation board for the StrongARM processor available
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from Digital. It has limited hardware on-board, including an
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Ethernet interface, two PCMCIA sockets, two serial ports and a
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parallel port.
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config ARCH_EP93XX
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config ARCH_EP93XX
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bool "EP93xx-based"
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bool "EP93xx-based"
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select ARCH_SPARSEMEM_ENABLE
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select ARCH_SPARSEMEM_ENABLE
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@ -368,7 +351,6 @@ config ARCH_EP93XX
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select CLKDEV_LOOKUP
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select CLKSRC_MMIO
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select CPU_ARM920T
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select CPU_ARM920T
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select GENERIC_CLOCKEVENTS
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select GPIOLIB
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select GPIOLIB
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select HAVE_LEGACY_CLK
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select HAVE_LEGACY_CLK
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help
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help
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@ -378,7 +360,6 @@ config ARCH_FOOTBRIDGE
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bool "FootBridge"
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bool "FootBridge"
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select CPU_SA110
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select CPU_SA110
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select FOOTBRIDGE
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select FOOTBRIDGE
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select GENERIC_CLOCKEVENTS
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select HAVE_IDE
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select HAVE_IDE
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select NEED_MACH_IO_H if !MMU
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select NEED_MACH_IO_H if !MMU
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select NEED_MACH_MEMORY_H
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select NEED_MACH_MEMORY_H
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@ -406,7 +387,6 @@ config ARCH_IXP4XX
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select ARCH_SUPPORTS_BIG_ENDIAN
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select ARCH_SUPPORTS_BIG_ENDIAN
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select CPU_XSCALE
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select CPU_XSCALE
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select DMABOUNCE if PCI
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select DMABOUNCE if PCI
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_MULTI_HANDLER
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select GENERIC_IRQ_MULTI_HANDLER
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select GPIO_IXP4XX
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select GPIO_IXP4XX
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select GPIOLIB
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select GPIOLIB
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@ -422,7 +402,6 @@ config ARCH_IXP4XX
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config ARCH_DOVE
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config ARCH_DOVE
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bool "Marvell Dove"
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bool "Marvell Dove"
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select CPU_PJ4
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select CPU_PJ4
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_MULTI_HANDLER
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select GENERIC_IRQ_MULTI_HANDLER
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select GPIOLIB
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select GPIOLIB
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select HAVE_PCI
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select HAVE_PCI
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@ -446,7 +425,6 @@ config ARCH_PXA
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select CLKSRC_MMIO
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select CLKSRC_MMIO
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select TIMER_OF
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select TIMER_OF
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select CPU_XSCALE if !CPU_XSC3
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select CPU_XSCALE if !CPU_XSC3
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_MULTI_HANDLER
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select GENERIC_IRQ_MULTI_HANDLER
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select GPIO_PXA
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select GPIO_PXA
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select GPIOLIB
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select GPIOLIB
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@ -469,6 +447,7 @@ config ARCH_RPC
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select HAVE_IDE
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select HAVE_IDE
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select HAVE_PATA_PLATFORM
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select HAVE_PATA_PLATFORM
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select ISA_DMA_API
|
select ISA_DMA_API
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|
select LEGACY_TIMER_TICK
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select NEED_MACH_IO_H
|
select NEED_MACH_IO_H
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select NEED_MACH_MEMORY_H
|
select NEED_MACH_MEMORY_H
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select NO_IOPORT_MAP
|
select NO_IOPORT_MAP
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@ -486,7 +465,6 @@ config ARCH_SA1100
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select COMMON_CLK
|
select COMMON_CLK
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select CPU_FREQ
|
select CPU_FREQ
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select CPU_SA1100
|
select CPU_SA1100
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select GENERIC_CLOCKEVENTS
|
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||||||
select GENERIC_IRQ_MULTI_HANDLER
|
select GENERIC_IRQ_MULTI_HANDLER
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select GPIOLIB
|
select GPIOLIB
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select HAVE_IDE
|
select HAVE_IDE
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@ -501,7 +479,6 @@ config ARCH_S3C24XX
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bool "Samsung S3C24XX SoCs"
|
bool "Samsung S3C24XX SoCs"
|
||||||
select ATAGS
|
select ATAGS
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||||||
select CLKSRC_SAMSUNG_PWM
|
select CLKSRC_SAMSUNG_PWM
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GPIO_SAMSUNG
|
select GPIO_SAMSUNG
|
||||||
select GPIOLIB
|
select GPIOLIB
|
||||||
select GENERIC_IRQ_MULTI_HANDLER
|
select GENERIC_IRQ_MULTI_HANDLER
|
||||||
@ -524,7 +501,6 @@ config ARCH_OMAP1
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|||||||
select ARCH_OMAP
|
select ARCH_OMAP
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||||||
select CLKDEV_LOOKUP
|
select CLKDEV_LOOKUP
|
||||||
select CLKSRC_MMIO
|
select CLKSRC_MMIO
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_IRQ_CHIP
|
select GENERIC_IRQ_CHIP
|
||||||
select GENERIC_IRQ_MULTI_HANDLER
|
select GENERIC_IRQ_MULTI_HANDLER
|
||||||
select GPIOLIB
|
select GPIOLIB
|
||||||
@ -787,7 +763,6 @@ config ARCH_ACORN
|
|||||||
|
|
||||||
config PLAT_IOP
|
config PLAT_IOP
|
||||||
bool
|
bool
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
|
|
||||||
config PLAT_ORION
|
config PLAT_ORION
|
||||||
bool
|
bool
|
||||||
@ -1178,7 +1153,6 @@ config HAVE_SMP
|
|||||||
config SMP
|
config SMP
|
||||||
bool "Symmetric Multi-Processing"
|
bool "Symmetric Multi-Processing"
|
||||||
depends on CPU_V6K || CPU_V7
|
depends on CPU_V6K || CPU_V7
|
||||||
depends on GENERIC_CLOCKEVENTS
|
|
||||||
depends on HAVE_SMP
|
depends on HAVE_SMP
|
||||||
depends on MMU || ARM_MPU
|
depends on MMU || ARM_MPU
|
||||||
select IRQ_WORK
|
select IRQ_WORK
|
||||||
@ -1372,7 +1346,6 @@ config ARCH_NR_GPIO
|
|||||||
|
|
||||||
config HZ_FIXED
|
config HZ_FIXED
|
||||||
int
|
int
|
||||||
default 200 if ARCH_EBSA110
|
|
||||||
default 128 if SOC_AT91RM9200
|
default 128 if SOC_AT91RM9200
|
||||||
default 0
|
default 0
|
||||||
|
|
||||||
@ -1583,9 +1556,7 @@ config FORCE_MAX_ZONEORDER
|
|||||||
a value of 11 means that the largest free memory block is 2^10 pages.
|
a value of 11 means that the largest free memory block is 2^10 pages.
|
||||||
|
|
||||||
config ALIGNMENT_TRAP
|
config ALIGNMENT_TRAP
|
||||||
bool
|
def_bool CPU_CP15_MMU
|
||||||
depends on CPU_CP15_MMU
|
|
||||||
default y if !ARCH_EBSA110
|
|
||||||
select HAVE_PROC_CPU if PROC_FS
|
select HAVE_PROC_CPU if PROC_FS
|
||||||
help
|
help
|
||||||
ARM processors cannot fetch/store information which is not
|
ARM processors cannot fetch/store information which is not
|
||||||
@ -1780,7 +1751,7 @@ config CMDLINE
|
|||||||
string "Default kernel command string"
|
string "Default kernel command string"
|
||||||
default ""
|
default ""
|
||||||
help
|
help
|
||||||
On some architectures (EBSA110 and CATS), there is currently no way
|
On some architectures (e.g. CATS), there is currently no way
|
||||||
for the boot loader to pass arguments to the kernel. For these
|
for the boot loader to pass arguments to the kernel. For these
|
||||||
architectures, you should supply some command-line options at build
|
architectures, you should supply some command-line options at build
|
||||||
time by entering them here. As a minimum, you should specify the
|
time by entering them here. As a minimum, you should specify the
|
||||||
|
|||||||
@ -1567,7 +1567,7 @@ config DEBUG_SIRFSOC_UART
|
|||||||
config DEBUG_UART_FLOW_CONTROL
|
config DEBUG_UART_FLOW_CONTROL
|
||||||
bool "Enable flow control (CTS) for the debug UART"
|
bool "Enable flow control (CTS) for the debug UART"
|
||||||
depends on DEBUG_LL
|
depends on DEBUG_LL
|
||||||
default y if ARCH_EBSA110 || DEBUG_FOOTBRIDGE_COM1 || DEBUG_GEMINI || ARCH_RPC
|
default y if DEBUG_FOOTBRIDGE_COM1 || DEBUG_GEMINI || ARCH_RPC
|
||||||
help
|
help
|
||||||
Some UART ports are connected to terminals that will use modem
|
Some UART ports are connected to terminals that will use modem
|
||||||
control signals to indicate whether they are ready to receive text.
|
control signals to indicate whether they are ready to receive text.
|
||||||
@ -1639,7 +1639,7 @@ config DEBUG_UART_PL01X
|
|||||||
|
|
||||||
# Compatibility options for 8250
|
# Compatibility options for 8250
|
||||||
config DEBUG_UART_8250
|
config DEBUG_UART_8250
|
||||||
def_bool ARCH_EBSA110 || ARCH_IOP32X || ARCH_IXP4XX || ARCH_RPC
|
def_bool ARCH_IOP32X || ARCH_IXP4XX || ARCH_RPC
|
||||||
|
|
||||||
config DEBUG_UART_PHYS
|
config DEBUG_UART_PHYS
|
||||||
hex "Physical base address of debug UART"
|
hex "Physical base address of debug UART"
|
||||||
@ -1743,7 +1743,6 @@ config DEBUG_UART_PHYS
|
|||||||
default 0xe8008000 if DEBUG_R7S72100_SCIF2 || DEBUG_R7S9210_SCIF2
|
default 0xe8008000 if DEBUG_R7S72100_SCIF2 || DEBUG_R7S9210_SCIF2
|
||||||
default 0xe8009000 if DEBUG_R7S9210_SCIF4
|
default 0xe8009000 if DEBUG_R7S9210_SCIF4
|
||||||
default 0xf0000000 if DEBUG_DIGICOLOR_UA0
|
default 0xf0000000 if DEBUG_DIGICOLOR_UA0
|
||||||
default 0xf0000be0 if ARCH_EBSA110
|
|
||||||
default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE
|
default 0xf1012000 if DEBUG_MVEBU_UART0_ALTERNATE
|
||||||
default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE
|
default 0xf1012100 if DEBUG_MVEBU_UART1_ALTERNATE
|
||||||
default 0xf7fc9000 if DEBUG_BERLIN_UART
|
default 0xf7fc9000 if DEBUG_BERLIN_UART
|
||||||
@ -1790,7 +1789,6 @@ config DEBUG_UART_VIRT
|
|||||||
default 0xc8821000 if DEBUG_RV1108_UART1
|
default 0xc8821000 if DEBUG_RV1108_UART1
|
||||||
default 0xc8912000 if DEBUG_RV1108_UART0
|
default 0xc8912000 if DEBUG_RV1108_UART0
|
||||||
default 0xe0010fe0 if ARCH_RPC
|
default 0xe0010fe0 if ARCH_RPC
|
||||||
default 0xf0000be0 if ARCH_EBSA110
|
|
||||||
default 0xf0010000 if DEBUG_ASM9260_UART
|
default 0xf0010000 if DEBUG_ASM9260_UART
|
||||||
default 0xf0100000 if DEBUG_DIGICOLOR_UA0
|
default 0xf0100000 if DEBUG_DIGICOLOR_UA0
|
||||||
default 0xf01fb000 if DEBUG_NOMADIK_UART
|
default 0xf01fb000 if DEBUG_NOMADIK_UART
|
||||||
|
|||||||
@ -168,7 +168,6 @@ machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
|
|||||||
machine-$(CONFIG_ARCH_DAVINCI) += davinci
|
machine-$(CONFIG_ARCH_DAVINCI) += davinci
|
||||||
machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor
|
machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor
|
||||||
machine-$(CONFIG_ARCH_DOVE) += dove
|
machine-$(CONFIG_ARCH_DOVE) += dove
|
||||||
machine-$(CONFIG_ARCH_EBSA110) += ebsa110
|
|
||||||
machine-$(CONFIG_ARCH_EFM32) += efm32
|
machine-$(CONFIG_ARCH_EFM32) += efm32
|
||||||
machine-$(CONFIG_ARCH_EP93XX) += ep93xx
|
machine-$(CONFIG_ARCH_EP93XX) += ep93xx
|
||||||
machine-$(CONFIG_ARCH_EXYNOS) += exynos
|
machine-$(CONFIG_ARCH_EXYNOS) += exynos
|
||||||
@ -235,13 +234,6 @@ plat-$(CONFIG_PLAT_ORION) += orion
|
|||||||
plat-$(CONFIG_PLAT_PXA) += pxa
|
plat-$(CONFIG_PLAT_PXA) += pxa
|
||||||
plat-$(CONFIG_PLAT_VERSATILE) += versatile
|
plat-$(CONFIG_PLAT_VERSATILE) += versatile
|
||||||
|
|
||||||
ifeq ($(CONFIG_ARCH_EBSA110),y)
|
|
||||||
# This is what happens if you forget the IOCS16 line.
|
|
||||||
# PCMCIA cards stop working.
|
|
||||||
CFLAGS_3c589_cs.o :=-DISA_SIXTEEN_BIT_PERIPHERAL
|
|
||||||
export CFLAGS_3c589_cs.o
|
|
||||||
endif
|
|
||||||
|
|
||||||
# The byte offset of the kernel image in RAM from the start of RAM.
|
# The byte offset of the kernel image in RAM from the start of RAM.
|
||||||
TEXT_OFFSET := $(textofs-y)
|
TEXT_OFFSET := $(textofs-y)
|
||||||
|
|
||||||
|
|||||||
@ -1,74 +0,0 @@
|
|||||||
CONFIG_SYSVIPC=y
|
|
||||||
CONFIG_BSD_PROCESS_ACCT=y
|
|
||||||
CONFIG_LOG_BUF_SHIFT=14
|
|
||||||
CONFIG_EXPERT=y
|
|
||||||
CONFIG_MODULES=y
|
|
||||||
CONFIG_ARCH_EBSA110=y
|
|
||||||
CONFIG_PCCARD=m
|
|
||||||
CONFIG_I82365=m
|
|
||||||
CONFIG_LEDS=y
|
|
||||||
CONFIG_ZBOOT_ROM_TEXT=0x0
|
|
||||||
CONFIG_ZBOOT_ROM_BSS=0x0
|
|
||||||
CONFIG_CMDLINE="root=/dev/nfs rw mem=16M console=ttyS1,38400n8"
|
|
||||||
CONFIG_FPE_NWFPE=y
|
|
||||||
CONFIG_FPE_FASTFPE=y
|
|
||||||
CONFIG_BINFMT_AOUT=y
|
|
||||||
CONFIG_NET=y
|
|
||||||
CONFIG_PACKET=y
|
|
||||||
CONFIG_UNIX=y
|
|
||||||
CONFIG_INET=y
|
|
||||||
CONFIG_IP_MULTICAST=y
|
|
||||||
CONFIG_IP_ADVANCED_ROUTER=y
|
|
||||||
CONFIG_IP_MULTIPLE_TABLES=y
|
|
||||||
CONFIG_IP_ROUTE_VERBOSE=y
|
|
||||||
CONFIG_IP_PNP=y
|
|
||||||
CONFIG_IP_PNP_BOOTP=y
|
|
||||||
CONFIG_SYN_COOKIES=y
|
|
||||||
CONFIG_IPV6=y
|
|
||||||
CONFIG_NETFILTER=y
|
|
||||||
CONFIG_IP_NF_IPTABLES=y
|
|
||||||
CONFIG_IP_NF_MATCH_ECN=y
|
|
||||||
CONFIG_IP_NF_MATCH_TTL=y
|
|
||||||
CONFIG_IP_NF_FILTER=y
|
|
||||||
CONFIG_IP_NF_TARGET_REJECT=y
|
|
||||||
CONFIG_IP_NF_TARGET_LOG=y
|
|
||||||
CONFIG_IP_NF_MANGLE=y
|
|
||||||
CONFIG_IP_NF_TARGET_ECN=y
|
|
||||||
CONFIG_IP6_NF_IPTABLES=y
|
|
||||||
CONFIG_IP6_NF_MATCH_FRAG=y
|
|
||||||
CONFIG_IP6_NF_MATCH_OPTS=y
|
|
||||||
CONFIG_IP6_NF_MATCH_HL=y
|
|
||||||
CONFIG_IP6_NF_MATCH_RT=y
|
|
||||||
CONFIG_IP6_NF_FILTER=y
|
|
||||||
CONFIG_IP6_NF_MANGLE=y
|
|
||||||
CONFIG_FW_LOADER=m
|
|
||||||
CONFIG_PARPORT=y
|
|
||||||
CONFIG_PARPORT_PC=y
|
|
||||||
CONFIG_PARPORT_PC_FIFO=y
|
|
||||||
CONFIG_PARPORT_1284=y
|
|
||||||
CONFIG_BLK_DEV_RAM=y
|
|
||||||
CONFIG_NETDEVICES=y
|
|
||||||
CONFIG_NET_ETHERNET=y
|
|
||||||
CONFIG_ARM_AM79C961A=y
|
|
||||||
CONFIG_NET_PCMCIA=y
|
|
||||||
CONFIG_PCMCIA_PCNET=m
|
|
||||||
CONFIG_PPP=m
|
|
||||||
CONFIG_PPP_ASYNC=m
|
|
||||||
CONFIG_PPP_DEFLATE=m
|
|
||||||
CONFIG_PPP_BSDCOMP=m
|
|
||||||
# CONFIG_INPUT is not set
|
|
||||||
# CONFIG_SERIO is not set
|
|
||||||
# CONFIG_VT is not set
|
|
||||||
CONFIG_SERIAL_8250=y
|
|
||||||
CONFIG_SERIAL_8250_CONSOLE=y
|
|
||||||
CONFIG_SERIAL_8250_CS=m
|
|
||||||
CONFIG_PRINTER=m
|
|
||||||
CONFIG_WATCHDOG=y
|
|
||||||
CONFIG_SOFT_WATCHDOG=y
|
|
||||||
CONFIG_AUTOFS4_FS=y
|
|
||||||
CONFIG_MINIX_FS=y
|
|
||||||
CONFIG_NFS_FS=y
|
|
||||||
CONFIG_NFS_V3=y
|
|
||||||
CONFIG_ROOT_NFS=y
|
|
||||||
CONFIG_PARTITION_ADVANCED=y
|
|
||||||
# CONFIG_MSDOS_PARTITION is not set
|
|
||||||
@ -7,8 +7,6 @@
|
|||||||
#ifndef __ASM_ARM_MACH_TIME_H
|
#ifndef __ASM_ARM_MACH_TIME_H
|
||||||
#define __ASM_ARM_MACH_TIME_H
|
#define __ASM_ARM_MACH_TIME_H
|
||||||
|
|
||||||
extern void timer_tick(void);
|
|
||||||
|
|
||||||
typedef void (*clock_access_fn)(struct timespec64 *);
|
typedef void (*clock_access_fn)(struct timespec64 *);
|
||||||
extern int register_persistent_clock(clock_access_fn read_persistent);
|
extern int register_persistent_clock(clock_access_fn read_persistent);
|
||||||
|
|
||||||
|
|||||||
@ -17,7 +17,7 @@ CFLAGS_REMOVE_return_address.o = -pg
|
|||||||
# Object file lists.
|
# Object file lists.
|
||||||
|
|
||||||
obj-y := elf.o entry-common.o irq.o opcodes.o \
|
obj-y := elf.o entry-common.o irq.o opcodes.o \
|
||||||
process.o ptrace.o reboot.o \
|
process.o ptrace.o reboot.o io.o \
|
||||||
setup.o signal.o sigreturn_codes.o \
|
setup.o signal.o sigreturn_codes.o \
|
||||||
stacktrace.o sys_arm.o time.o traps.o
|
stacktrace.o sys_arm.o time.o traps.o
|
||||||
|
|
||||||
@ -83,10 +83,6 @@ AFLAGS_iwmmxt.o := -Wa,-mcpu=iwmmxt
|
|||||||
obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o
|
obj-$(CONFIG_ARM_CPU_TOPOLOGY) += topology.o
|
||||||
obj-$(CONFIG_VDSO) += vdso.o
|
obj-$(CONFIG_VDSO) += vdso.o
|
||||||
obj-$(CONFIG_EFI) += efi.o
|
obj-$(CONFIG_EFI) += efi.o
|
||||||
|
|
||||||
ifneq ($(CONFIG_ARCH_EBSA110),y)
|
|
||||||
obj-y += io.o
|
|
||||||
endif
|
|
||||||
obj-$(CONFIG_PARAVIRT) += paravirt.o
|
obj-$(CONFIG_PARAVIRT) += paravirt.o
|
||||||
|
|
||||||
head-y := head$(MMUEXT).o
|
head-y := head$(MMUEXT).o
|
||||||
|
|||||||
@ -60,20 +60,6 @@ unsigned long profile_pc(struct pt_regs *regs)
|
|||||||
EXPORT_SYMBOL(profile_pc);
|
EXPORT_SYMBOL(profile_pc);
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifndef CONFIG_GENERIC_CLOCKEVENTS
|
|
||||||
/*
|
|
||||||
* Kernel system timer support.
|
|
||||||
*/
|
|
||||||
void timer_tick(void)
|
|
||||||
{
|
|
||||||
profile_tick(CPU_PROFILING);
|
|
||||||
xtime_update(1);
|
|
||||||
#ifndef CONFIG_SMP
|
|
||||||
update_process_times(user_mode(get_irq_regs()));
|
|
||||||
#endif
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static void dummy_clock_access(struct timespec64 *ts)
|
static void dummy_clock_access(struct timespec64 *ts)
|
||||||
{
|
{
|
||||||
ts->tv_sec = 0;
|
ts->tv_sec = 0;
|
||||||
|
|||||||
@ -1,8 +0,0 @@
|
|||||||
# SPDX-License-Identifier: GPL-2.0-only
|
|
||||||
#
|
|
||||||
# Makefile for the linux kernel.
|
|
||||||
#
|
|
||||||
|
|
||||||
# Object file lists.
|
|
||||||
|
|
||||||
obj-y := core.o io.o leds.o
|
|
||||||
@ -1,5 +0,0 @@
|
|||||||
# SPDX-License-Identifier: GPL-2.0-only
|
|
||||||
zreladdr-y += 0x00008000
|
|
||||||
params_phys-y := 0x00000400
|
|
||||||
initrd_phys-y := 0x00800000
|
|
||||||
|
|
||||||
@ -1,323 +0,0 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0-only
|
|
||||||
/*
|
|
||||||
* linux/arch/arm/mach-ebsa110/core.c
|
|
||||||
*
|
|
||||||
* Copyright (C) 1998-2001 Russell King
|
|
||||||
*
|
|
||||||
* Extra MM routines for the EBSA-110 architecture
|
|
||||||
*/
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
#include <linux/mm.h>
|
|
||||||
#include <linux/interrupt.h>
|
|
||||||
#include <linux/serial_8250.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/io.h>
|
|
||||||
|
|
||||||
#include <mach/hardware.h>
|
|
||||||
#include <asm/irq.h>
|
|
||||||
#include <asm/setup.h>
|
|
||||||
#include <asm/mach-types.h>
|
|
||||||
#include <asm/page.h>
|
|
||||||
#include <asm/system_misc.h>
|
|
||||||
|
|
||||||
#include <asm/mach/arch.h>
|
|
||||||
#include <asm/mach/irq.h>
|
|
||||||
#include <asm/mach/map.h>
|
|
||||||
|
|
||||||
#include <asm/mach/time.h>
|
|
||||||
|
|
||||||
#include "core.h"
|
|
||||||
|
|
||||||
static void ebsa110_mask_irq(struct irq_data *d)
|
|
||||||
{
|
|
||||||
__raw_writeb(1 << d->irq, IRQ_MCLR);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ebsa110_unmask_irq(struct irq_data *d)
|
|
||||||
{
|
|
||||||
__raw_writeb(1 << d->irq, IRQ_MSET);
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct irq_chip ebsa110_irq_chip = {
|
|
||||||
.irq_ack = ebsa110_mask_irq,
|
|
||||||
.irq_mask = ebsa110_mask_irq,
|
|
||||||
.irq_unmask = ebsa110_unmask_irq,
|
|
||||||
};
|
|
||||||
|
|
||||||
static void __init ebsa110_init_irq(void)
|
|
||||||
{
|
|
||||||
unsigned long flags;
|
|
||||||
unsigned int irq;
|
|
||||||
|
|
||||||
local_irq_save(flags);
|
|
||||||
__raw_writeb(0xff, IRQ_MCLR);
|
|
||||||
__raw_writeb(0x55, IRQ_MSET);
|
|
||||||
__raw_writeb(0x00, IRQ_MSET);
|
|
||||||
if (__raw_readb(IRQ_MASK) != 0x55)
|
|
||||||
while (1);
|
|
||||||
__raw_writeb(0xff, IRQ_MCLR); /* clear all interrupt enables */
|
|
||||||
local_irq_restore(flags);
|
|
||||||
|
|
||||||
for (irq = 0; irq < NR_IRQS; irq++) {
|
|
||||||
irq_set_chip_and_handler(irq, &ebsa110_irq_chip,
|
|
||||||
handle_level_irq);
|
|
||||||
irq_clear_status_flags(irq, IRQ_NOREQUEST | IRQ_NOPROBE);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct map_desc ebsa110_io_desc[] __initdata = {
|
|
||||||
/*
|
|
||||||
* sparse external-decode ISAIO space
|
|
||||||
*/
|
|
||||||
{ /* IRQ_STAT/IRQ_MCLR */
|
|
||||||
.virtual = (unsigned long)IRQ_STAT,
|
|
||||||
.pfn = __phys_to_pfn(TRICK4_PHYS),
|
|
||||||
.length = TRICK4_SIZE,
|
|
||||||
.type = MT_DEVICE
|
|
||||||
}, { /* IRQ_MASK/IRQ_MSET */
|
|
||||||
.virtual = (unsigned long)IRQ_MASK,
|
|
||||||
.pfn = __phys_to_pfn(TRICK3_PHYS),
|
|
||||||
.length = TRICK3_SIZE,
|
|
||||||
.type = MT_DEVICE
|
|
||||||
}, { /* SOFT_BASE */
|
|
||||||
.virtual = (unsigned long)SOFT_BASE,
|
|
||||||
.pfn = __phys_to_pfn(TRICK1_PHYS),
|
|
||||||
.length = TRICK1_SIZE,
|
|
||||||
.type = MT_DEVICE
|
|
||||||
}, { /* PIT_BASE */
|
|
||||||
.virtual = (unsigned long)PIT_BASE,
|
|
||||||
.pfn = __phys_to_pfn(TRICK0_PHYS),
|
|
||||||
.length = TRICK0_SIZE,
|
|
||||||
.type = MT_DEVICE
|
|
||||||
},
|
|
||||||
|
|
||||||
/*
|
|
||||||
* self-decode ISAIO space
|
|
||||||
*/
|
|
||||||
{
|
|
||||||
.virtual = ISAIO_BASE,
|
|
||||||
.pfn = __phys_to_pfn(ISAIO_PHYS),
|
|
||||||
.length = ISAIO_SIZE,
|
|
||||||
.type = MT_DEVICE
|
|
||||||
}, {
|
|
||||||
.virtual = ISAMEM_BASE,
|
|
||||||
.pfn = __phys_to_pfn(ISAMEM_PHYS),
|
|
||||||
.length = ISAMEM_SIZE,
|
|
||||||
.type = MT_DEVICE
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
static void __init ebsa110_map_io(void)
|
|
||||||
{
|
|
||||||
iotable_init(ebsa110_io_desc, ARRAY_SIZE(ebsa110_io_desc));
|
|
||||||
}
|
|
||||||
|
|
||||||
static void __iomem *ebsa110_ioremap_caller(phys_addr_t cookie, size_t size,
|
|
||||||
unsigned int flags, void *caller)
|
|
||||||
{
|
|
||||||
return (void __iomem *)cookie;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void ebsa110_iounmap(volatile void __iomem *io_addr)
|
|
||||||
{}
|
|
||||||
|
|
||||||
static void __init ebsa110_init_early(void)
|
|
||||||
{
|
|
||||||
arch_ioremap_caller = ebsa110_ioremap_caller;
|
|
||||||
arch_iounmap = ebsa110_iounmap;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define PIT_CTRL (PIT_BASE + 0x0d)
|
|
||||||
#define PIT_T2 (PIT_BASE + 0x09)
|
|
||||||
#define PIT_T1 (PIT_BASE + 0x05)
|
|
||||||
#define PIT_T0 (PIT_BASE + 0x01)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* This is the rate at which your MCLK signal toggles (in Hz)
|
|
||||||
* This was measured on a 10 digit frequency counter sampling
|
|
||||||
* over 1 second.
|
|
||||||
*/
|
|
||||||
#define MCLK 47894000
|
|
||||||
|
|
||||||
/*
|
|
||||||
* This is the rate at which the PIT timers get clocked
|
|
||||||
*/
|
|
||||||
#define CLKBY7 (MCLK / 7)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* This is the counter value. We tick at 200Hz on this platform.
|
|
||||||
*/
|
|
||||||
#define COUNT ((CLKBY7 + (HZ / 2)) / HZ)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Get the time offset from the system PIT. Note that if we have missed an
|
|
||||||
* interrupt, then the PIT counter will roll over (ie, be negative).
|
|
||||||
* This actually works out to be convenient.
|
|
||||||
*/
|
|
||||||
static u32 ebsa110_gettimeoffset(void)
|
|
||||||
{
|
|
||||||
unsigned long offset, count;
|
|
||||||
|
|
||||||
__raw_writeb(0x40, PIT_CTRL);
|
|
||||||
count = __raw_readb(PIT_T1);
|
|
||||||
count |= __raw_readb(PIT_T1) << 8;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* If count > COUNT, make the number negative.
|
|
||||||
*/
|
|
||||||
if (count > COUNT)
|
|
||||||
count |= 0xffff0000;
|
|
||||||
|
|
||||||
offset = COUNT;
|
|
||||||
offset -= count;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* `offset' is in units of timer counts. Convert
|
|
||||||
* offset to units of microseconds.
|
|
||||||
*/
|
|
||||||
offset = offset * (1000000 / HZ) / COUNT;
|
|
||||||
|
|
||||||
return offset * 1000;
|
|
||||||
}
|
|
||||||
|
|
||||||
static irqreturn_t
|
|
||||||
ebsa110_timer_interrupt(int irq, void *dev_id)
|
|
||||||
{
|
|
||||||
u32 count;
|
|
||||||
|
|
||||||
/* latch and read timer 1 */
|
|
||||||
__raw_writeb(0x40, PIT_CTRL);
|
|
||||||
count = __raw_readb(PIT_T1);
|
|
||||||
count |= __raw_readb(PIT_T1) << 8;
|
|
||||||
|
|
||||||
count += COUNT;
|
|
||||||
|
|
||||||
__raw_writeb(count & 0xff, PIT_T1);
|
|
||||||
__raw_writeb(count >> 8, PIT_T1);
|
|
||||||
|
|
||||||
timer_tick();
|
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Set up timer interrupt.
|
|
||||||
*/
|
|
||||||
void __init ebsa110_timer_init(void)
|
|
||||||
{
|
|
||||||
int irq = IRQ_EBSA110_TIMER0;
|
|
||||||
|
|
||||||
arch_gettimeoffset = ebsa110_gettimeoffset;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Timer 1, mode 2, LSB/MSB
|
|
||||||
*/
|
|
||||||
__raw_writeb(0x70, PIT_CTRL);
|
|
||||||
__raw_writeb(COUNT & 0xff, PIT_T1);
|
|
||||||
__raw_writeb(COUNT >> 8, PIT_T1);
|
|
||||||
|
|
||||||
if (request_irq(irq, ebsa110_timer_interrupt, IRQF_TIMER | IRQF_IRQPOLL,
|
|
||||||
"EBSA110 Timer Tick", NULL))
|
|
||||||
pr_err("Failed to request irq %d (EBSA110 Timer Tick)\n", irq);
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct plat_serial8250_port serial_platform_data[] = {
|
|
||||||
{
|
|
||||||
.iobase = 0x3f8,
|
|
||||||
.irq = 1,
|
|
||||||
.uartclk = 1843200,
|
|
||||||
.regshift = 0,
|
|
||||||
.iotype = UPIO_PORT,
|
|
||||||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
|
|
||||||
},
|
|
||||||
{
|
|
||||||
.iobase = 0x2f8,
|
|
||||||
.irq = 2,
|
|
||||||
.uartclk = 1843200,
|
|
||||||
.regshift = 0,
|
|
||||||
.iotype = UPIO_PORT,
|
|
||||||
.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
|
|
||||||
},
|
|
||||||
{ },
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device serial_device = {
|
|
||||||
.name = "serial8250",
|
|
||||||
.id = PLAT8250_DEV_PLATFORM,
|
|
||||||
.dev = {
|
|
||||||
.platform_data = serial_platform_data,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct resource am79c961_resources[] = {
|
|
||||||
{
|
|
||||||
.start = 0x220,
|
|
||||||
.end = 0x238,
|
|
||||||
.flags = IORESOURCE_IO,
|
|
||||||
}, {
|
|
||||||
.start = IRQ_EBSA110_ETHERNET,
|
|
||||||
.end = IRQ_EBSA110_ETHERNET,
|
|
||||||
.flags = IORESOURCE_IRQ,
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device am79c961_device = {
|
|
||||||
.name = "am79c961",
|
|
||||||
.id = -1,
|
|
||||||
.num_resources = ARRAY_SIZE(am79c961_resources),
|
|
||||||
.resource = am79c961_resources,
|
|
||||||
};
|
|
||||||
|
|
||||||
static struct platform_device *ebsa110_devices[] = {
|
|
||||||
&serial_device,
|
|
||||||
&am79c961_device,
|
|
||||||
};
|
|
||||||
|
|
||||||
/*
|
|
||||||
* EBSA110 idling methodology:
|
|
||||||
*
|
|
||||||
* We can not execute the "wait for interrupt" instruction since that
|
|
||||||
* will stop our MCLK signal (which provides the clock for the glue
|
|
||||||
* logic, and therefore the timer interrupt).
|
|
||||||
*
|
|
||||||
* Instead, we spin, polling the IRQ_STAT register for the occurrence
|
|
||||||
* of any interrupt with core clock down to the memory clock.
|
|
||||||
*/
|
|
||||||
static void ebsa110_idle(void)
|
|
||||||
{
|
|
||||||
const char *irq_stat = (char *)0xff000000;
|
|
||||||
|
|
||||||
/* disable clock switching */
|
|
||||||
asm volatile ("mcr p15, 0, ip, c15, c2, 2" : : : "cc");
|
|
||||||
|
|
||||||
/* wait for an interrupt to occur */
|
|
||||||
while (!*irq_stat);
|
|
||||||
|
|
||||||
/* enable clock switching */
|
|
||||||
asm volatile ("mcr p15, 0, ip, c15, c1, 2" : : : "cc");
|
|
||||||
}
|
|
||||||
|
|
||||||
static int __init ebsa110_init(void)
|
|
||||||
{
|
|
||||||
arm_pm_idle = ebsa110_idle;
|
|
||||||
return platform_add_devices(ebsa110_devices, ARRAY_SIZE(ebsa110_devices));
|
|
||||||
}
|
|
||||||
|
|
||||||
arch_initcall(ebsa110_init);
|
|
||||||
|
|
||||||
static void ebsa110_restart(enum reboot_mode mode, const char *cmd)
|
|
||||||
{
|
|
||||||
soft_restart(0x80000000);
|
|
||||||
}
|
|
||||||
|
|
||||||
MACHINE_START(EBSA110, "EBSA110")
|
|
||||||
/* Maintainer: Russell King */
|
|
||||||
.atag_offset = 0x400,
|
|
||||||
.reserve_lp0 = 1,
|
|
||||||
.reserve_lp2 = 1,
|
|
||||||
.map_io = ebsa110_map_io,
|
|
||||||
.init_early = ebsa110_init_early,
|
|
||||||
.init_irq = ebsa110_init_irq,
|
|
||||||
.init_time = ebsa110_timer_init,
|
|
||||||
.restart = ebsa110_restart,
|
|
||||||
MACHINE_END
|
|
||||||
@ -1,38 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
/*
|
|
||||||
* Copyright (C) 1996-2000 Russell King.
|
|
||||||
*
|
|
||||||
* This file contains the core hardware definitions of the EBSA-110.
|
|
||||||
*/
|
|
||||||
#ifndef CORE_H
|
|
||||||
#define CORE_H
|
|
||||||
|
|
||||||
/* Physical addresses/sizes */
|
|
||||||
#define ISAMEM_PHYS 0xe0000000
|
|
||||||
#define ISAMEM_SIZE 0x10000000
|
|
||||||
|
|
||||||
#define ISAIO_PHYS 0xf0000000
|
|
||||||
#define ISAIO_SIZE PGDIR_SIZE
|
|
||||||
|
|
||||||
#define TRICK0_PHYS 0xf2000000
|
|
||||||
#define TRICK0_SIZE PGDIR_SIZE
|
|
||||||
#define TRICK1_PHYS 0xf2400000
|
|
||||||
#define TRICK1_SIZE PGDIR_SIZE
|
|
||||||
#define TRICK2_PHYS 0xf2800000
|
|
||||||
#define TRICK3_PHYS 0xf2c00000
|
|
||||||
#define TRICK3_SIZE PGDIR_SIZE
|
|
||||||
#define TRICK4_PHYS 0xf3000000
|
|
||||||
#define TRICK4_SIZE PGDIR_SIZE
|
|
||||||
#define TRICK5_PHYS 0xf3400000
|
|
||||||
#define TRICK6_PHYS 0xf3800000
|
|
||||||
#define TRICK7_PHYS 0xf3c00000
|
|
||||||
|
|
||||||
/* Virtual addresses */
|
|
||||||
#define PIT_BASE IOMEM(0xfc000000) /* trick 0 */
|
|
||||||
#define SOFT_BASE IOMEM(0xfd000000) /* trick 1 */
|
|
||||||
#define IRQ_MASK IOMEM(0xfe000000) /* trick 3 - read */
|
|
||||||
#define IRQ_MSET IOMEM(0xfe000000) /* trick 3 - write */
|
|
||||||
#define IRQ_STAT IOMEM(0xff000000) /* trick 4 - read */
|
|
||||||
#define IRQ_MCLR IOMEM(0xff000000) /* trick 4 - write */
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@ -1,33 +0,0 @@
|
|||||||
/*
|
|
||||||
* arch/arm/mach-ebsa110/include/mach/entry-macro.S
|
|
||||||
*
|
|
||||||
* Low-level IRQ helper macros for ebsa110 platform.
|
|
||||||
*
|
|
||||||
* This file is licensed under the terms of the GNU General Public
|
|
||||||
* License version 2. This program is licensed "as is" without any
|
|
||||||
* warranty of any kind, whether express or implied.
|
|
||||||
*/
|
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
#define IRQ_STAT 0xff000000 /* read */
|
|
||||||
|
|
||||||
.macro get_irqnr_preamble, base, tmp
|
|
||||||
mov \base, #IRQ_STAT
|
|
||||||
.endm
|
|
||||||
|
|
||||||
.macro get_irqnr_and_base, irqnr, stat, base, tmp
|
|
||||||
ldrb \stat, [\base] @ get interrupts
|
|
||||||
mov \irqnr, #0
|
|
||||||
tst \stat, #15
|
|
||||||
addeq \irqnr, \irqnr, #4
|
|
||||||
moveq \stat, \stat, lsr #4
|
|
||||||
tst \stat, #3
|
|
||||||
addeq \irqnr, \irqnr, #2
|
|
||||||
moveq \stat, \stat, lsr #2
|
|
||||||
tst \stat, #1
|
|
||||||
addeq \irqnr, \irqnr, #1
|
|
||||||
moveq \stat, \stat, lsr #1
|
|
||||||
tst \stat, #1 @ bit 0 should be set
|
|
||||||
.endm
|
|
||||||
|
|
||||||
@ -1,21 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
/*
|
|
||||||
* arch/arm/mach-ebsa110/include/mach/hardware.h
|
|
||||||
*
|
|
||||||
* Copyright (C) 1996-2000 Russell King.
|
|
||||||
*
|
|
||||||
* This file contains the hardware definitions of the EBSA-110.
|
|
||||||
*/
|
|
||||||
#ifndef __ASM_ARCH_HARDWARE_H
|
|
||||||
#define __ASM_ARCH_HARDWARE_H
|
|
||||||
|
|
||||||
#define ISAMEM_BASE 0xe0000000
|
|
||||||
#define ISAIO_BASE 0xf0000000
|
|
||||||
|
|
||||||
/*
|
|
||||||
* RAM definitions
|
|
||||||
*/
|
|
||||||
#define UNCACHEABLE_ADDR 0xff000000 /* IRQ_STAT */
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
@ -1,89 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
/*
|
|
||||||
* arch/arm/mach-ebsa110/include/mach/io.h
|
|
||||||
*
|
|
||||||
* Copyright (C) 1997,1998 Russell King
|
|
||||||
*
|
|
||||||
* Modifications:
|
|
||||||
* 06-Dec-1997 RMK Created.
|
|
||||||
*/
|
|
||||||
#ifndef __ASM_ARM_ARCH_IO_H
|
|
||||||
#define __ASM_ARM_ARCH_IO_H
|
|
||||||
|
|
||||||
u8 __inb8(unsigned int port);
|
|
||||||
void __outb8(u8 val, unsigned int port);
|
|
||||||
|
|
||||||
u8 __inb16(unsigned int port);
|
|
||||||
void __outb16(u8 val, unsigned int port);
|
|
||||||
|
|
||||||
u16 __inw(unsigned int port);
|
|
||||||
void __outw(u16 val, unsigned int port);
|
|
||||||
|
|
||||||
u32 __inl(unsigned int port);
|
|
||||||
void __outl(u32 val, unsigned int port);
|
|
||||||
|
|
||||||
u8 __readb(const volatile void __iomem *addr);
|
|
||||||
u16 __readw(const volatile void __iomem *addr);
|
|
||||||
u32 __readl(const volatile void __iomem *addr);
|
|
||||||
|
|
||||||
void __writeb(u8 val, volatile void __iomem *addr);
|
|
||||||
void __writew(u16 val, volatile void __iomem *addr);
|
|
||||||
void __writel(u32 val, volatile void __iomem *addr);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Argh, someone forgot the IOCS16 line. We therefore have to handle
|
|
||||||
* the byte stearing by selecting the correct byte IO functions here.
|
|
||||||
*/
|
|
||||||
#ifdef ISA_SIXTEEN_BIT_PERIPHERAL
|
|
||||||
#define inb(p) __inb16(p)
|
|
||||||
#define outb(v,p) __outb16(v,p)
|
|
||||||
#else
|
|
||||||
#define inb(p) __inb8(p)
|
|
||||||
#define outb(v,p) __outb8(v,p)
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define inw(p) __inw(p)
|
|
||||||
#define outw(v,p) __outw(v,p)
|
|
||||||
|
|
||||||
#define inl(p) __inl(p)
|
|
||||||
#define outl(v,p) __outl(v,p)
|
|
||||||
|
|
||||||
#define readb(b) __readb(b)
|
|
||||||
#define readw(b) __readw(b)
|
|
||||||
#define readl(b) __readl(b)
|
|
||||||
#define readb_relaxed(addr) readb(addr)
|
|
||||||
#define readw_relaxed(addr) readw(addr)
|
|
||||||
#define readl_relaxed(addr) readl(addr)
|
|
||||||
|
|
||||||
#define writeb(v,b) __writeb(v,b)
|
|
||||||
#define writew(v,b) __writew(v,b)
|
|
||||||
#define writel(v,b) __writel(v,b)
|
|
||||||
|
|
||||||
#define insb insb
|
|
||||||
extern void insb(unsigned int port, void *buf, int sz);
|
|
||||||
#define insw insw
|
|
||||||
extern void insw(unsigned int port, void *buf, int sz);
|
|
||||||
#define insl insl
|
|
||||||
extern void insl(unsigned int port, void *buf, int sz);
|
|
||||||
|
|
||||||
#define outsb outsb
|
|
||||||
extern void outsb(unsigned int port, const void *buf, int sz);
|
|
||||||
#define outsw outsw
|
|
||||||
extern void outsw(unsigned int port, const void *buf, int sz);
|
|
||||||
#define outsl outsl
|
|
||||||
extern void outsl(unsigned int port, const void *buf, int sz);
|
|
||||||
|
|
||||||
/* can't support writesb atm */
|
|
||||||
#define writesw writesw
|
|
||||||
extern void writesw(volatile void __iomem *addr, const void *data, int wordlen);
|
|
||||||
#define writesl writesl
|
|
||||||
extern void writesl(volatile void __iomem *addr, const void *data, int longlen);
|
|
||||||
|
|
||||||
/* can't support readsb atm */
|
|
||||||
#define readsw readsw
|
|
||||||
extern void readsw(const volatile void __iomem *addr, void *data, int wordlen);
|
|
||||||
|
|
||||||
#define readsl readsl
|
|
||||||
extern void readsl(const volatile void __iomem *addr, void *data, int longlen);
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@ -1,17 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
/*
|
|
||||||
* arch/arm/mach-ebsa110/include/mach/irqs.h
|
|
||||||
*
|
|
||||||
* Copyright (C) 1996 Russell King
|
|
||||||
*/
|
|
||||||
|
|
||||||
#define NR_IRQS 8
|
|
||||||
|
|
||||||
#define IRQ_EBSA110_PRINTER 0
|
|
||||||
#define IRQ_EBSA110_COM1 1
|
|
||||||
#define IRQ_EBSA110_COM2 2
|
|
||||||
#define IRQ_EBSA110_ETHERNET 3
|
|
||||||
#define IRQ_EBSA110_TIMER0 4
|
|
||||||
#define IRQ_EBSA110_TIMER1 5
|
|
||||||
#define IRQ_EBSA110_PCMCIA 6
|
|
||||||
#define IRQ_EBSA110_IMMEDIATE 7
|
|
||||||
@ -1,22 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
/*
|
|
||||||
* arch/arm/mach-ebsa110/include/mach/memory.h
|
|
||||||
*
|
|
||||||
* Copyright (C) 1996-1999 Russell King.
|
|
||||||
*
|
|
||||||
* Changelog:
|
|
||||||
* 20-Oct-1996 RMK Created
|
|
||||||
* 31-Dec-1997 RMK Fixed definitions to reduce warnings
|
|
||||||
* 21-Mar-1999 RMK Renamed to memory.h
|
|
||||||
* RMK Moved TASK_SIZE and PAGE_OFFSET here
|
|
||||||
*/
|
|
||||||
#ifndef __ASM_ARCH_MEMORY_H
|
|
||||||
#define __ASM_ARCH_MEMORY_H
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Cache flushing area - SRAM
|
|
||||||
*/
|
|
||||||
#define FLUSH_BASE_PHYS 0x40000000
|
|
||||||
#define FLUSH_BASE 0xdf000000
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@ -1,41 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
/*
|
|
||||||
* arch/arm/mach-ebsa110/include/mach/uncompress.h
|
|
||||||
*
|
|
||||||
* Copyright (C) 1996,1997,1998 Russell King
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <linux/serial_reg.h>
|
|
||||||
|
|
||||||
#define SERIAL_BASE ((unsigned char *)0xf0000be0)
|
|
||||||
|
|
||||||
/*
|
|
||||||
* This does not append a newline
|
|
||||||
*/
|
|
||||||
static inline void putc(int c)
|
|
||||||
{
|
|
||||||
unsigned char v, *base = SERIAL_BASE;
|
|
||||||
|
|
||||||
do {
|
|
||||||
v = base[UART_LSR << 2];
|
|
||||||
barrier();
|
|
||||||
} while (!(v & UART_LSR_THRE));
|
|
||||||
|
|
||||||
base[UART_TX << 2] = c;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void flush(void)
|
|
||||||
{
|
|
||||||
unsigned char v, *base = SERIAL_BASE;
|
|
||||||
|
|
||||||
do {
|
|
||||||
v = base[UART_LSR << 2];
|
|
||||||
barrier();
|
|
||||||
} while ((v & (UART_LSR_TEMT|UART_LSR_THRE)) !=
|
|
||||||
(UART_LSR_TEMT|UART_LSR_THRE));
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* nothing to do
|
|
||||||
*/
|
|
||||||
#define arch_decomp_setup()
|
|
||||||
@ -1,440 +0,0 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0
|
|
||||||
/*
|
|
||||||
* linux/arch/arm/mach-ebsa110/isamem.c
|
|
||||||
*
|
|
||||||
* Copyright (C) 2001 Russell King
|
|
||||||
*
|
|
||||||
* Perform "ISA" memory and IO accesses. The EBSA110 has some "peculiarities"
|
|
||||||
* in the way it handles accesses to odd IO ports on 16-bit devices. These
|
|
||||||
* devices have their D0-D15 lines connected to the processors D0-D15 lines.
|
|
||||||
* Since they expect all byte IO operations to be performed on D0-D7, and the
|
|
||||||
* StrongARM expects to transfer the byte to these odd addresses on D8-D15,
|
|
||||||
* we must use a trick to get the required behaviour.
|
|
||||||
*
|
|
||||||
* The trick employed here is to use long word stores to odd address -1. The
|
|
||||||
* glue logic picks this up as a "trick" access, and asserts the LSB of the
|
|
||||||
* peripherals address bus, thereby accessing the odd IO port. Meanwhile, the
|
|
||||||
* StrongARM transfers its data on D0-D7 as expected.
|
|
||||||
*
|
|
||||||
* Things get more interesting on the pass-1 EBSA110 - the PCMCIA controller
|
|
||||||
* wiring was screwed in such a way that it had limited memory space access.
|
|
||||||
* Luckily, the work-around for this is not too horrible. See
|
|
||||||
* __isamem_convert_addr for the details.
|
|
||||||
*/
|
|
||||||
#include <linux/module.h>
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
#include <linux/types.h>
|
|
||||||
#include <linux/io.h>
|
|
||||||
|
|
||||||
#include <mach/hardware.h>
|
|
||||||
#include <asm/page.h>
|
|
||||||
|
|
||||||
static void __iomem *__isamem_convert_addr(const volatile void __iomem *addr)
|
|
||||||
{
|
|
||||||
u32 ret, a = (u32 __force) addr;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The PCMCIA controller is wired up as follows:
|
|
||||||
* +---------+---------+---------+---------+---------+---------+
|
|
||||||
* PCMCIA | 2 2 2 2 | 1 1 1 1 | 1 1 1 1 | 1 1 | | |
|
|
||||||
* | 3 2 1 0 | 9 8 7 6 | 5 4 3 2 | 1 0 9 8 | 7 6 5 4 | 3 2 1 0 |
|
|
||||||
* +---------+---------+---------+---------+---------+---------+
|
|
||||||
* CPU | 2 2 2 2 | 2 1 1 1 | 1 1 1 1 | 1 1 1 | | |
|
|
||||||
* | 4 3 2 1 | 0 9 9 8 | 7 6 5 4 | 3 2 0 9 | 8 7 6 5 | 4 3 2 x |
|
|
||||||
* +---------+---------+---------+---------+---------+---------+
|
|
||||||
*
|
|
||||||
* This means that we can access PCMCIA regions as follows:
|
|
||||||
* 0x*10000 -> 0x*1ffff
|
|
||||||
* 0x*70000 -> 0x*7ffff
|
|
||||||
* 0x*90000 -> 0x*9ffff
|
|
||||||
* 0x*f0000 -> 0x*fffff
|
|
||||||
*/
|
|
||||||
ret = (a & 0xf803fe) << 1;
|
|
||||||
ret |= (a & 0x03fc00) << 2;
|
|
||||||
|
|
||||||
ret += 0xe8000000;
|
|
||||||
|
|
||||||
if ((a & 0x20000) == (a & 0x40000) >> 1)
|
|
||||||
return (void __iomem *)ret;
|
|
||||||
|
|
||||||
BUG();
|
|
||||||
return NULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* read[bwl] and write[bwl]
|
|
||||||
*/
|
|
||||||
u8 __readb(const volatile void __iomem *addr)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
u32 ret;
|
|
||||||
|
|
||||||
if ((unsigned long)addr & 1)
|
|
||||||
ret = __raw_readl(a);
|
|
||||||
else
|
|
||||||
ret = __raw_readb(a);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
u16 __readw(const volatile void __iomem *addr)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
|
|
||||||
if ((unsigned long)addr & 1)
|
|
||||||
BUG();
|
|
||||||
|
|
||||||
return __raw_readw(a);
|
|
||||||
}
|
|
||||||
|
|
||||||
u32 __readl(const volatile void __iomem *addr)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
u32 ret;
|
|
||||||
|
|
||||||
if ((unsigned long)addr & 3)
|
|
||||||
BUG();
|
|
||||||
|
|
||||||
ret = __raw_readw(a);
|
|
||||||
ret |= __raw_readw(a + 4) << 16;
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
EXPORT_SYMBOL(__readb);
|
|
||||||
EXPORT_SYMBOL(__readw);
|
|
||||||
EXPORT_SYMBOL(__readl);
|
|
||||||
|
|
||||||
void readsw(const volatile void __iomem *addr, void *data, int len)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
|
|
||||||
BUG_ON((unsigned long)addr & 1);
|
|
||||||
|
|
||||||
__raw_readsw(a, data, len);
|
|
||||||
}
|
|
||||||
EXPORT_SYMBOL(readsw);
|
|
||||||
|
|
||||||
void readsl(const volatile void __iomem *addr, void *data, int len)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
|
|
||||||
BUG_ON((unsigned long)addr & 3);
|
|
||||||
|
|
||||||
__raw_readsl(a, data, len);
|
|
||||||
}
|
|
||||||
EXPORT_SYMBOL(readsl);
|
|
||||||
|
|
||||||
void __writeb(u8 val, volatile void __iomem *addr)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
|
|
||||||
if ((unsigned long)addr & 1)
|
|
||||||
__raw_writel(val, a);
|
|
||||||
else
|
|
||||||
__raw_writeb(val, a);
|
|
||||||
}
|
|
||||||
|
|
||||||
void __writew(u16 val, volatile void __iomem *addr)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
|
|
||||||
if ((unsigned long)addr & 1)
|
|
||||||
BUG();
|
|
||||||
|
|
||||||
__raw_writew(val, a);
|
|
||||||
}
|
|
||||||
|
|
||||||
void __writel(u32 val, volatile void __iomem *addr)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
|
|
||||||
if ((unsigned long)addr & 3)
|
|
||||||
BUG();
|
|
||||||
|
|
||||||
__raw_writew(val, a);
|
|
||||||
__raw_writew(val >> 16, a + 4);
|
|
||||||
}
|
|
||||||
|
|
||||||
EXPORT_SYMBOL(__writeb);
|
|
||||||
EXPORT_SYMBOL(__writew);
|
|
||||||
EXPORT_SYMBOL(__writel);
|
|
||||||
|
|
||||||
void writesw(volatile void __iomem *addr, const void *data, int len)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
|
|
||||||
BUG_ON((unsigned long)addr & 1);
|
|
||||||
|
|
||||||
__raw_writesw(a, data, len);
|
|
||||||
}
|
|
||||||
EXPORT_SYMBOL(writesw);
|
|
||||||
|
|
||||||
void writesl(volatile void __iomem *addr, const void *data, int len)
|
|
||||||
{
|
|
||||||
void __iomem *a = __isamem_convert_addr(addr);
|
|
||||||
|
|
||||||
BUG_ON((unsigned long)addr & 3);
|
|
||||||
|
|
||||||
__raw_writesl(a, data, len);
|
|
||||||
}
|
|
||||||
EXPORT_SYMBOL(writesl);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The EBSA110 has a weird "ISA IO" region:
|
|
||||||
*
|
|
||||||
* Region 0 (addr = 0xf0000000 + io << 2)
|
|
||||||
* --------------------------------------------------------
|
|
||||||
* Physical region IO region
|
|
||||||
* f0000fe0 - f0000ffc 3f8 - 3ff ttyS0
|
|
||||||
* f0000e60 - f0000e64 398 - 399
|
|
||||||
* f0000de0 - f0000dfc 378 - 37f lp0
|
|
||||||
* f0000be0 - f0000bfc 2f8 - 2ff ttyS1
|
|
||||||
*
|
|
||||||
* Region 1 (addr = 0xf0000000 + (io & ~1) << 1 + (io & 1))
|
|
||||||
* --------------------------------------------------------
|
|
||||||
* Physical region IO region
|
|
||||||
* f00014f1 a79 pnp write data
|
|
||||||
* f00007c0 - f00007c1 3e0 - 3e1 pcmcia
|
|
||||||
* f00004f1 279 pnp address
|
|
||||||
* f0000440 - f000046c 220 - 236 eth0
|
|
||||||
* f0000405 203 pnp read data
|
|
||||||
*/
|
|
||||||
#define SUPERIO_PORT(p) \
|
|
||||||
(((p) >> 3) == (0x3f8 >> 3) || \
|
|
||||||
((p) >> 3) == (0x2f8 >> 3) || \
|
|
||||||
((p) >> 3) == (0x378 >> 3))
|
|
||||||
|
|
||||||
/*
|
|
||||||
* We're addressing an 8 or 16-bit peripheral which tranfers
|
|
||||||
* odd addresses on the low ISA byte lane.
|
|
||||||
*/
|
|
||||||
u8 __inb8(unsigned int port)
|
|
||||||
{
|
|
||||||
u32 ret;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The SuperIO registers use sane addressing techniques...
|
|
||||||
*/
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
ret = __raw_readb((void __iomem *)ISAIO_BASE + (port << 2));
|
|
||||||
else {
|
|
||||||
void __iomem *a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Shame nothing else does
|
|
||||||
*/
|
|
||||||
if (port & 1)
|
|
||||||
ret = __raw_readl(a);
|
|
||||||
else
|
|
||||||
ret = __raw_readb(a);
|
|
||||||
}
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* We're addressing a 16-bit peripheral which transfers odd
|
|
||||||
* addresses on the high ISA byte lane.
|
|
||||||
*/
|
|
||||||
u8 __inb16(unsigned int port)
|
|
||||||
{
|
|
||||||
unsigned int offset;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The SuperIO registers use sane addressing techniques...
|
|
||||||
*/
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
offset = port << 2;
|
|
||||||
else
|
|
||||||
offset = (port & ~1) << 1 | (port & 1);
|
|
||||||
|
|
||||||
return __raw_readb((void __iomem *)ISAIO_BASE + offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
u16 __inw(unsigned int port)
|
|
||||||
{
|
|
||||||
unsigned int offset;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The SuperIO registers use sane addressing techniques...
|
|
||||||
*/
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
offset = port << 2;
|
|
||||||
else {
|
|
||||||
offset = port << 1;
|
|
||||||
BUG_ON(port & 1);
|
|
||||||
}
|
|
||||||
return __raw_readw((void __iomem *)ISAIO_BASE + offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Fake a 32-bit read with two 16-bit reads. Needed for 3c589.
|
|
||||||
*/
|
|
||||||
u32 __inl(unsigned int port)
|
|
||||||
{
|
|
||||||
void __iomem *a;
|
|
||||||
|
|
||||||
if (SUPERIO_PORT(port) || port & 3)
|
|
||||||
BUG();
|
|
||||||
|
|
||||||
a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);
|
|
||||||
|
|
||||||
return __raw_readw(a) | __raw_readw(a + 4) << 16;
|
|
||||||
}
|
|
||||||
|
|
||||||
EXPORT_SYMBOL(__inb8);
|
|
||||||
EXPORT_SYMBOL(__inb16);
|
|
||||||
EXPORT_SYMBOL(__inw);
|
|
||||||
EXPORT_SYMBOL(__inl);
|
|
||||||
|
|
||||||
void __outb8(u8 val, unsigned int port)
|
|
||||||
{
|
|
||||||
/*
|
|
||||||
* The SuperIO registers use sane addressing techniques...
|
|
||||||
*/
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
__raw_writeb(val, (void __iomem *)ISAIO_BASE + (port << 2));
|
|
||||||
else {
|
|
||||||
void __iomem *a = (void __iomem *)ISAIO_BASE + ((port & ~1) << 1);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Shame nothing else does
|
|
||||||
*/
|
|
||||||
if (port & 1)
|
|
||||||
__raw_writel(val, a);
|
|
||||||
else
|
|
||||||
__raw_writeb(val, a);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void __outb16(u8 val, unsigned int port)
|
|
||||||
{
|
|
||||||
unsigned int offset;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The SuperIO registers use sane addressing techniques...
|
|
||||||
*/
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
offset = port << 2;
|
|
||||||
else
|
|
||||||
offset = (port & ~1) << 1 | (port & 1);
|
|
||||||
|
|
||||||
__raw_writeb(val, (void __iomem *)ISAIO_BASE + offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
void __outw(u16 val, unsigned int port)
|
|
||||||
{
|
|
||||||
unsigned int offset;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The SuperIO registers use sane addressing techniques...
|
|
||||||
*/
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
offset = port << 2;
|
|
||||||
else {
|
|
||||||
offset = port << 1;
|
|
||||||
BUG_ON(port & 1);
|
|
||||||
}
|
|
||||||
__raw_writew(val, (void __iomem *)ISAIO_BASE + offset);
|
|
||||||
}
|
|
||||||
|
|
||||||
void __outl(u32 val, unsigned int port)
|
|
||||||
{
|
|
||||||
BUG();
|
|
||||||
}
|
|
||||||
|
|
||||||
EXPORT_SYMBOL(__outb8);
|
|
||||||
EXPORT_SYMBOL(__outb16);
|
|
||||||
EXPORT_SYMBOL(__outw);
|
|
||||||
EXPORT_SYMBOL(__outl);
|
|
||||||
|
|
||||||
void outsb(unsigned int port, const void *from, int len)
|
|
||||||
{
|
|
||||||
u32 off;
|
|
||||||
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
off = port << 2;
|
|
||||||
else {
|
|
||||||
off = (port & ~1) << 1;
|
|
||||||
if (port & 1)
|
|
||||||
BUG();
|
|
||||||
}
|
|
||||||
|
|
||||||
__raw_writesb((void __iomem *)ISAIO_BASE + off, from, len);
|
|
||||||
}
|
|
||||||
|
|
||||||
void insb(unsigned int port, void *from, int len)
|
|
||||||
{
|
|
||||||
u32 off;
|
|
||||||
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
off = port << 2;
|
|
||||||
else {
|
|
||||||
off = (port & ~1) << 1;
|
|
||||||
if (port & 1)
|
|
||||||
BUG();
|
|
||||||
}
|
|
||||||
|
|
||||||
__raw_readsb((void __iomem *)ISAIO_BASE + off, from, len);
|
|
||||||
}
|
|
||||||
|
|
||||||
EXPORT_SYMBOL(outsb);
|
|
||||||
EXPORT_SYMBOL(insb);
|
|
||||||
|
|
||||||
void outsw(unsigned int port, const void *from, int len)
|
|
||||||
{
|
|
||||||
u32 off;
|
|
||||||
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
off = port << 2;
|
|
||||||
else {
|
|
||||||
off = (port & ~1) << 1;
|
|
||||||
if (port & 1)
|
|
||||||
BUG();
|
|
||||||
}
|
|
||||||
|
|
||||||
__raw_writesw((void __iomem *)ISAIO_BASE + off, from, len);
|
|
||||||
}
|
|
||||||
|
|
||||||
void insw(unsigned int port, void *from, int len)
|
|
||||||
{
|
|
||||||
u32 off;
|
|
||||||
|
|
||||||
if (SUPERIO_PORT(port))
|
|
||||||
off = port << 2;
|
|
||||||
else {
|
|
||||||
off = (port & ~1) << 1;
|
|
||||||
if (port & 1)
|
|
||||||
BUG();
|
|
||||||
}
|
|
||||||
|
|
||||||
__raw_readsw((void __iomem *)ISAIO_BASE + off, from, len);
|
|
||||||
}
|
|
||||||
|
|
||||||
EXPORT_SYMBOL(outsw);
|
|
||||||
EXPORT_SYMBOL(insw);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* We implement these as 16-bit insw/outsw, mainly for
|
|
||||||
* 3c589 cards.
|
|
||||||
*/
|
|
||||||
void outsl(unsigned int port, const void *from, int len)
|
|
||||||
{
|
|
||||||
u32 off = port << 1;
|
|
||||||
|
|
||||||
if (SUPERIO_PORT(port) || port & 3)
|
|
||||||
BUG();
|
|
||||||
|
|
||||||
__raw_writesw((void __iomem *)ISAIO_BASE + off, from, len << 1);
|
|
||||||
}
|
|
||||||
|
|
||||||
void insl(unsigned int port, void *from, int len)
|
|
||||||
{
|
|
||||||
u32 off = port << 1;
|
|
||||||
|
|
||||||
if (SUPERIO_PORT(port) || port & 3)
|
|
||||||
BUG();
|
|
||||||
|
|
||||||
__raw_readsw((void __iomem *)ISAIO_BASE + off, from, len << 1);
|
|
||||||
}
|
|
||||||
|
|
||||||
EXPORT_SYMBOL(outsl);
|
|
||||||
EXPORT_SYMBOL(insl);
|
|
||||||
@ -1,71 +0,0 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0-only
|
|
||||||
/*
|
|
||||||
* Driver for the LED found on the EBSA110 machine
|
|
||||||
* Based on Versatile and RealView machine LED code
|
|
||||||
*
|
|
||||||
* Author: Bryan Wu <bryan.wu@canonical.com>
|
|
||||||
*/
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/io.h>
|
|
||||||
#include <linux/slab.h>
|
|
||||||
#include <linux/leds.h>
|
|
||||||
|
|
||||||
#include <asm/mach-types.h>
|
|
||||||
|
|
||||||
#include "core.h"
|
|
||||||
|
|
||||||
#if defined(CONFIG_NEW_LEDS) && defined(CONFIG_LEDS_CLASS)
|
|
||||||
static void ebsa110_led_set(struct led_classdev *cdev,
|
|
||||||
enum led_brightness b)
|
|
||||||
{
|
|
||||||
u8 reg = __raw_readb(SOFT_BASE);
|
|
||||||
|
|
||||||
if (b != LED_OFF)
|
|
||||||
reg |= 0x80;
|
|
||||||
else
|
|
||||||
reg &= ~0x80;
|
|
||||||
|
|
||||||
__raw_writeb(reg, SOFT_BASE);
|
|
||||||
}
|
|
||||||
|
|
||||||
static enum led_brightness ebsa110_led_get(struct led_classdev *cdev)
|
|
||||||
{
|
|
||||||
u8 reg = __raw_readb(SOFT_BASE);
|
|
||||||
|
|
||||||
return (reg & 0x80) ? LED_FULL : LED_OFF;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int __init ebsa110_leds_init(void)
|
|
||||||
{
|
|
||||||
|
|
||||||
struct led_classdev *cdev;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
if (!machine_is_ebsa110())
|
|
||||||
return -ENODEV;
|
|
||||||
|
|
||||||
cdev = kzalloc(sizeof(*cdev), GFP_KERNEL);
|
|
||||||
if (!cdev)
|
|
||||||
return -ENOMEM;
|
|
||||||
|
|
||||||
cdev->name = "ebsa110:0";
|
|
||||||
cdev->brightness_set = ebsa110_led_set;
|
|
||||||
cdev->brightness_get = ebsa110_led_get;
|
|
||||||
cdev->default_trigger = "heartbeat";
|
|
||||||
|
|
||||||
ret = led_classdev_register(NULL, cdev);
|
|
||||||
if (ret < 0) {
|
|
||||||
kfree(cdev);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Since we may have triggers on any subsystem, defer registration
|
|
||||||
* until after subsystem_init.
|
|
||||||
*/
|
|
||||||
fs_initcall(ebsa110_leds_init);
|
|
||||||
#endif
|
|
||||||
@ -81,7 +81,7 @@ static irqreturn_t
|
|||||||
ioc_timer_interrupt(int irq, void *dev_id)
|
ioc_timer_interrupt(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
ioc_time += RPC_LATCH;
|
ioc_time += RPC_LATCH;
|
||||||
timer_tick();
|
legacy_timer_tick(1);
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -103,7 +103,6 @@ config ARM64
|
|||||||
select FRAME_POINTER
|
select FRAME_POINTER
|
||||||
select GENERIC_ALLOCATOR
|
select GENERIC_ALLOCATOR
|
||||||
select GENERIC_ARCH_TOPOLOGY
|
select GENERIC_ARCH_TOPOLOGY
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CLOCKEVENTS_BROADCAST
|
select GENERIC_CLOCKEVENTS_BROADCAST
|
||||||
select GENERIC_CPU_AUTOPROBE
|
select GENERIC_CPU_AUTOPROBE
|
||||||
select GENERIC_CPU_VULNERABILITIES
|
select GENERIC_CPU_VULNERABILITIES
|
||||||
|
|||||||
@ -257,7 +257,6 @@ config ARCH_TEGRA
|
|||||||
select ARM_GIC_PM
|
select ARM_GIC_PM
|
||||||
select CLKSRC_MMIO
|
select CLKSRC_MMIO
|
||||||
select TIMER_OF
|
select TIMER_OF
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GPIOLIB
|
select GPIOLIB
|
||||||
select PINCTRL
|
select PINCTRL
|
||||||
select PM
|
select PM
|
||||||
|
|||||||
@ -19,7 +19,6 @@ config C6X
|
|||||||
select IRQ_DOMAIN
|
select IRQ_DOMAIN
|
||||||
select OF
|
select OF
|
||||||
select OF_EARLY_FLATTREE
|
select OF_EARLY_FLATTREE
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select MODULES_USE_ELF_RELA
|
select MODULES_USE_ELF_RELA
|
||||||
select MMU_GATHER_NO_RANGE if MMU
|
select MMU_GATHER_NO_RANGE if MMU
|
||||||
select SET_FS
|
select SET_FS
|
||||||
|
|||||||
@ -28,7 +28,6 @@ config CSKY
|
|||||||
select GENERIC_LIB_UCMPDI2
|
select GENERIC_LIB_UCMPDI2
|
||||||
select GENERIC_ALLOCATOR
|
select GENERIC_ALLOCATOR
|
||||||
select GENERIC_ATOMIC64
|
select GENERIC_ATOMIC64
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CPU_DEVICES
|
select GENERIC_CPU_DEVICES
|
||||||
select GENERIC_IRQ_CHIP
|
select GENERIC_IRQ_CHIP
|
||||||
select GENERIC_IRQ_PROBE
|
select GENERIC_IRQ_PROBE
|
||||||
|
|||||||
@ -12,7 +12,6 @@ config H8300
|
|||||||
select FRAME_POINTER
|
select FRAME_POINTER
|
||||||
select GENERIC_CPU_DEVICES
|
select GENERIC_CPU_DEVICES
|
||||||
select MODULES_USE_ELF_RELA
|
select MODULES_USE_ELF_RELA
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select COMMON_CLK
|
select COMMON_CLK
|
||||||
select ARCH_WANT_FRAME_POINTERS
|
select ARCH_WANT_FRAME_POINTERS
|
||||||
select OF
|
select OF
|
||||||
|
|||||||
@ -27,7 +27,6 @@ config HEXAGON
|
|||||||
select GENERIC_IOMAP
|
select GENERIC_IOMAP
|
||||||
select GENERIC_SMP_IDLE_THREAD
|
select GENERIC_SMP_IDLE_THREAD
|
||||||
select STACKTRACE_SUPPORT
|
select STACKTRACE_SUPPORT
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CLOCKEVENTS_BROADCAST
|
select GENERIC_CLOCKEVENTS_BROADCAST
|
||||||
select MODULES_USE_ELF_RELA
|
select MODULES_USE_ELF_RELA
|
||||||
select GENERIC_CPU_DEVICES
|
select GENERIC_CPU_DEVICES
|
||||||
|
|||||||
@ -46,6 +46,7 @@ config IA64
|
|||||||
select ARCH_THREAD_STACK_ALLOCATOR
|
select ARCH_THREAD_STACK_ALLOCATOR
|
||||||
select ARCH_CLOCKSOURCE_DATA
|
select ARCH_CLOCKSOURCE_DATA
|
||||||
select GENERIC_TIME_VSYSCALL
|
select GENERIC_TIME_VSYSCALL
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
select SWIOTLB
|
select SWIOTLB
|
||||||
select SYSCTL_ARCH_UNALIGN_NO_WARN
|
select SYSCTL_ARCH_UNALIGN_NO_WARN
|
||||||
select HAVE_MOD_ARCH_SPECIFIC
|
select HAVE_MOD_ARCH_SPECIFIC
|
||||||
|
|||||||
@ -171,40 +171,30 @@ void vtime_account_hardirq(struct task_struct *tsk)
|
|||||||
static irqreturn_t
|
static irqreturn_t
|
||||||
timer_interrupt (int irq, void *dev_id)
|
timer_interrupt (int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
unsigned long new_itm;
|
unsigned long cur_itm, new_itm, ticks;
|
||||||
|
|
||||||
if (cpu_is_offline(smp_processor_id())) {
|
if (cpu_is_offline(smp_processor_id())) {
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
new_itm = local_cpu_data->itm_next;
|
new_itm = local_cpu_data->itm_next;
|
||||||
|
cur_itm = ia64_get_itc();
|
||||||
|
|
||||||
if (!time_after(ia64_get_itc(), new_itm))
|
if (!time_after(cur_itm, new_itm)) {
|
||||||
printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
|
printk(KERN_ERR "Oops: timer tick before it's due (itc=%lx,itm=%lx)\n",
|
||||||
ia64_get_itc(), new_itm);
|
cur_itm, new_itm);
|
||||||
|
ticks = 1;
|
||||||
profile_tick(CPU_PROFILING);
|
} else {
|
||||||
|
ticks = DIV_ROUND_UP(cur_itm - new_itm,
|
||||||
while (1) {
|
local_cpu_data->itm_delta);
|
||||||
update_process_times(user_mode(get_irq_regs()));
|
new_itm += ticks * local_cpu_data->itm_delta;
|
||||||
|
|
||||||
new_itm += local_cpu_data->itm_delta;
|
|
||||||
|
|
||||||
if (smp_processor_id() == time_keeper_id)
|
|
||||||
xtime_update(1);
|
|
||||||
|
|
||||||
local_cpu_data->itm_next = new_itm;
|
|
||||||
|
|
||||||
if (time_after(new_itm, ia64_get_itc()))
|
|
||||||
break;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Allow IPIs to interrupt the timer loop.
|
|
||||||
*/
|
|
||||||
local_irq_enable();
|
|
||||||
local_irq_disable();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (smp_processor_id() != time_keeper_id)
|
||||||
|
ticks = 0;
|
||||||
|
|
||||||
|
legacy_timer_tick(ticks);
|
||||||
|
|
||||||
do {
|
do {
|
||||||
/*
|
/*
|
||||||
* If we're too close to the next clock tick for
|
* If we're too close to the next clock tick for
|
||||||
|
|||||||
@ -52,7 +52,6 @@
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
static u32 m68328_tick_cnt;
|
static u32 m68328_tick_cnt;
|
||||||
static irq_handler_t timer_interrupt;
|
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
|
|
||||||
@ -62,7 +61,8 @@ static irqreturn_t hw_tick(int irq, void *dummy)
|
|||||||
TSTAT &= 0;
|
TSTAT &= 0;
|
||||||
|
|
||||||
m68328_tick_cnt += TICKS_PER_JIFFY;
|
m68328_tick_cnt += TICKS_PER_JIFFY;
|
||||||
return timer_interrupt(irq, dummy);
|
legacy_timer_tick(1);
|
||||||
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
@ -91,7 +91,7 @@ static struct clocksource m68328_clk = {
|
|||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
|
|
||||||
void hw_timer_init(irq_handler_t handler)
|
void hw_timer_init(void)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
@ -113,7 +113,6 @@ void hw_timer_init(irq_handler_t handler)
|
|||||||
/* Enable timer 1 */
|
/* Enable timer 1 */
|
||||||
TCTL |= TCTL_TEN;
|
TCTL |= TCTL_TEN;
|
||||||
clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ);
|
clocksource_register_hz(&m68328_clk, TICKS_PER_JIFFY*HZ);
|
||||||
timer_interrupt = handler;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
|
|||||||
@ -105,6 +105,7 @@ config M68060
|
|||||||
config M68328
|
config M68328
|
||||||
bool "MC68328"
|
bool "MC68328"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
select M68000
|
select M68000
|
||||||
help
|
help
|
||||||
Motorola 68328 processor support.
|
Motorola 68328 processor support.
|
||||||
@ -112,6 +113,7 @@ config M68328
|
|||||||
config M68EZ328
|
config M68EZ328
|
||||||
bool "MC68EZ328"
|
bool "MC68EZ328"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
select M68000
|
select M68000
|
||||||
help
|
help
|
||||||
Motorola 68EX328 processor support.
|
Motorola 68EX328 processor support.
|
||||||
@ -119,6 +121,7 @@ config M68EZ328
|
|||||||
config M68VZ328
|
config M68VZ328
|
||||||
bool "MC68VZ328"
|
bool "MC68VZ328"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
select M68000
|
select M68000
|
||||||
help
|
help
|
||||||
Motorola 68VZ328 processor support.
|
Motorola 68VZ328 processor support.
|
||||||
@ -138,6 +141,7 @@ config M5206
|
|||||||
bool "MCF5206"
|
bool "MCF5206"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select COLDFIRE_SW_A7
|
select COLDFIRE_SW_A7
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select HAVE_MBAR
|
select HAVE_MBAR
|
||||||
select CPU_NO_EFFICIENT_FFS
|
select CPU_NO_EFFICIENT_FFS
|
||||||
help
|
help
|
||||||
@ -147,6 +151,7 @@ config M5206e
|
|||||||
bool "MCF5206e"
|
bool "MCF5206e"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select COLDFIRE_SW_A7
|
select COLDFIRE_SW_A7
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select HAVE_MBAR
|
select HAVE_MBAR
|
||||||
select CPU_NO_EFFICIENT_FFS
|
select CPU_NO_EFFICIENT_FFS
|
||||||
help
|
help
|
||||||
@ -155,7 +160,7 @@ config M5206e
|
|||||||
config M520x
|
config M520x
|
||||||
bool "MCF520x"
|
bool "MCF520x"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select GENERIC_CLOCKEVENTS
|
select COLDFIRE_PIT_TIMER
|
||||||
select HAVE_CACHE_SPLIT
|
select HAVE_CACHE_SPLIT
|
||||||
help
|
help
|
||||||
Freescale Coldfire 5207/5208 processor support.
|
Freescale Coldfire 5207/5208 processor support.
|
||||||
@ -163,7 +168,7 @@ config M520x
|
|||||||
config M523x
|
config M523x
|
||||||
bool "MCF523x"
|
bool "MCF523x"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select GENERIC_CLOCKEVENTS
|
select COLDFIRE_PIT_TIMER
|
||||||
select HAVE_CACHE_SPLIT
|
select HAVE_CACHE_SPLIT
|
||||||
select HAVE_IPSBAR
|
select HAVE_IPSBAR
|
||||||
help
|
help
|
||||||
@ -173,6 +178,7 @@ config M5249
|
|||||||
bool "MCF5249"
|
bool "MCF5249"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select COLDFIRE_SW_A7
|
select COLDFIRE_SW_A7
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select HAVE_MBAR
|
select HAVE_MBAR
|
||||||
select CPU_NO_EFFICIENT_FFS
|
select CPU_NO_EFFICIENT_FFS
|
||||||
help
|
help
|
||||||
@ -182,6 +188,7 @@ config M525x
|
|||||||
bool "MCF525x"
|
bool "MCF525x"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select COLDFIRE_SW_A7
|
select COLDFIRE_SW_A7
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select HAVE_MBAR
|
select HAVE_MBAR
|
||||||
select CPU_NO_EFFICIENT_FFS
|
select CPU_NO_EFFICIENT_FFS
|
||||||
help
|
help
|
||||||
@ -190,10 +197,10 @@ config M525x
|
|||||||
config M5271
|
config M5271
|
||||||
bool "MCF5271"
|
bool "MCF5271"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
|
select COLDFIRE_PIT_TIMER
|
||||||
select M527x
|
select M527x
|
||||||
select HAVE_CACHE_SPLIT
|
select HAVE_CACHE_SPLIT
|
||||||
select HAVE_IPSBAR
|
select HAVE_IPSBAR
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
help
|
help
|
||||||
Freescale (Motorola) ColdFire 5270/5271 processor support.
|
Freescale (Motorola) ColdFire 5270/5271 processor support.
|
||||||
|
|
||||||
@ -201,6 +208,7 @@ config M5272
|
|||||||
bool "MCF5272"
|
bool "MCF5272"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select COLDFIRE_SW_A7
|
select COLDFIRE_SW_A7
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select HAVE_MBAR
|
select HAVE_MBAR
|
||||||
select CPU_NO_EFFICIENT_FFS
|
select CPU_NO_EFFICIENT_FFS
|
||||||
help
|
help
|
||||||
@ -209,17 +217,17 @@ config M5272
|
|||||||
config M5275
|
config M5275
|
||||||
bool "MCF5275"
|
bool "MCF5275"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
|
select COLDFIRE_PIT_TIMER
|
||||||
select M527x
|
select M527x
|
||||||
select HAVE_CACHE_SPLIT
|
select HAVE_CACHE_SPLIT
|
||||||
select HAVE_IPSBAR
|
select HAVE_IPSBAR
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
help
|
help
|
||||||
Freescale (Motorola) ColdFire 5274/5275 processor support.
|
Freescale (Motorola) ColdFire 5274/5275 processor support.
|
||||||
|
|
||||||
config M528x
|
config M528x
|
||||||
bool "MCF528x"
|
bool "MCF528x"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select GENERIC_CLOCKEVENTS
|
select COLDFIRE_PIT_TIMER
|
||||||
select HAVE_CACHE_SPLIT
|
select HAVE_CACHE_SPLIT
|
||||||
select HAVE_IPSBAR
|
select HAVE_IPSBAR
|
||||||
help
|
help
|
||||||
@ -228,6 +236,7 @@ config M528x
|
|||||||
config M5307
|
config M5307
|
||||||
bool "MCF5307"
|
bool "MCF5307"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select COLDFIRE_SW_A7
|
select COLDFIRE_SW_A7
|
||||||
select HAVE_CACHE_CB
|
select HAVE_CACHE_CB
|
||||||
select HAVE_MBAR
|
select HAVE_MBAR
|
||||||
@ -238,6 +247,7 @@ config M5307
|
|||||||
config M532x
|
config M532x
|
||||||
bool "MCF532x"
|
bool "MCF532x"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select M53xx
|
select M53xx
|
||||||
select HAVE_CACHE_CB
|
select HAVE_CACHE_CB
|
||||||
help
|
help
|
||||||
@ -246,6 +256,7 @@ config M532x
|
|||||||
config M537x
|
config M537x
|
||||||
bool "MCF537x"
|
bool "MCF537x"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select M53xx
|
select M53xx
|
||||||
select HAVE_CACHE_CB
|
select HAVE_CACHE_CB
|
||||||
help
|
help
|
||||||
@ -255,6 +266,7 @@ config M5407
|
|||||||
bool "MCF5407"
|
bool "MCF5407"
|
||||||
depends on !MMU
|
depends on !MMU
|
||||||
select COLDFIRE_SW_A7
|
select COLDFIRE_SW_A7
|
||||||
|
select COLDFIRE_TIMERS
|
||||||
select HAVE_CACHE_CB
|
select HAVE_CACHE_CB
|
||||||
select HAVE_MBAR
|
select HAVE_MBAR
|
||||||
select CPU_NO_EFFICIENT_FFS
|
select CPU_NO_EFFICIENT_FFS
|
||||||
@ -264,6 +276,7 @@ config M5407
|
|||||||
config M547x
|
config M547x
|
||||||
bool "MCF547x"
|
bool "MCF547x"
|
||||||
select M54xx
|
select M54xx
|
||||||
|
select COLDFIRE_SLTIMERS
|
||||||
select MMU_COLDFIRE if MMU
|
select MMU_COLDFIRE if MMU
|
||||||
select FPU if MMU
|
select FPU if MMU
|
||||||
select HAVE_CACHE_CB
|
select HAVE_CACHE_CB
|
||||||
@ -274,6 +287,7 @@ config M547x
|
|||||||
|
|
||||||
config M548x
|
config M548x
|
||||||
bool "MCF548x"
|
bool "MCF548x"
|
||||||
|
select COLDFIRE_SLTIMERS
|
||||||
select MMU_COLDFIRE if MMU
|
select MMU_COLDFIRE if MMU
|
||||||
select FPU if MMU
|
select FPU if MMU
|
||||||
select M54xx
|
select M54xx
|
||||||
@ -285,8 +299,8 @@ config M548x
|
|||||||
|
|
||||||
config M5441x
|
config M5441x
|
||||||
bool "MCF5441x"
|
bool "MCF5441x"
|
||||||
|
select COLDFIRE_PIT_TIMER
|
||||||
select MMU_COLDFIRE if MMU
|
select MMU_COLDFIRE if MMU
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select HAVE_CACHE_CB
|
select HAVE_CACHE_CB
|
||||||
help
|
help
|
||||||
Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
|
Freescale Coldfire 54410/54415/54416/54417/54418 processor support.
|
||||||
@ -303,6 +317,17 @@ config M54xx
|
|||||||
select HAVE_PCI
|
select HAVE_PCI
|
||||||
bool
|
bool
|
||||||
|
|
||||||
|
config COLDFIRE_PIT_TIMER
|
||||||
|
bool
|
||||||
|
|
||||||
|
config COLDFIRE_TIMERS
|
||||||
|
bool
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
|
|
||||||
|
config COLDFIRE_SLTIMERS
|
||||||
|
bool
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
|
|
||||||
endif # COLDFIRE
|
endif # COLDFIRE
|
||||||
|
|
||||||
|
|
||||||
|
|||||||
@ -7,6 +7,7 @@ config AMIGA
|
|||||||
bool "Amiga support"
|
bool "Amiga support"
|
||||||
depends on MMU
|
depends on MMU
|
||||||
select MMU_MOTOROLA if MMU
|
select MMU_MOTOROLA if MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
This option enables support for the Amiga series of computers. If
|
This option enables support for the Amiga series of computers. If
|
||||||
you plan to use this kernel on an Amiga, say Y here and browse the
|
you plan to use this kernel on an Amiga, say Y here and browse the
|
||||||
@ -17,6 +18,7 @@ config ATARI
|
|||||||
depends on MMU
|
depends on MMU
|
||||||
select MMU_MOTOROLA if MMU
|
select MMU_MOTOROLA if MMU
|
||||||
select HAVE_ARCH_NVRAM_OPS
|
select HAVE_ARCH_NVRAM_OPS
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
This option enables support for the 68000-based Atari series of
|
This option enables support for the 68000-based Atari series of
|
||||||
computers (including the TT, Falcon and Medusa). If you plan to use
|
computers (including the TT, Falcon and Medusa). If you plan to use
|
||||||
@ -28,6 +30,7 @@ config MAC
|
|||||||
depends on MMU
|
depends on MMU
|
||||||
select MMU_MOTOROLA if MMU
|
select MMU_MOTOROLA if MMU
|
||||||
select HAVE_ARCH_NVRAM_OPS
|
select HAVE_ARCH_NVRAM_OPS
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
This option enables support for the Apple Macintosh series of
|
This option enables support for the Apple Macintosh series of
|
||||||
computers. If you plan to use this kernel on a Mac, say Y here and
|
computers. If you plan to use this kernel on a Mac, say Y here and
|
||||||
@ -38,6 +41,7 @@ config APOLLO
|
|||||||
bool "Apollo support"
|
bool "Apollo support"
|
||||||
depends on MMU
|
depends on MMU
|
||||||
select MMU_MOTOROLA if MMU
|
select MMU_MOTOROLA if MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
Say Y here if you want to run Linux on an MC680x0-based Apollo
|
Say Y here if you want to run Linux on an MC680x0-based Apollo
|
||||||
Domain workstation such as the DN3500.
|
Domain workstation such as the DN3500.
|
||||||
@ -56,6 +60,7 @@ config MVME147
|
|||||||
bool "MVME147 support"
|
bool "MVME147 support"
|
||||||
depends on MMU
|
depends on MMU
|
||||||
depends on VME
|
depends on VME
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
Say Y to include support for early Motorola VME boards. This will
|
Say Y to include support for early Motorola VME boards. This will
|
||||||
build a kernel which can run on MVME147 single-board computers. If
|
build a kernel which can run on MVME147 single-board computers. If
|
||||||
@ -66,6 +71,7 @@ config MVME16x
|
|||||||
bool "MVME162, 166 and 167 support"
|
bool "MVME162, 166 and 167 support"
|
||||||
depends on MMU
|
depends on MMU
|
||||||
depends on VME
|
depends on VME
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
Say Y to include support for Motorola VME boards. This will build a
|
Say Y to include support for Motorola VME boards. This will build a
|
||||||
kernel which can run on MVME162, MVME166, MVME167, MVME172, and
|
kernel which can run on MVME162, MVME166, MVME167, MVME172, and
|
||||||
@ -77,6 +83,7 @@ config BVME6000
|
|||||||
bool "BVME4000 and BVME6000 support"
|
bool "BVME4000 and BVME6000 support"
|
||||||
depends on MMU
|
depends on MMU
|
||||||
depends on VME
|
depends on VME
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
Say Y to include support for VME boards from BVM Ltd. This will
|
Say Y to include support for VME boards from BVM Ltd. This will
|
||||||
build a kernel which can run on BVME4000 and BVME6000 boards. If
|
build a kernel which can run on BVME4000 and BVME6000 boards. If
|
||||||
@ -87,6 +94,7 @@ config HP300
|
|||||||
bool "HP9000/300 and HP9000/400 support"
|
bool "HP9000/300 and HP9000/400 support"
|
||||||
depends on MMU
|
depends on MMU
|
||||||
select MMU_MOTOROLA if MMU
|
select MMU_MOTOROLA if MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
This option enables support for the HP9000/300 and HP9000/400 series
|
This option enables support for the HP9000/300 and HP9000/400 series
|
||||||
of workstations. Support for these machines is still somewhat
|
of workstations. Support for these machines is still somewhat
|
||||||
@ -97,6 +105,7 @@ config HP300
|
|||||||
config SUN3X
|
config SUN3X
|
||||||
bool "Sun3x support"
|
bool "Sun3x support"
|
||||||
depends on MMU
|
depends on MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
select MMU_MOTOROLA if MMU
|
select MMU_MOTOROLA if MMU
|
||||||
select M68030
|
select M68030
|
||||||
help
|
help
|
||||||
@ -112,6 +121,7 @@ config Q40
|
|||||||
bool "Q40/Q60 support"
|
bool "Q40/Q60 support"
|
||||||
depends on MMU
|
depends on MMU
|
||||||
select MMU_MOTOROLA if MMU
|
select MMU_MOTOROLA if MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
help
|
help
|
||||||
The Q40 is a Motorola 68040-based successor to the Sinclair QL
|
The Q40 is a Motorola 68040-based successor to the Sinclair QL
|
||||||
manufactured in Germany. There is an official Q40 home page at
|
manufactured in Germany. There is an official Q40 home page at
|
||||||
@ -124,6 +134,7 @@ config SUN3
|
|||||||
depends on MMU
|
depends on MMU
|
||||||
depends on !MMU_MOTOROLA
|
depends on !MMU_MOTOROLA
|
||||||
select MMU_SUN3 if MMU
|
select MMU_SUN3 if MMU
|
||||||
|
select LEGACY_TIMER_TICK
|
||||||
select NO_DMA
|
select NO_DMA
|
||||||
select M68020
|
select M68020
|
||||||
help
|
help
|
||||||
|
|||||||
@ -92,7 +92,7 @@ static char *amiga_models[] __initdata = {
|
|||||||
|
|
||||||
static char amiga_model_name[13] = "Amiga ";
|
static char amiga_model_name[13] = "Amiga ";
|
||||||
|
|
||||||
static void amiga_sched_init(irq_handler_t handler);
|
static void amiga_sched_init(void);
|
||||||
static void amiga_get_model(char *model);
|
static void amiga_get_model(char *model);
|
||||||
static void amiga_get_hardware_list(struct seq_file *m);
|
static void amiga_get_hardware_list(struct seq_file *m);
|
||||||
extern void amiga_mksound(unsigned int count, unsigned int ticks);
|
extern void amiga_mksound(unsigned int count, unsigned int ticks);
|
||||||
@ -467,16 +467,15 @@ static u32 clk_total, clk_offset;
|
|||||||
|
|
||||||
static irqreturn_t ciab_timer_handler(int irq, void *dev_id)
|
static irqreturn_t ciab_timer_handler(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
|
|
||||||
clk_total += jiffy_ticks;
|
clk_total += jiffy_ticks;
|
||||||
clk_offset = 0;
|
clk_offset = 0;
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
|
timer_heartbeat();
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init amiga_sched_init(irq_handler_t timer_routine)
|
static void __init amiga_sched_init(void)
|
||||||
{
|
{
|
||||||
static struct resource sched_res = {
|
static struct resource sched_res = {
|
||||||
.name = "timer", .start = 0x00bfd400, .end = 0x00bfd5ff,
|
.name = "timer", .start = 0x00bfd400, .end = 0x00bfd5ff,
|
||||||
@ -495,7 +494,7 @@ static void __init amiga_sched_init(irq_handler_t timer_routine)
|
|||||||
* SCSI code. We'll have to take a look at this later
|
* SCSI code. We'll have to take a look at this later
|
||||||
*/
|
*/
|
||||||
if (request_irq(IRQ_AMIGA_CIAB_TA, ciab_timer_handler, IRQF_TIMER,
|
if (request_irq(IRQ_AMIGA_CIAB_TA, ciab_timer_handler, IRQF_TIMER,
|
||||||
"timer", timer_routine))
|
"timer", NULL))
|
||||||
pr_err("Couldn't register timer interrupt\n");
|
pr_err("Couldn't register timer interrupt\n");
|
||||||
/* start timer */
|
/* start timer */
|
||||||
ciab.cra |= 0x11;
|
ciab.cra |= 0x11;
|
||||||
|
|||||||
@ -26,7 +26,7 @@ u_long cpuctrl_physaddr;
|
|||||||
u_long timer_physaddr;
|
u_long timer_physaddr;
|
||||||
u_long apollo_model;
|
u_long apollo_model;
|
||||||
|
|
||||||
extern void dn_sched_init(irq_handler_t handler);
|
extern void dn_sched_init(void);
|
||||||
extern void dn_init_IRQ(void);
|
extern void dn_init_IRQ(void);
|
||||||
extern int dn_dummy_hwclk(int, struct rtc_time *);
|
extern int dn_dummy_hwclk(int, struct rtc_time *);
|
||||||
extern void dn_dummy_reset(void);
|
extern void dn_dummy_reset(void);
|
||||||
@ -167,11 +167,10 @@ void __init config_apollo(void)
|
|||||||
|
|
||||||
irqreturn_t dn_timer_int(int irq, void *dev_id)
|
irqreturn_t dn_timer_int(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_handler = dev_id;
|
|
||||||
|
|
||||||
volatile unsigned char x;
|
volatile unsigned char x;
|
||||||
|
|
||||||
timer_handler(irq, dev_id);
|
legacy_timer_tick(1);
|
||||||
|
timer_heartbeat();
|
||||||
|
|
||||||
x = *(volatile unsigned char *)(apollo_timer + 3);
|
x = *(volatile unsigned char *)(apollo_timer + 3);
|
||||||
x = *(volatile unsigned char *)(apollo_timer + 5);
|
x = *(volatile unsigned char *)(apollo_timer + 5);
|
||||||
@ -179,7 +178,7 @@ irqreturn_t dn_timer_int(int irq, void *dev_id)
|
|||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
void dn_sched_init(irq_handler_t timer_routine)
|
void dn_sched_init(void)
|
||||||
{
|
{
|
||||||
/* program timer 1 */
|
/* program timer 1 */
|
||||||
*(volatile unsigned char *)(apollo_timer + 3) = 0x01;
|
*(volatile unsigned char *)(apollo_timer + 3) = 0x01;
|
||||||
@ -197,7 +196,7 @@ void dn_sched_init(irq_handler_t timer_routine)
|
|||||||
*(volatile unsigned char *)(apollo_timer + 0x3));
|
*(volatile unsigned char *)(apollo_timer + 0x3));
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", timer_routine))
|
if (request_irq(IRQ_APOLLO, dn_timer_int, 0, "time", NULL))
|
||||||
pr_err("Couldn't register timer interrupt\n");
|
pr_err("Couldn't register timer interrupt\n");
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|||||||
@ -77,7 +77,7 @@ static void atari_heartbeat(int on);
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* atari specific timer functions (in time.c) */
|
/* atari specific timer functions (in time.c) */
|
||||||
extern void atari_sched_init(irq_handler_t);
|
extern void atari_sched_init(void);
|
||||||
extern int atari_mste_hwclk (int, struct rtc_time *);
|
extern int atari_mste_hwclk (int, struct rtc_time *);
|
||||||
extern int atari_tt_hwclk (int, struct rtc_time *);
|
extern int atari_tt_hwclk (int, struct rtc_time *);
|
||||||
|
|
||||||
|
|||||||
@ -21,6 +21,7 @@
|
|||||||
#include <linux/export.h>
|
#include <linux/export.h>
|
||||||
|
|
||||||
#include <asm/atariints.h>
|
#include <asm/atariints.h>
|
||||||
|
#include <asm/machdep.h>
|
||||||
|
|
||||||
DEFINE_SPINLOCK(rtc_lock);
|
DEFINE_SPINLOCK(rtc_lock);
|
||||||
EXPORT_SYMBOL_GPL(rtc_lock);
|
EXPORT_SYMBOL_GPL(rtc_lock);
|
||||||
@ -40,7 +41,6 @@ static u8 last_timer_count;
|
|||||||
|
|
||||||
static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id)
|
static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
@ -48,14 +48,15 @@ static irqreturn_t mfp_timer_c_handler(int irq, void *dev_id)
|
|||||||
last_timer_count = st_mfp.tim_dt_c;
|
last_timer_count = st_mfp.tim_dt_c;
|
||||||
} while (last_timer_count == 1);
|
} while (last_timer_count == 1);
|
||||||
clk_total += INT_TICKS;
|
clk_total += INT_TICKS;
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
|
timer_heartbeat();
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init
|
void __init
|
||||||
atari_sched_init(irq_handler_t timer_routine)
|
atari_sched_init(void)
|
||||||
{
|
{
|
||||||
/* set Timer C data Register */
|
/* set Timer C data Register */
|
||||||
st_mfp.tim_dt_c = INT_TICKS;
|
st_mfp.tim_dt_c = INT_TICKS;
|
||||||
@ -63,7 +64,7 @@ atari_sched_init(irq_handler_t timer_routine)
|
|||||||
st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60;
|
st_mfp.tim_ct_cd = (st_mfp.tim_ct_cd & 15) | 0x60;
|
||||||
/* install interrupt service routine for MFP Timer C */
|
/* install interrupt service routine for MFP Timer C */
|
||||||
if (request_irq(IRQ_MFP_TIMC, mfp_timer_c_handler, IRQF_TIMER, "timer",
|
if (request_irq(IRQ_MFP_TIMC, mfp_timer_c_handler, IRQF_TIMER, "timer",
|
||||||
timer_routine))
|
NULL))
|
||||||
pr_err("Couldn't register timer interrupt\n");
|
pr_err("Couldn't register timer interrupt\n");
|
||||||
|
|
||||||
clocksource_register_hz(&atari_clk, INT_CLK);
|
clocksource_register_hz(&atari_clk, INT_CLK);
|
||||||
|
|||||||
@ -38,7 +38,7 @@
|
|||||||
#include <asm/bvme6000hw.h>
|
#include <asm/bvme6000hw.h>
|
||||||
|
|
||||||
static void bvme6000_get_model(char *model);
|
static void bvme6000_get_model(char *model);
|
||||||
extern void bvme6000_sched_init(irq_handler_t handler);
|
extern void bvme6000_sched_init(void);
|
||||||
extern int bvme6000_hwclk (int, struct rtc_time *);
|
extern int bvme6000_hwclk (int, struct rtc_time *);
|
||||||
extern void bvme6000_reset (void);
|
extern void bvme6000_reset (void);
|
||||||
void bvme6000_set_vectors (void);
|
void bvme6000_set_vectors (void);
|
||||||
@ -164,7 +164,6 @@ static u32 clk_total, clk_offset;
|
|||||||
|
|
||||||
static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
|
static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
|
volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
|
||||||
unsigned char msr;
|
unsigned char msr;
|
||||||
@ -174,7 +173,7 @@ static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
|
|||||||
rtc->msr = msr | 0x20; /* Ack the interrupt */
|
rtc->msr = msr | 0x20; /* Ack the interrupt */
|
||||||
clk_total += RTC_TIMER_CYCLES;
|
clk_total += RTC_TIMER_CYCLES;
|
||||||
clk_offset = 0;
|
clk_offset = 0;
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
@ -189,7 +188,7 @@ static irqreturn_t bvme6000_timer_int (int irq, void *dev_id)
|
|||||||
* so divide by 8 to get the microsecond result.
|
* so divide by 8 to get the microsecond result.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
void bvme6000_sched_init (irq_handler_t timer_routine)
|
void bvme6000_sched_init (void)
|
||||||
{
|
{
|
||||||
volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
|
volatile RtcPtr_t rtc = (RtcPtr_t)BVME_RTC_BASE;
|
||||||
unsigned char msr = rtc->msr & 0xc0;
|
unsigned char msr = rtc->msr & 0xc0;
|
||||||
@ -197,7 +196,7 @@ void bvme6000_sched_init (irq_handler_t timer_routine)
|
|||||||
rtc->msr = 0; /* Ensure timer registers accessible */
|
rtc->msr = 0; /* Ensure timer registers accessible */
|
||||||
|
|
||||||
if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, IRQF_TIMER, "timer",
|
if (request_irq(BVME_IRQ_RTC, bvme6000_timer_int, IRQF_TIMER, "timer",
|
||||||
timer_routine))
|
NULL))
|
||||||
panic ("Couldn't register timer int");
|
panic ("Couldn't register timer int");
|
||||||
|
|
||||||
rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
|
rtc->t1cr_omr = 0x04; /* Mode 2, ext clk */
|
||||||
|
|||||||
@ -16,20 +16,24 @@
|
|||||||
asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
|
asflags-$(CONFIG_FULLDEBUG) := -DDEBUGGER_COMPATIBLE_CACHE=1
|
||||||
|
|
||||||
obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o
|
obj-$(CONFIG_COLDFIRE) += cache.o clk.o device.o dma.o entry.o vectors.o
|
||||||
obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
|
obj-$(CONFIG_M5206) += m5206.o intc.o reset.o
|
||||||
obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
|
obj-$(CONFIG_M5206e) += m5206.o intc.o reset.o
|
||||||
obj-$(CONFIG_M520x) += m520x.o pit.o intc-simr.o reset.o
|
obj-$(CONFIG_M520x) += m520x.o intc-simr.o reset.o
|
||||||
obj-$(CONFIG_M523x) += m523x.o pit.o dma_timer.o intc-2.o reset.o
|
obj-$(CONFIG_M523x) += m523x.o dma_timer.o intc-2.o reset.o
|
||||||
obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
|
obj-$(CONFIG_M5249) += m5249.o intc.o intc-5249.o reset.o
|
||||||
obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
|
obj-$(CONFIG_M525x) += m525x.o intc.o intc-525x.o reset.o
|
||||||
obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
|
obj-$(CONFIG_M527x) += m527x.o intc-2.o reset.o
|
||||||
obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
|
obj-$(CONFIG_M5272) += m5272.o intc-5272.o
|
||||||
obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
|
obj-$(CONFIG_M528x) += m528x.o intc-2.o reset.o
|
||||||
obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
|
obj-$(CONFIG_M5307) += m5307.o intc.o reset.o
|
||||||
obj-$(CONFIG_M53xx) += m53xx.o timers.o intc-simr.o reset.o
|
obj-$(CONFIG_M53xx) += m53xx.o intc-simr.o reset.o
|
||||||
obj-$(CONFIG_M5407) += m5407.o timers.o intc.o reset.o
|
obj-$(CONFIG_M5407) += m5407.o intc.o reset.o
|
||||||
obj-$(CONFIG_M54xx) += m54xx.o sltimers.o intc-2.o
|
obj-$(CONFIG_M54xx) += m54xx.o intc-2.o
|
||||||
obj-$(CONFIG_M5441x) += m5441x.o pit.o intc-simr.o reset.o
|
obj-$(CONFIG_M5441x) += m5441x.o intc-simr.o reset.o
|
||||||
|
|
||||||
|
obj-$(CONFIG_COLDFIRE_PIT_TIMER) += pit.o
|
||||||
|
obj-$(CONFIG_COLDFIRE_TIMERS) += timers.o
|
||||||
|
obj-$(CONFIG_COLDFIRE_SLTIMERS) += sltimers.o
|
||||||
|
|
||||||
obj-$(CONFIG_NETtel) += nettel.o
|
obj-$(CONFIG_NETtel) += nettel.o
|
||||||
obj-$(CONFIG_CLEOPATRA) += nettel.o
|
obj-$(CONFIG_CLEOPATRA) += nettel.o
|
||||||
|
|||||||
@ -136,7 +136,7 @@ static struct clocksource pit_clk = {
|
|||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
|
|
||||||
void hw_timer_init(irq_handler_t handler)
|
void hw_timer_init(void)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
|
|||||||
@ -83,14 +83,13 @@ void mcfslt_profile_init(void)
|
|||||||
static u32 mcfslt_cycles_per_jiffy;
|
static u32 mcfslt_cycles_per_jiffy;
|
||||||
static u32 mcfslt_cnt;
|
static u32 mcfslt_cnt;
|
||||||
|
|
||||||
static irq_handler_t timer_interrupt;
|
|
||||||
|
|
||||||
static irqreturn_t mcfslt_tick(int irq, void *dummy)
|
static irqreturn_t mcfslt_tick(int irq, void *dummy)
|
||||||
{
|
{
|
||||||
/* Reset Slice Timer 0 */
|
/* Reset Slice Timer 0 */
|
||||||
__raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
|
__raw_writel(MCFSLT_SSR_BE | MCFSLT_SSR_TE, TA(MCFSLT_SSR));
|
||||||
mcfslt_cnt += mcfslt_cycles_per_jiffy;
|
mcfslt_cnt += mcfslt_cycles_per_jiffy;
|
||||||
return timer_interrupt(irq, dummy);
|
legacy_timer_tick(1);
|
||||||
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
static u64 mcfslt_read_clk(struct clocksource *cs)
|
static u64 mcfslt_read_clk(struct clocksource *cs)
|
||||||
@ -119,7 +118,7 @@ static struct clocksource mcfslt_clk = {
|
|||||||
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
.flags = CLOCK_SOURCE_IS_CONTINUOUS,
|
||||||
};
|
};
|
||||||
|
|
||||||
void hw_timer_init(irq_handler_t handler)
|
void hw_timer_init(void)
|
||||||
{
|
{
|
||||||
int r;
|
int r;
|
||||||
|
|
||||||
@ -136,7 +135,6 @@ void hw_timer_init(irq_handler_t handler)
|
|||||||
/* initialize mcfslt_cnt knowing that slice timers count down */
|
/* initialize mcfslt_cnt knowing that slice timers count down */
|
||||||
mcfslt_cnt = mcfslt_cycles_per_jiffy;
|
mcfslt_cnt = mcfslt_cycles_per_jiffy;
|
||||||
|
|
||||||
timer_interrupt = handler;
|
|
||||||
r = request_irq(MCF_IRQ_TIMER, mcfslt_tick, IRQF_TIMER, "timer", NULL);
|
r = request_irq(MCF_IRQ_TIMER, mcfslt_tick, IRQF_TIMER, "timer", NULL);
|
||||||
if (r) {
|
if (r) {
|
||||||
pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER,
|
pr_err("Failed to request irq %d (timer): %pe\n", MCF_IRQ_TIMER,
|
||||||
|
|||||||
@ -48,8 +48,6 @@ void coldfire_profile_init(void);
|
|||||||
static u32 mcftmr_cycles_per_jiffy;
|
static u32 mcftmr_cycles_per_jiffy;
|
||||||
static u32 mcftmr_cnt;
|
static u32 mcftmr_cnt;
|
||||||
|
|
||||||
static irq_handler_t timer_interrupt;
|
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
|
|
||||||
static void init_timer_irq(void)
|
static void init_timer_irq(void)
|
||||||
@ -77,7 +75,8 @@ static irqreturn_t mcftmr_tick(int irq, void *dummy)
|
|||||||
__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
|
__raw_writeb(MCFTIMER_TER_CAP | MCFTIMER_TER_REF, TA(MCFTIMER_TER));
|
||||||
|
|
||||||
mcftmr_cnt += mcftmr_cycles_per_jiffy;
|
mcftmr_cnt += mcftmr_cycles_per_jiffy;
|
||||||
return timer_interrupt(irq, dummy);
|
legacy_timer_tick(1);
|
||||||
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
@ -108,7 +107,7 @@ static struct clocksource mcftmr_clk = {
|
|||||||
|
|
||||||
/***************************************************************************/
|
/***************************************************************************/
|
||||||
|
|
||||||
void hw_timer_init(irq_handler_t handler)
|
void hw_timer_init(void)
|
||||||
{
|
{
|
||||||
int r;
|
int r;
|
||||||
|
|
||||||
@ -126,7 +125,6 @@ void hw_timer_init(irq_handler_t handler)
|
|||||||
|
|
||||||
clocksource_register_hz(&mcftmr_clk, FREQ);
|
clocksource_register_hz(&mcftmr_clk, FREQ);
|
||||||
|
|
||||||
timer_interrupt = handler;
|
|
||||||
init_timer_irq();
|
init_timer_irq();
|
||||||
r = request_irq(MCF_IRQ_TIMER, mcftmr_tick, IRQF_TIMER, "timer", NULL);
|
r = request_irq(MCF_IRQ_TIMER, mcftmr_tick, IRQF_TIMER, "timer", NULL);
|
||||||
if (r) {
|
if (r) {
|
||||||
|
|||||||
@ -55,7 +55,6 @@ static u32 clk_total, clk_offset;
|
|||||||
|
|
||||||
static irqreturn_t hp300_tick(int irq, void *dev_id)
|
static irqreturn_t hp300_tick(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
unsigned long tmp;
|
unsigned long tmp;
|
||||||
|
|
||||||
@ -64,7 +63,8 @@ static irqreturn_t hp300_tick(int irq, void *dev_id)
|
|||||||
asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
|
asm volatile ("movpw %1@(5),%0" : "=d" (tmp) : "a" (CLOCKBASE));
|
||||||
clk_total += INTVAL;
|
clk_total += INTVAL;
|
||||||
clk_offset = 0;
|
clk_offset = 0;
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
|
timer_heartbeat();
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
/* Turn off the network and SCSI leds */
|
/* Turn off the network and SCSI leds */
|
||||||
@ -98,14 +98,14 @@ again:
|
|||||||
return ticks;
|
return ticks;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init hp300_sched_init(irq_handler_t vector)
|
void __init hp300_sched_init(void)
|
||||||
{
|
{
|
||||||
out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
|
out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
|
||||||
out_8(CLOCKBASE + CLKCR1, 0x1); /* reset */
|
out_8(CLOCKBASE + CLKCR1, 0x1); /* reset */
|
||||||
|
|
||||||
asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
|
asm volatile(" movpw %0,%1@(5)" : : "d" (INTVAL), "a" (CLOCKBASE));
|
||||||
|
|
||||||
if (request_irq(IRQ_AUTO_6, hp300_tick, IRQF_TIMER, "timer tick", vector))
|
if (request_irq(IRQ_AUTO_6, hp300_tick, IRQF_TIMER, "timer tick", NULL))
|
||||||
pr_err("Couldn't register timer interrupt\n");
|
pr_err("Couldn't register timer interrupt\n");
|
||||||
|
|
||||||
out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
|
out_8(CLOCKBASE + CLKCR2, 0x1); /* select CR1 */
|
||||||
|
|||||||
@ -1 +1 @@
|
|||||||
extern void hp300_sched_init(irq_handler_t vector);
|
extern void hp300_sched_init(void);
|
||||||
|
|||||||
@ -12,7 +12,7 @@ struct rtc_time;
|
|||||||
struct rtc_pll_info;
|
struct rtc_pll_info;
|
||||||
struct buffer_head;
|
struct buffer_head;
|
||||||
|
|
||||||
extern void (*mach_sched_init) (irq_handler_t handler);
|
extern void (*mach_sched_init) (void);
|
||||||
/* machine dependent irq functions */
|
/* machine dependent irq functions */
|
||||||
extern void (*mach_init_IRQ) (void);
|
extern void (*mach_init_IRQ) (void);
|
||||||
extern void (*mach_get_model) (char *model);
|
extern void (*mach_get_model) (char *model);
|
||||||
@ -32,8 +32,14 @@ extern void (*mach_l2_flush) (int);
|
|||||||
extern void (*mach_beep) (unsigned int, unsigned int);
|
extern void (*mach_beep) (unsigned int, unsigned int);
|
||||||
|
|
||||||
/* Hardware clock functions */
|
/* Hardware clock functions */
|
||||||
extern void hw_timer_init(irq_handler_t handler);
|
extern void hw_timer_init(void);
|
||||||
extern unsigned long hw_timer_offset(void);
|
#ifdef CONFIG_HEARTBEAT
|
||||||
|
extern void timer_heartbeat(void);
|
||||||
|
#else
|
||||||
|
static inline void timer_heartbeat(void)
|
||||||
|
{
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
extern void config_BSP(char *command, int len);
|
extern void config_BSP(char *command, int len);
|
||||||
|
|
||||||
|
|||||||
@ -82,7 +82,7 @@ static struct m68k_mem_info m68k_ramdisk __initdata;
|
|||||||
|
|
||||||
static char m68k_command_line[CL_SIZE] __initdata;
|
static char m68k_command_line[CL_SIZE] __initdata;
|
||||||
|
|
||||||
void (*mach_sched_init) (irq_handler_t handler) __initdata = NULL;
|
void (*mach_sched_init) (void) __initdata = NULL;
|
||||||
/* machine dependent irq functions */
|
/* machine dependent irq functions */
|
||||||
void (*mach_init_IRQ) (void) __initdata = NULL;
|
void (*mach_init_IRQ) (void) __initdata = NULL;
|
||||||
void (*mach_get_model) (char *model);
|
void (*mach_get_model) (char *model);
|
||||||
|
|||||||
@ -49,7 +49,7 @@ EXPORT_SYMBOL(memory_end);
|
|||||||
char __initdata command_line[COMMAND_LINE_SIZE];
|
char __initdata command_line[COMMAND_LINE_SIZE];
|
||||||
|
|
||||||
/* machine dependent timer functions */
|
/* machine dependent timer functions */
|
||||||
void (*mach_sched_init)(irq_handler_t handler) __initdata = NULL;
|
void (*mach_sched_init)(void) __initdata = NULL;
|
||||||
int (*mach_hwclk) (int, struct rtc_time*);
|
int (*mach_hwclk) (int, struct rtc_time*);
|
||||||
|
|
||||||
/* machine dependent reboot functions */
|
/* machine dependent reboot functions */
|
||||||
|
|||||||
@ -35,18 +35,9 @@
|
|||||||
unsigned long (*mach_random_get_entropy)(void);
|
unsigned long (*mach_random_get_entropy)(void);
|
||||||
EXPORT_SYMBOL_GPL(mach_random_get_entropy);
|
EXPORT_SYMBOL_GPL(mach_random_get_entropy);
|
||||||
|
|
||||||
|
|
||||||
/*
|
|
||||||
* timer_interrupt() needs to keep up the real-time clock,
|
|
||||||
* as well as call the "xtime_update()" routine every clocktick
|
|
||||||
*/
|
|
||||||
static irqreturn_t timer_interrupt(int irq, void *dummy)
|
|
||||||
{
|
|
||||||
xtime_update(1);
|
|
||||||
update_process_times(user_mode(get_irq_regs()));
|
|
||||||
profile_tick(CPU_PROFILING);
|
|
||||||
|
|
||||||
#ifdef CONFIG_HEARTBEAT
|
#ifdef CONFIG_HEARTBEAT
|
||||||
|
void timer_heartbeat(void)
|
||||||
|
{
|
||||||
/* use power LED as a heartbeat instead -- much more useful
|
/* use power LED as a heartbeat instead -- much more useful
|
||||||
for debugging -- based on the version for PReP by Cort */
|
for debugging -- based on the version for PReP by Cort */
|
||||||
/* acts like an actual heart beat -- ie thump-thump-pause... */
|
/* acts like an actual heart beat -- ie thump-thump-pause... */
|
||||||
@ -68,9 +59,8 @@ static irqreturn_t timer_interrupt(int irq, void *dummy)
|
|||||||
dist = period / 4;
|
dist = period / 4;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
#endif /* CONFIG_HEARTBEAT */
|
|
||||||
return IRQ_HANDLED;
|
|
||||||
}
|
}
|
||||||
|
#endif /* CONFIG_HEARTBEAT */
|
||||||
|
|
||||||
#ifdef CONFIG_M68KCLASSIC
|
#ifdef CONFIG_M68KCLASSIC
|
||||||
#if !IS_BUILTIN(CONFIG_RTC_DRV_GENERIC)
|
#if !IS_BUILTIN(CONFIG_RTC_DRV_GENERIC)
|
||||||
@ -154,5 +144,5 @@ module_init(rtc_init);
|
|||||||
|
|
||||||
void __init time_init(void)
|
void __init time_init(void)
|
||||||
{
|
{
|
||||||
mach_sched_init(timer_interrupt);
|
mach_sched_init();
|
||||||
}
|
}
|
||||||
|
|||||||
@ -57,7 +57,7 @@ static unsigned long mac_orig_videoaddr;
|
|||||||
extern int mac_hwclk(int, struct rtc_time *);
|
extern int mac_hwclk(int, struct rtc_time *);
|
||||||
extern void iop_init(void);
|
extern void iop_init(void);
|
||||||
extern void via_init(void);
|
extern void via_init(void);
|
||||||
extern void via_init_clock(irq_handler_t func);
|
extern void via_init_clock(void);
|
||||||
extern void oss_init(void);
|
extern void oss_init(void);
|
||||||
extern void psc_init(void);
|
extern void psc_init(void);
|
||||||
extern void baboon_init(void);
|
extern void baboon_init(void);
|
||||||
@ -68,9 +68,9 @@ static void mac_get_model(char *str);
|
|||||||
static void mac_identify(void);
|
static void mac_identify(void);
|
||||||
static void mac_report_hardware(void);
|
static void mac_report_hardware(void);
|
||||||
|
|
||||||
static void __init mac_sched_init(irq_handler_t vector)
|
static void __init mac_sched_init(void)
|
||||||
{
|
{
|
||||||
via_init_clock(vector);
|
via_init_clock();
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|||||||
@ -583,19 +583,17 @@ static u32 clk_total, clk_offset;
|
|||||||
|
|
||||||
static irqreturn_t via_timer_handler(int irq, void *dev_id)
|
static irqreturn_t via_timer_handler(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
|
|
||||||
clk_total += VIA_TIMER_CYCLES;
|
clk_total += VIA_TIMER_CYCLES;
|
||||||
clk_offset = 0;
|
clk_offset = 0;
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
void __init via_init_clock(irq_handler_t timer_routine)
|
void __init via_init_clock(void)
|
||||||
{
|
{
|
||||||
if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer",
|
if (request_irq(IRQ_MAC_TIMER_1, via_timer_handler, IRQF_TIMER, "timer",
|
||||||
timer_routine)) {
|
NULL)) {
|
||||||
pr_err("Couldn't register %s interrupt\n", "timer");
|
pr_err("Couldn't register %s interrupt\n", "timer");
|
||||||
return;
|
return;
|
||||||
}
|
}
|
||||||
|
|||||||
@ -37,7 +37,7 @@
|
|||||||
|
|
||||||
|
|
||||||
static void mvme147_get_model(char *model);
|
static void mvme147_get_model(char *model);
|
||||||
extern void mvme147_sched_init(irq_handler_t handler);
|
extern void mvme147_sched_init(void);
|
||||||
extern int mvme147_hwclk (int, struct rtc_time *);
|
extern int mvme147_hwclk (int, struct rtc_time *);
|
||||||
extern void mvme147_reset (void);
|
extern void mvme147_reset (void);
|
||||||
|
|
||||||
@ -111,24 +111,23 @@ static u32 clk_total;
|
|||||||
|
|
||||||
static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
|
static irqreturn_t mvme147_timer_int (int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
|
m147_pcc->t1_int_cntrl = PCC_TIMER_INT_CLR;
|
||||||
m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF;
|
m147_pcc->t1_cntrl = PCC_TIMER_CLR_OVF;
|
||||||
clk_total += PCC_TIMER_CYCLES;
|
clk_total += PCC_TIMER_CYCLES;
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
void mvme147_sched_init (irq_handler_t timer_routine)
|
void mvme147_sched_init (void)
|
||||||
{
|
{
|
||||||
if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,
|
if (request_irq(PCC_IRQ_TIMER1, mvme147_timer_int, IRQF_TIMER,
|
||||||
"timer 1", timer_routine))
|
"timer 1", NULL))
|
||||||
pr_err("Couldn't register timer interrupt\n");
|
pr_err("Couldn't register timer interrupt\n");
|
||||||
|
|
||||||
/* Init the clock with a value */
|
/* Init the clock with a value */
|
||||||
|
|||||||
@ -43,7 +43,7 @@ extern t_bdid mvme_bdid;
|
|||||||
static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
|
static MK48T08ptr_t volatile rtc = (MK48T08ptr_t)MVME_RTC_BASE;
|
||||||
|
|
||||||
static void mvme16x_get_model(char *model);
|
static void mvme16x_get_model(char *model);
|
||||||
extern void mvme16x_sched_init(irq_handler_t handler);
|
extern void mvme16x_sched_init(void);
|
||||||
extern int mvme16x_hwclk (int, struct rtc_time *);
|
extern int mvme16x_hwclk (int, struct rtc_time *);
|
||||||
extern void mvme16x_reset (void);
|
extern void mvme16x_reset (void);
|
||||||
|
|
||||||
@ -371,20 +371,19 @@ static u32 clk_total;
|
|||||||
|
|
||||||
static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
|
static irqreturn_t mvme16x_timer_int (int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
out_8(PCCTIC1, in_8(PCCTIC1) | PCCTIC1_INT_CLR);
|
out_8(PCCTIC1, in_8(PCCTIC1) | PCCTIC1_INT_CLR);
|
||||||
out_8(PCCTOVR1, PCCTOVR1_OVR_CLR);
|
out_8(PCCTOVR1, PCCTOVR1_OVR_CLR);
|
||||||
clk_total += PCC_TIMER_CYCLES;
|
clk_total += PCC_TIMER_CYCLES;
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
void mvme16x_sched_init (irq_handler_t timer_routine)
|
void mvme16x_sched_init(void)
|
||||||
{
|
{
|
||||||
uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
|
uint16_t brdno = be16_to_cpu(mvme_bdid.brdno);
|
||||||
int irq;
|
int irq;
|
||||||
@ -395,7 +394,7 @@ void mvme16x_sched_init (irq_handler_t timer_routine)
|
|||||||
out_8(PCCTOVR1, in_8(PCCTOVR1) | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
|
out_8(PCCTOVR1, in_8(PCCTOVR1) | PCCTOVR1_TIC_EN | PCCTOVR1_COC_EN);
|
||||||
out_8(PCCTIC1, PCCTIC1_INT_EN | 6);
|
out_8(PCCTIC1, PCCTIC1_INT_EN | 6);
|
||||||
if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer",
|
if (request_irq(MVME16x_IRQ_TIMER, mvme16x_timer_int, IRQF_TIMER, "timer",
|
||||||
timer_routine))
|
NULL))
|
||||||
panic ("Couldn't register timer int");
|
panic ("Couldn't register timer int");
|
||||||
|
|
||||||
clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ);
|
clocksource_register_hz(&mvme16x_clk, PCC_TIMER_CLOCK_FREQ);
|
||||||
|
|||||||
@ -37,7 +37,7 @@
|
|||||||
|
|
||||||
extern void q40_init_IRQ(void);
|
extern void q40_init_IRQ(void);
|
||||||
static void q40_get_model(char *model);
|
static void q40_get_model(char *model);
|
||||||
extern void q40_sched_init(irq_handler_t handler);
|
extern void q40_sched_init(void);
|
||||||
|
|
||||||
static int q40_hwclk(int, struct rtc_time *);
|
static int q40_hwclk(int, struct rtc_time *);
|
||||||
static unsigned int q40_get_ss(void);
|
static unsigned int q40_get_ss(void);
|
||||||
|
|||||||
@ -17,6 +17,7 @@
|
|||||||
#include <linux/interrupt.h>
|
#include <linux/interrupt.h>
|
||||||
#include <linux/irq.h>
|
#include <linux/irq.h>
|
||||||
|
|
||||||
|
#include <asm/machdep.h>
|
||||||
#include <asm/ptrace.h>
|
#include <asm/ptrace.h>
|
||||||
#include <asm/traps.h>
|
#include <asm/traps.h>
|
||||||
|
|
||||||
@ -129,8 +130,6 @@ void q40_mksound(unsigned int hz, unsigned int ticks)
|
|||||||
|
|
||||||
static irqreturn_t q40_timer_int(int irq, void *dev_id)
|
static irqreturn_t q40_timer_int(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
|
|
||||||
ql_ticks = ql_ticks ? 0 : 1;
|
ql_ticks = ql_ticks ? 0 : 1;
|
||||||
if (sound_ticks) {
|
if (sound_ticks) {
|
||||||
unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
|
unsigned char sval=(sound_ticks & 1) ? 128-SVOL : 128+SVOL;
|
||||||
@ -143,19 +142,20 @@ static irqreturn_t q40_timer_int(int irq, void *dev_id)
|
|||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
|
timer_heartbeat();
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
}
|
}
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
|
|
||||||
void q40_sched_init (irq_handler_t timer_routine)
|
void q40_sched_init (void)
|
||||||
{
|
{
|
||||||
int timer_irq;
|
int timer_irq;
|
||||||
|
|
||||||
timer_irq = Q40_IRQ_FRAME;
|
timer_irq = Q40_IRQ_FRAME;
|
||||||
|
|
||||||
if (request_irq(timer_irq, q40_timer_int, 0, "timer", timer_routine))
|
if (request_irq(timer_irq, q40_timer_int, 0, "timer", NULL))
|
||||||
panic("Couldn't register timer int");
|
panic("Couldn't register timer int");
|
||||||
|
|
||||||
master_outb(-1, FRAME_CLEAR_REG);
|
master_outb(-1, FRAME_CLEAR_REG);
|
||||||
|
|||||||
@ -36,7 +36,7 @@
|
|||||||
|
|
||||||
char sun3_reserved_pmeg[SUN3_PMEGS_NUM];
|
char sun3_reserved_pmeg[SUN3_PMEGS_NUM];
|
||||||
|
|
||||||
static void sun3_sched_init(irq_handler_t handler);
|
static void sun3_sched_init(void);
|
||||||
extern void sun3_get_model (char* model);
|
extern void sun3_get_model (char* model);
|
||||||
extern int sun3_hwclk(int set, struct rtc_time *t);
|
extern int sun3_hwclk(int set, struct rtc_time *t);
|
||||||
|
|
||||||
@ -151,7 +151,7 @@ void __init config_sun3(void)
|
|||||||
sun3_bootmem_alloc(memory_start, memory_end);
|
sun3_bootmem_alloc(memory_start, memory_end);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void __init sun3_sched_init(irq_handler_t timer_routine)
|
static void __init sun3_sched_init(void)
|
||||||
{
|
{
|
||||||
sun3_disable_interrupts();
|
sun3_disable_interrupts();
|
||||||
intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_DISABLE|INTERSIL_24H_MODE);
|
intersil_clock->cmd_reg=(INTERSIL_RUN|INTERSIL_INT_DISABLE|INTERSIL_24H_MODE);
|
||||||
|
|||||||
@ -73,8 +73,7 @@ static irqreturn_t sun3_int5(int irq, void *dev_id)
|
|||||||
#ifdef CONFIG_SUN3
|
#ifdef CONFIG_SUN3
|
||||||
intersil_clear();
|
intersil_clear();
|
||||||
#endif
|
#endif
|
||||||
xtime_update(1);
|
legacy_timer_tick(1);
|
||||||
update_process_times(user_mode(get_irq_regs()));
|
|
||||||
cnt = kstat_irqs_cpu(irq, 0);
|
cnt = kstat_irqs_cpu(irq, 0);
|
||||||
if (!(cnt % 20))
|
if (!(cnt % 20))
|
||||||
sun3_leds(led_pattern[cnt % 160 / 20]);
|
sun3_leds(led_pattern[cnt % 160 / 20]);
|
||||||
|
|||||||
@ -77,21 +77,20 @@ int sun3x_hwclk(int set, struct rtc_time *t)
|
|||||||
#if 0
|
#if 0
|
||||||
static irqreturn_t sun3x_timer_tick(int irq, void *dev_id)
|
static irqreturn_t sun3x_timer_tick(int irq, void *dev_id)
|
||||||
{
|
{
|
||||||
irq_handler_t timer_routine = dev_id;
|
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
local_irq_save(flags);
|
local_irq_save(flags);
|
||||||
/* Clear the pending interrupt - pulse the enable line low */
|
/* Clear the pending interrupt - pulse the enable line low */
|
||||||
disable_irq(5);
|
disable_irq(5);
|
||||||
enable_irq(5);
|
enable_irq(5);
|
||||||
timer_routine(0, NULL);
|
legacy_timer_tick(1);
|
||||||
local_irq_restore(flags);
|
local_irq_restore(flags);
|
||||||
|
|
||||||
return IRQ_HANDLED;
|
return IRQ_HANDLED;
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
void __init sun3x_sched_init(irq_handler_t vector)
|
void __init sun3x_sched_init(void)
|
||||||
{
|
{
|
||||||
|
|
||||||
sun3_disable_interrupts();
|
sun3_disable_interrupts();
|
||||||
|
|||||||
@ -3,7 +3,7 @@
|
|||||||
#define SUN3X_TIME_H
|
#define SUN3X_TIME_H
|
||||||
|
|
||||||
extern int sun3x_hwclk(int set, struct rtc_time *t);
|
extern int sun3x_hwclk(int set, struct rtc_time *t);
|
||||||
void sun3x_sched_init(irq_handler_t vector);
|
void sun3x_sched_init(void);
|
||||||
|
|
||||||
struct mostek_dt {
|
struct mostek_dt {
|
||||||
volatile unsigned char csr;
|
volatile unsigned char csr;
|
||||||
|
|||||||
@ -17,7 +17,6 @@ config MICROBLAZE
|
|||||||
select COMMON_CLK
|
select COMMON_CLK
|
||||||
select DMA_DIRECT_REMAP if MMU
|
select DMA_DIRECT_REMAP if MMU
|
||||||
select GENERIC_ATOMIC64
|
select GENERIC_ATOMIC64
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CPU_DEVICES
|
select GENERIC_CPU_DEVICES
|
||||||
select GENERIC_IDLE_POLL_SETUP
|
select GENERIC_IDLE_POLL_SETUP
|
||||||
select GENERIC_IRQ_PROBE
|
select GENERIC_IRQ_PROBE
|
||||||
|
|||||||
@ -21,7 +21,6 @@ config MIPS
|
|||||||
select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
|
select CPU_NO_EFFICIENT_FFS if (TARGET_ISA_REV < 1)
|
||||||
select CPU_PM if CPU_IDLE
|
select CPU_PM if CPU_IDLE
|
||||||
select GENERIC_ATOMIC64 if !64BIT
|
select GENERIC_ATOMIC64 if !64BIT
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CMOS_UPDATE
|
select GENERIC_CMOS_UPDATE
|
||||||
select GENERIC_CPU_AUTOPROBE
|
select GENERIC_CPU_AUTOPROBE
|
||||||
select GENERIC_GETTIMEOFDAY
|
select GENERIC_GETTIMEOFDAY
|
||||||
|
|||||||
@ -17,7 +17,6 @@ config NDS32
|
|||||||
select DMA_DIRECT_REMAP
|
select DMA_DIRECT_REMAP
|
||||||
select GENERIC_ATOMIC64
|
select GENERIC_ATOMIC64
|
||||||
select GENERIC_CPU_DEVICES
|
select GENERIC_CPU_DEVICES
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_IRQ_CHIP
|
select GENERIC_IRQ_CHIP
|
||||||
select GENERIC_IRQ_SHOW
|
select GENERIC_IRQ_SHOW
|
||||||
select GENERIC_IOREMAP
|
select GENERIC_IOREMAP
|
||||||
|
|||||||
@ -10,7 +10,6 @@ config NIOS2
|
|||||||
select COMMON_CLK
|
select COMMON_CLK
|
||||||
select TIMER_OF
|
select TIMER_OF
|
||||||
select GENERIC_ATOMIC64
|
select GENERIC_ATOMIC64
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CPU_DEVICES
|
select GENERIC_CPU_DEVICES
|
||||||
select GENERIC_IRQ_PROBE
|
select GENERIC_IRQ_PROBE
|
||||||
select GENERIC_IRQ_SHOW
|
select GENERIC_IRQ_SHOW
|
||||||
|
|||||||
@ -24,7 +24,6 @@ config OPENRISC
|
|||||||
select GENERIC_CPU_DEVICES
|
select GENERIC_CPU_DEVICES
|
||||||
select HAVE_UID16
|
select HAVE_UID16
|
||||||
select GENERIC_ATOMIC64
|
select GENERIC_ATOMIC64
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CLOCKEVENTS_BROADCAST
|
select GENERIC_CLOCKEVENTS_BROADCAST
|
||||||
select GENERIC_STRNCPY_FROM_USER
|
select GENERIC_STRNCPY_FROM_USER
|
||||||
select GENERIC_STRNLEN_USER
|
select GENERIC_STRNLEN_USER
|
||||||
|
|||||||
@ -52,7 +52,7 @@ config PARISC
|
|||||||
select HAVE_REGS_AND_STACK_ACCESS_API
|
select HAVE_REGS_AND_STACK_ACCESS_API
|
||||||
select GENERIC_SCHED_CLOCK
|
select GENERIC_SCHED_CLOCK
|
||||||
select HAVE_UNSTABLE_SCHED_CLOCK if SMP
|
select HAVE_UNSTABLE_SCHED_CLOCK if SMP
|
||||||
select GENERIC_CLOCKEVENTS
|
select LEGACY_TIMER_TICK
|
||||||
select CPU_NO_EFFICIENT_FFS
|
select CPU_NO_EFFICIENT_FFS
|
||||||
select NEED_DMA_MAP_STATE
|
select NEED_DMA_MAP_STATE
|
||||||
select NEED_SG_DMA_LENGTH
|
select NEED_SG_DMA_LENGTH
|
||||||
|
|||||||
@ -70,8 +70,6 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
|
|||||||
/* gcc can optimize for "read-only" case with a local clocktick */
|
/* gcc can optimize for "read-only" case with a local clocktick */
|
||||||
unsigned long cpt = clocktick;
|
unsigned long cpt = clocktick;
|
||||||
|
|
||||||
profile_tick(CPU_PROFILING);
|
|
||||||
|
|
||||||
/* Initialize next_tick to the old expected tick time. */
|
/* Initialize next_tick to the old expected tick time. */
|
||||||
next_tick = cpuinfo->it_value;
|
next_tick = cpuinfo->it_value;
|
||||||
|
|
||||||
@ -86,10 +84,9 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id)
|
|||||||
cpuinfo->it_value = next_tick;
|
cpuinfo->it_value = next_tick;
|
||||||
|
|
||||||
/* Go do system house keeping. */
|
/* Go do system house keeping. */
|
||||||
if (cpu == 0)
|
if (cpu != 0)
|
||||||
xtime_update(ticks_elapsed);
|
ticks_elapsed = 0;
|
||||||
|
legacy_timer_tick(ticks_elapsed);
|
||||||
update_process_times(user_mode(get_irq_regs()));
|
|
||||||
|
|
||||||
/* Skip clockticks on purpose if we know we would miss those.
|
/* Skip clockticks on purpose if we know we would miss those.
|
||||||
* The new CR16 must be "later" than current CR16 otherwise
|
* The new CR16 must be "later" than current CR16 otherwise
|
||||||
|
|||||||
@ -165,7 +165,6 @@ config PPC
|
|||||||
select EDAC_ATOMIC_SCRUB
|
select EDAC_ATOMIC_SCRUB
|
||||||
select EDAC_SUPPORT
|
select EDAC_SUPPORT
|
||||||
select GENERIC_ATOMIC64 if PPC32
|
select GENERIC_ATOMIC64 if PPC32
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
|
select GENERIC_CLOCKEVENTS_BROADCAST if SMP
|
||||||
select GENERIC_CMOS_UPDATE
|
select GENERIC_CMOS_UPDATE
|
||||||
select GENERIC_CPU_AUTOPROBE
|
select GENERIC_CPU_AUTOPROBE
|
||||||
|
|||||||
@ -38,7 +38,6 @@ config RISCV
|
|||||||
select EDAC_SUPPORT
|
select EDAC_SUPPORT
|
||||||
select GENERIC_ARCH_TOPOLOGY if SMP
|
select GENERIC_ARCH_TOPOLOGY if SMP
|
||||||
select GENERIC_ATOMIC64 if !64BIT
|
select GENERIC_ATOMIC64 if !64BIT
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_EARLY_IOREMAP
|
select GENERIC_EARLY_IOREMAP
|
||||||
select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
|
select GENERIC_GETTIMEOFDAY if HAVE_GENERIC_VDSO
|
||||||
select GENERIC_IOREMAP
|
select GENERIC_IOREMAP
|
||||||
|
|||||||
@ -113,7 +113,6 @@ config S390
|
|||||||
select CLONE_BACKWARDS2
|
select CLONE_BACKWARDS2
|
||||||
select DMA_OPS if PCI
|
select DMA_OPS if PCI
|
||||||
select DYNAMIC_FTRACE if FUNCTION_TRACER
|
select DYNAMIC_FTRACE if FUNCTION_TRACER
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CPU_AUTOPROBE
|
select GENERIC_CPU_AUTOPROBE
|
||||||
select GENERIC_CPU_VULNERABILITIES
|
select GENERIC_CPU_VULNERABILITIES
|
||||||
select GENERIC_FIND_FIRST_BIT
|
select GENERIC_FIND_FIRST_BIT
|
||||||
|
|||||||
@ -16,7 +16,6 @@ config SUPERH
|
|||||||
select CPU_NO_EFFICIENT_FFS
|
select CPU_NO_EFFICIENT_FFS
|
||||||
select DMA_DECLARE_COHERENT
|
select DMA_DECLARE_COHERENT
|
||||||
select GENERIC_ATOMIC64
|
select GENERIC_ATOMIC64
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
|
select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
|
||||||
select GENERIC_IDLE_POLL_SETUP
|
select GENERIC_IDLE_POLL_SETUP
|
||||||
select GENERIC_IRQ_SHOW
|
select GENERIC_IRQ_SHOW
|
||||||
|
|||||||
@ -39,7 +39,6 @@ config SPARC
|
|||||||
select HAVE_EBPF_JIT if SPARC64
|
select HAVE_EBPF_JIT if SPARC64
|
||||||
select HAVE_DEBUG_BUGVERBOSE
|
select HAVE_DEBUG_BUGVERBOSE
|
||||||
select GENERIC_SMP_IDLE_THREAD
|
select GENERIC_SMP_IDLE_THREAD
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_STRNCPY_FROM_USER
|
select GENERIC_STRNCPY_FROM_USER
|
||||||
select GENERIC_STRNLEN_USER
|
select GENERIC_STRNLEN_USER
|
||||||
select MODULES_USE_ELF_RELA
|
select MODULES_USE_ELF_RELA
|
||||||
|
|||||||
@ -17,7 +17,6 @@ config UML
|
|||||||
select NO_DMA
|
select NO_DMA
|
||||||
select GENERIC_IRQ_SHOW
|
select GENERIC_IRQ_SHOW
|
||||||
select GENERIC_CPU_DEVICES
|
select GENERIC_CPU_DEVICES
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select HAVE_GCC_PLUGINS
|
select HAVE_GCC_PLUGINS
|
||||||
select SET_FS
|
select SET_FS
|
||||||
select TTY # Needed for line.c
|
select TTY # Needed for line.c
|
||||||
|
|||||||
@ -112,7 +112,6 @@ config X86
|
|||||||
select DCACHE_WORD_ACCESS
|
select DCACHE_WORD_ACCESS
|
||||||
select EDAC_ATOMIC_SCRUB
|
select EDAC_ATOMIC_SCRUB
|
||||||
select EDAC_SUPPORT
|
select EDAC_SUPPORT
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC)
|
select GENERIC_CLOCKEVENTS_BROADCAST if X86_64 || (X86_32 && X86_LOCAL_APIC)
|
||||||
select GENERIC_CLOCKEVENTS_MIN_ADJUST
|
select GENERIC_CLOCKEVENTS_MIN_ADJUST
|
||||||
select GENERIC_CMOS_UPDATE
|
select GENERIC_CMOS_UPDATE
|
||||||
|
|||||||
@ -16,7 +16,6 @@ config XTENSA
|
|||||||
select COMMON_CLK
|
select COMMON_CLK
|
||||||
select DMA_REMAP if MMU
|
select DMA_REMAP if MMU
|
||||||
select GENERIC_ATOMIC64
|
select GENERIC_ATOMIC64
|
||||||
select GENERIC_CLOCKEVENTS
|
|
||||||
select GENERIC_IRQ_SHOW
|
select GENERIC_IRQ_SHOW
|
||||||
select GENERIC_PCI_IOMAP
|
select GENERIC_PCI_IOMAP
|
||||||
select GENERIC_SCHED_CLOCK
|
select GENERIC_SCHED_CLOCK
|
||||||
|
|||||||
@ -135,9 +135,7 @@ obj-$(CONFIG_INFINIBAND) += infiniband/
|
|||||||
obj-y += firmware/
|
obj-y += firmware/
|
||||||
obj-$(CONFIG_CRYPTO) += crypto/
|
obj-$(CONFIG_CRYPTO) += crypto/
|
||||||
obj-$(CONFIG_SUPERH) += sh/
|
obj-$(CONFIG_SUPERH) += sh/
|
||||||
ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
|
|
||||||
obj-y += clocksource/
|
obj-y += clocksource/
|
||||||
endif
|
|
||||||
obj-$(CONFIG_DCA) += dca/
|
obj-$(CONFIG_DCA) += dca/
|
||||||
obj-$(CONFIG_HID) += hid/
|
obj-$(CONFIG_HID) += hid/
|
||||||
obj-$(CONFIG_PPC_PS3) += ps3/
|
obj-$(CONFIG_PPC_PS3) += ps3/
|
||||||
|
|||||||
@ -553,7 +553,7 @@ config CLKSRC_QCOM
|
|||||||
|
|
||||||
config CLKSRC_VERSATILE
|
config CLKSRC_VERSATILE
|
||||||
bool "ARM Versatile (Express) reference platforms clock source" if COMPILE_TEST
|
bool "ARM Versatile (Express) reference platforms clock source" if COMPILE_TEST
|
||||||
depends on GENERIC_SCHED_CLOCK && !ARCH_USES_GETTIMEOFFSET
|
depends on GENERIC_SCHED_CLOCK
|
||||||
select TIMER_OF
|
select TIMER_OF
|
||||||
default y if (ARCH_VEXPRESS || ARCH_VERSATILE) && ARM
|
default y if (ARCH_VEXPRESS || ARCH_VERSATILE) && ARM
|
||||||
help
|
help
|
||||||
|
|||||||
@ -8,7 +8,7 @@ config NET_VENDOR_AMD
|
|||||||
default y
|
default y
|
||||||
depends on DIO || MACH_DECSTATION || MVME147 || ATARI || SUN3 || \
|
depends on DIO || MACH_DECSTATION || MVME147 || ATARI || SUN3 || \
|
||||||
SUN3X || SBUS || PCI || ZORRO || (ISA && ISA_DMA_API) || \
|
SUN3X || SBUS || PCI || ZORRO || (ISA && ISA_DMA_API) || \
|
||||||
(ARM && ARCH_EBSA110) || ISA || EISA || PCMCIA || ARM64
|
ISA || EISA || PCMCIA || ARM64
|
||||||
help
|
help
|
||||||
If you have a network (Ethernet) chipset belonging to this class,
|
If you have a network (Ethernet) chipset belonging to this class,
|
||||||
say Y.
|
say Y.
|
||||||
@ -75,14 +75,6 @@ config ARIADNE
|
|||||||
To compile this driver as a module, choose M here: the module
|
To compile this driver as a module, choose M here: the module
|
||||||
will be called ariadne.
|
will be called ariadne.
|
||||||
|
|
||||||
config ARM_AM79C961A
|
|
||||||
bool "ARM EBSA110 AM79C961A support"
|
|
||||||
depends on ARM && ARCH_EBSA110
|
|
||||||
select CRC32
|
|
||||||
help
|
|
||||||
If you wish to compile a kernel for the EBSA-110, then you should
|
|
||||||
always answer Y to this.
|
|
||||||
|
|
||||||
config ATARILANCE
|
config ATARILANCE
|
||||||
tristate "Atari LANCE support"
|
tristate "Atari LANCE support"
|
||||||
depends on ATARI
|
depends on ATARI
|
||||||
|
|||||||
@ -5,7 +5,6 @@
|
|||||||
|
|
||||||
obj-$(CONFIG_A2065) += a2065.o
|
obj-$(CONFIG_A2065) += a2065.o
|
||||||
obj-$(CONFIG_AMD8111_ETH) += amd8111e.o
|
obj-$(CONFIG_AMD8111_ETH) += amd8111e.o
|
||||||
obj-$(CONFIG_ARM_AM79C961A) += am79c961a.o
|
|
||||||
obj-$(CONFIG_ARIADNE) += ariadne.o
|
obj-$(CONFIG_ARIADNE) += ariadne.o
|
||||||
obj-$(CONFIG_ATARILANCE) += atarilance.o
|
obj-$(CONFIG_ATARILANCE) += atarilance.o
|
||||||
obj-$(CONFIG_DECLANCE) += declance.o
|
obj-$(CONFIG_DECLANCE) += declance.o
|
||||||
|
|||||||
@ -1,763 +0,0 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0-only
|
|
||||||
/*
|
|
||||||
* linux/drivers/net/ethernet/amd/am79c961a.c
|
|
||||||
*
|
|
||||||
* by Russell King <rmk@arm.linux.org.uk> 1995-2001.
|
|
||||||
*
|
|
||||||
* Derived from various things including skeleton.c
|
|
||||||
*
|
|
||||||
* This is a special driver for the am79c961A Lance chip used in the
|
|
||||||
* Intel (formally Digital Equipment Corp) EBSA110 platform. Please
|
|
||||||
* note that this can not be built as a module (it doesn't make sense).
|
|
||||||
*/
|
|
||||||
#include <linux/kernel.h>
|
|
||||||
#include <linux/types.h>
|
|
||||||
#include <linux/interrupt.h>
|
|
||||||
#include <linux/ioport.h>
|
|
||||||
#include <linux/slab.h>
|
|
||||||
#include <linux/string.h>
|
|
||||||
#include <linux/errno.h>
|
|
||||||
#include <linux/netdevice.h>
|
|
||||||
#include <linux/etherdevice.h>
|
|
||||||
#include <linux/delay.h>
|
|
||||||
#include <linux/init.h>
|
|
||||||
#include <linux/crc32.h>
|
|
||||||
#include <linux/bitops.h>
|
|
||||||
#include <linux/platform_device.h>
|
|
||||||
#include <linux/io.h>
|
|
||||||
|
|
||||||
#include <mach/hardware.h>
|
|
||||||
|
|
||||||
#define TX_BUFFERS 15
|
|
||||||
#define RX_BUFFERS 25
|
|
||||||
|
|
||||||
#include "am79c961a.h"
|
|
||||||
|
|
||||||
static irqreturn_t
|
|
||||||
am79c961_interrupt (int irq, void *dev_id);
|
|
||||||
|
|
||||||
static unsigned int net_debug = NET_DEBUG;
|
|
||||||
|
|
||||||
static const char version[] =
|
|
||||||
"am79c961 ethernet driver (C) 1995-2001 Russell King v0.04\n";
|
|
||||||
|
|
||||||
/* --------------------------------------------------------------------------- */
|
|
||||||
|
|
||||||
#ifdef __arm__
|
|
||||||
static void write_rreg(u_long base, u_int reg, u_int val)
|
|
||||||
{
|
|
||||||
asm volatile(
|
|
||||||
"strh %1, [%2] @ NET_RAP\n\t"
|
|
||||||
"strh %0, [%2, #-4] @ NET_RDP"
|
|
||||||
:
|
|
||||||
: "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline unsigned short read_rreg(u_long base_addr, u_int reg)
|
|
||||||
{
|
|
||||||
unsigned short v;
|
|
||||||
asm volatile(
|
|
||||||
"strh %1, [%2] @ NET_RAP\n\t"
|
|
||||||
"ldrh %0, [%2, #-4] @ NET_RDP"
|
|
||||||
: "=r" (v)
|
|
||||||
: "r" (reg), "r" (ISAIO_BASE + 0x0464));
|
|
||||||
return v;
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline void write_ireg(u_long base, u_int reg, u_int val)
|
|
||||||
{
|
|
||||||
asm volatile(
|
|
||||||
"strh %1, [%2] @ NET_RAP\n\t"
|
|
||||||
"strh %0, [%2, #8] @ NET_IDP"
|
|
||||||
:
|
|
||||||
: "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
|
|
||||||
}
|
|
||||||
|
|
||||||
static inline unsigned short read_ireg(u_long base_addr, u_int reg)
|
|
||||||
{
|
|
||||||
u_short v;
|
|
||||||
asm volatile(
|
|
||||||
"strh %1, [%2] @ NAT_RAP\n\t"
|
|
||||||
"ldrh %0, [%2, #8] @ NET_IDP\n\t"
|
|
||||||
: "=r" (v)
|
|
||||||
: "r" (reg), "r" (ISAIO_BASE + 0x0464));
|
|
||||||
return v;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define am_writeword(dev,off,val) __raw_writew(val, ISAMEM_BASE + ((off) << 1))
|
|
||||||
#define am_readword(dev,off) __raw_readw(ISAMEM_BASE + ((off) << 1))
|
|
||||||
|
|
||||||
static void
|
|
||||||
am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
|
|
||||||
{
|
|
||||||
offset = ISAMEM_BASE + (offset << 1);
|
|
||||||
length = (length + 1) & ~1;
|
|
||||||
if ((int)buf & 2) {
|
|
||||||
asm volatile("strh %2, [%0], #4"
|
|
||||||
: "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
|
|
||||||
buf += 2;
|
|
||||||
length -= 2;
|
|
||||||
}
|
|
||||||
while (length > 8) {
|
|
||||||
register unsigned int tmp asm("r2"), tmp2 asm("r3");
|
|
||||||
asm volatile(
|
|
||||||
"ldmia %0!, {%1, %2}"
|
|
||||||
: "+r" (buf), "=&r" (tmp), "=&r" (tmp2));
|
|
||||||
length -= 8;
|
|
||||||
asm volatile(
|
|
||||||
"strh %1, [%0], #4\n\t"
|
|
||||||
"mov %1, %1, lsr #16\n\t"
|
|
||||||
"strh %1, [%0], #4\n\t"
|
|
||||||
"strh %2, [%0], #4\n\t"
|
|
||||||
"mov %2, %2, lsr #16\n\t"
|
|
||||||
"strh %2, [%0], #4"
|
|
||||||
: "+r" (offset), "=&r" (tmp), "=&r" (tmp2));
|
|
||||||
}
|
|
||||||
while (length > 0) {
|
|
||||||
asm volatile("strh %2, [%0], #4"
|
|
||||||
: "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
|
|
||||||
buf += 2;
|
|
||||||
length -= 2;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
static void
|
|
||||||
am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned int length)
|
|
||||||
{
|
|
||||||
offset = ISAMEM_BASE + (offset << 1);
|
|
||||||
length = (length + 1) & ~1;
|
|
||||||
if ((int)buf & 2) {
|
|
||||||
unsigned int tmp;
|
|
||||||
asm volatile(
|
|
||||||
"ldrh %2, [%0], #4\n\t"
|
|
||||||
"strb %2, [%1], #1\n\t"
|
|
||||||
"mov %2, %2, lsr #8\n\t"
|
|
||||||
"strb %2, [%1], #1"
|
|
||||||
: "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf));
|
|
||||||
length -= 2;
|
|
||||||
}
|
|
||||||
while (length > 8) {
|
|
||||||
register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3;
|
|
||||||
asm volatile(
|
|
||||||
"ldrh %2, [%0], #4\n\t"
|
|
||||||
"ldrh %4, [%0], #4\n\t"
|
|
||||||
"ldrh %3, [%0], #4\n\t"
|
|
||||||
"orr %2, %2, %4, lsl #16\n\t"
|
|
||||||
"ldrh %4, [%0], #4\n\t"
|
|
||||||
"orr %3, %3, %4, lsl #16\n\t"
|
|
||||||
"stmia %1!, {%2, %3}"
|
|
||||||
: "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3)
|
|
||||||
: "0" (offset), "1" (buf));
|
|
||||||
length -= 8;
|
|
||||||
}
|
|
||||||
while (length > 0) {
|
|
||||||
unsigned int tmp;
|
|
||||||
asm volatile(
|
|
||||||
"ldrh %2, [%0], #4\n\t"
|
|
||||||
"strb %2, [%1], #1\n\t"
|
|
||||||
"mov %2, %2, lsr #8\n\t"
|
|
||||||
"strb %2, [%1], #1"
|
|
||||||
: "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf));
|
|
||||||
length -= 2;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
#else
|
|
||||||
#error Not compatible
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static int
|
|
||||||
am79c961_ramtest(struct net_device *dev, unsigned int val)
|
|
||||||
{
|
|
||||||
unsigned char *buffer = kmalloc (65536, GFP_KERNEL);
|
|
||||||
int i, error = 0, errorcount = 0;
|
|
||||||
|
|
||||||
if (!buffer)
|
|
||||||
return 0;
|
|
||||||
memset (buffer, val, 65536);
|
|
||||||
am_writebuffer(dev, 0, buffer, 65536);
|
|
||||||
memset (buffer, val ^ 255, 65536);
|
|
||||||
am_readbuffer(dev, 0, buffer, 65536);
|
|
||||||
for (i = 0; i < 65536; i++) {
|
|
||||||
if (buffer[i] != val && !error) {
|
|
||||||
printk ("%s: buffer error (%02X %02X) %05X - ", dev->name, val, buffer[i], i);
|
|
||||||
error = 1;
|
|
||||||
errorcount ++;
|
|
||||||
} else if (error && buffer[i] == val) {
|
|
||||||
printk ("%05X\n", i);
|
|
||||||
error = 0;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
if (error)
|
|
||||||
printk ("10000\n");
|
|
||||||
kfree (buffer);
|
|
||||||
return errorcount;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void am79c961_mc_hash(char *addr, u16 *hash)
|
|
||||||
{
|
|
||||||
int idx, bit;
|
|
||||||
u32 crc;
|
|
||||||
|
|
||||||
crc = ether_crc_le(ETH_ALEN, addr);
|
|
||||||
|
|
||||||
idx = crc >> 30;
|
|
||||||
bit = (crc >> 26) & 15;
|
|
||||||
|
|
||||||
hash[idx] |= 1 << bit;
|
|
||||||
}
|
|
||||||
|
|
||||||
static unsigned int am79c961_get_rx_mode(struct net_device *dev, u16 *hash)
|
|
||||||
{
|
|
||||||
unsigned int mode = MODE_PORT_10BT;
|
|
||||||
|
|
||||||
if (dev->flags & IFF_PROMISC) {
|
|
||||||
mode |= MODE_PROMISC;
|
|
||||||
memset(hash, 0xff, 4 * sizeof(*hash));
|
|
||||||
} else if (dev->flags & IFF_ALLMULTI) {
|
|
||||||
memset(hash, 0xff, 4 * sizeof(*hash));
|
|
||||||
} else {
|
|
||||||
struct netdev_hw_addr *ha;
|
|
||||||
|
|
||||||
memset(hash, 0, 4 * sizeof(*hash));
|
|
||||||
|
|
||||||
netdev_for_each_mc_addr(ha, dev)
|
|
||||||
am79c961_mc_hash(ha->addr, hash);
|
|
||||||
}
|
|
||||||
|
|
||||||
return mode;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void
|
|
||||||
am79c961_init_for_open(struct net_device *dev)
|
|
||||||
{
|
|
||||||
struct dev_priv *priv = netdev_priv(dev);
|
|
||||||
unsigned long flags;
|
|
||||||
unsigned char *p;
|
|
||||||
u_int hdr_addr, first_free_addr;
|
|
||||||
u16 multi_hash[4], mode = am79c961_get_rx_mode(dev, multi_hash);
|
|
||||||
int i;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Stop the chip.
|
|
||||||
*/
|
|
||||||
spin_lock_irqsave(&priv->chip_lock, flags);
|
|
||||||
write_rreg (dev->base_addr, CSR0, CSR0_BABL|CSR0_CERR|CSR0_MISS|CSR0_MERR|CSR0_TINT|CSR0_RINT|CSR0_STOP);
|
|
||||||
spin_unlock_irqrestore(&priv->chip_lock, flags);
|
|
||||||
|
|
||||||
write_ireg (dev->base_addr, 5, 0x00a0); /* Receive address LED */
|
|
||||||
write_ireg (dev->base_addr, 6, 0x0081); /* Collision LED */
|
|
||||||
write_ireg (dev->base_addr, 7, 0x0090); /* XMIT LED */
|
|
||||||
write_ireg (dev->base_addr, 2, 0x0000); /* MODE register selects media */
|
|
||||||
|
|
||||||
for (i = LADRL; i <= LADRH; i++)
|
|
||||||
write_rreg (dev->base_addr, i, multi_hash[i - LADRL]);
|
|
||||||
|
|
||||||
for (i = PADRL, p = dev->dev_addr; i <= PADRH; i++, p += 2)
|
|
||||||
write_rreg (dev->base_addr, i, p[0] | (p[1] << 8));
|
|
||||||
|
|
||||||
write_rreg (dev->base_addr, MODE, mode);
|
|
||||||
write_rreg (dev->base_addr, POLLINT, 0);
|
|
||||||
write_rreg (dev->base_addr, SIZERXR, -RX_BUFFERS);
|
|
||||||
write_rreg (dev->base_addr, SIZETXR, -TX_BUFFERS);
|
|
||||||
|
|
||||||
first_free_addr = RX_BUFFERS * 8 + TX_BUFFERS * 8 + 16;
|
|
||||||
hdr_addr = 0;
|
|
||||||
|
|
||||||
priv->rxhead = 0;
|
|
||||||
priv->rxtail = 0;
|
|
||||||
priv->rxhdr = hdr_addr;
|
|
||||||
|
|
||||||
for (i = 0; i < RX_BUFFERS; i++) {
|
|
||||||
priv->rxbuffer[i] = first_free_addr;
|
|
||||||
am_writeword (dev, hdr_addr, first_free_addr);
|
|
||||||
am_writeword (dev, hdr_addr + 2, RMD_OWN);
|
|
||||||
am_writeword (dev, hdr_addr + 4, (-1600));
|
|
||||||
am_writeword (dev, hdr_addr + 6, 0);
|
|
||||||
first_free_addr += 1600;
|
|
||||||
hdr_addr += 8;
|
|
||||||
}
|
|
||||||
priv->txhead = 0;
|
|
||||||
priv->txtail = 0;
|
|
||||||
priv->txhdr = hdr_addr;
|
|
||||||
for (i = 0; i < TX_BUFFERS; i++) {
|
|
||||||
priv->txbuffer[i] = first_free_addr;
|
|
||||||
am_writeword (dev, hdr_addr, first_free_addr);
|
|
||||||
am_writeword (dev, hdr_addr + 2, TMD_STP|TMD_ENP);
|
|
||||||
am_writeword (dev, hdr_addr + 4, 0xf000);
|
|
||||||
am_writeword (dev, hdr_addr + 6, 0);
|
|
||||||
first_free_addr += 1600;
|
|
||||||
hdr_addr += 8;
|
|
||||||
}
|
|
||||||
|
|
||||||
write_rreg (dev->base_addr, BASERXL, priv->rxhdr);
|
|
||||||
write_rreg (dev->base_addr, BASERXH, 0);
|
|
||||||
write_rreg (dev->base_addr, BASETXL, priv->txhdr);
|
|
||||||
write_rreg (dev->base_addr, BASERXH, 0);
|
|
||||||
write_rreg (dev->base_addr, CSR0, CSR0_STOP);
|
|
||||||
write_rreg (dev->base_addr, CSR3, CSR3_IDONM|CSR3_BABLM|CSR3_DXSUFLO);
|
|
||||||
write_rreg (dev->base_addr, CSR4, CSR4_APAD_XMIT|CSR4_MFCOM|CSR4_RCVCCOM|CSR4_TXSTRTM|CSR4_JABM);
|
|
||||||
write_rreg (dev->base_addr, CSR0, CSR0_IENA|CSR0_STRT);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void am79c961_timer(struct timer_list *t)
|
|
||||||
{
|
|
||||||
struct dev_priv *priv = from_timer(priv, t, timer);
|
|
||||||
struct net_device *dev = priv->dev;
|
|
||||||
unsigned int lnkstat, carrier;
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
spin_lock_irqsave(&priv->chip_lock, flags);
|
|
||||||
lnkstat = read_ireg(dev->base_addr, ISALED0) & ISALED0_LNKST;
|
|
||||||
spin_unlock_irqrestore(&priv->chip_lock, flags);
|
|
||||||
carrier = netif_carrier_ok(dev);
|
|
||||||
|
|
||||||
if (lnkstat && !carrier) {
|
|
||||||
netif_carrier_on(dev);
|
|
||||||
printk("%s: link up\n", dev->name);
|
|
||||||
} else if (!lnkstat && carrier) {
|
|
||||||
netif_carrier_off(dev);
|
|
||||||
printk("%s: link down\n", dev->name);
|
|
||||||
}
|
|
||||||
|
|
||||||
mod_timer(&priv->timer, jiffies + msecs_to_jiffies(500));
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Open/initialize the board.
|
|
||||||
*/
|
|
||||||
static int
|
|
||||||
am79c961_open(struct net_device *dev)
|
|
||||||
{
|
|
||||||
struct dev_priv *priv = netdev_priv(dev);
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = request_irq(dev->irq, am79c961_interrupt, 0, dev->name, dev);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
am79c961_init_for_open(dev);
|
|
||||||
|
|
||||||
netif_carrier_off(dev);
|
|
||||||
|
|
||||||
priv->timer.expires = jiffies;
|
|
||||||
add_timer(&priv->timer);
|
|
||||||
|
|
||||||
netif_start_queue(dev);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* The inverse routine to am79c961_open().
|
|
||||||
*/
|
|
||||||
static int
|
|
||||||
am79c961_close(struct net_device *dev)
|
|
||||||
{
|
|
||||||
struct dev_priv *priv = netdev_priv(dev);
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
del_timer_sync(&priv->timer);
|
|
||||||
|
|
||||||
netif_stop_queue(dev);
|
|
||||||
netif_carrier_off(dev);
|
|
||||||
|
|
||||||
spin_lock_irqsave(&priv->chip_lock, flags);
|
|
||||||
write_rreg (dev->base_addr, CSR0, CSR0_STOP);
|
|
||||||
write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
|
|
||||||
spin_unlock_irqrestore(&priv->chip_lock, flags);
|
|
||||||
|
|
||||||
free_irq (dev->irq, dev);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Set or clear promiscuous/multicast mode filter for this adapter.
|
|
||||||
*/
|
|
||||||
static void am79c961_setmulticastlist (struct net_device *dev)
|
|
||||||
{
|
|
||||||
struct dev_priv *priv = netdev_priv(dev);
|
|
||||||
unsigned long flags;
|
|
||||||
u16 multi_hash[4], mode = am79c961_get_rx_mode(dev, multi_hash);
|
|
||||||
int i, stopped;
|
|
||||||
|
|
||||||
spin_lock_irqsave(&priv->chip_lock, flags);
|
|
||||||
|
|
||||||
stopped = read_rreg(dev->base_addr, CSR0) & CSR0_STOP;
|
|
||||||
|
|
||||||
if (!stopped) {
|
|
||||||
/*
|
|
||||||
* Put the chip into suspend mode
|
|
||||||
*/
|
|
||||||
write_rreg(dev->base_addr, CTRL1, CTRL1_SPND);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Spin waiting for chip to report suspend mode
|
|
||||||
*/
|
|
||||||
while ((read_rreg(dev->base_addr, CTRL1) & CTRL1_SPND) == 0) {
|
|
||||||
spin_unlock_irqrestore(&priv->chip_lock, flags);
|
|
||||||
nop();
|
|
||||||
spin_lock_irqsave(&priv->chip_lock, flags);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Update the multicast hash table
|
|
||||||
*/
|
|
||||||
for (i = 0; i < ARRAY_SIZE(multi_hash); i++)
|
|
||||||
write_rreg(dev->base_addr, i + LADRL, multi_hash[i]);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Write the mode register
|
|
||||||
*/
|
|
||||||
write_rreg(dev->base_addr, MODE, mode);
|
|
||||||
|
|
||||||
if (!stopped) {
|
|
||||||
/*
|
|
||||||
* Put the chip back into running mode
|
|
||||||
*/
|
|
||||||
write_rreg(dev->base_addr, CTRL1, 0);
|
|
||||||
}
|
|
||||||
|
|
||||||
spin_unlock_irqrestore(&priv->chip_lock, flags);
|
|
||||||
}
|
|
||||||
|
|
||||||
static void am79c961_timeout(struct net_device *dev, unsigned int txqueue)
|
|
||||||
{
|
|
||||||
printk(KERN_WARNING "%s: transmit timed out, network cable problem?\n",
|
|
||||||
dev->name);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* ought to do some setup of the tx side here
|
|
||||||
*/
|
|
||||||
|
|
||||||
netif_wake_queue(dev);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Transmit a packet
|
|
||||||
*/
|
|
||||||
static netdev_tx_t
|
|
||||||
am79c961_sendpacket(struct sk_buff *skb, struct net_device *dev)
|
|
||||||
{
|
|
||||||
struct dev_priv *priv = netdev_priv(dev);
|
|
||||||
unsigned int hdraddr, bufaddr;
|
|
||||||
unsigned int head;
|
|
||||||
unsigned long flags;
|
|
||||||
|
|
||||||
head = priv->txhead;
|
|
||||||
hdraddr = priv->txhdr + (head << 3);
|
|
||||||
bufaddr = priv->txbuffer[head];
|
|
||||||
head += 1;
|
|
||||||
if (head >= TX_BUFFERS)
|
|
||||||
head = 0;
|
|
||||||
|
|
||||||
am_writebuffer (dev, bufaddr, skb->data, skb->len);
|
|
||||||
am_writeword (dev, hdraddr + 4, -skb->len);
|
|
||||||
am_writeword (dev, hdraddr + 2, TMD_OWN|TMD_STP|TMD_ENP);
|
|
||||||
priv->txhead = head;
|
|
||||||
|
|
||||||
spin_lock_irqsave(&priv->chip_lock, flags);
|
|
||||||
write_rreg (dev->base_addr, CSR0, CSR0_TDMD|CSR0_IENA);
|
|
||||||
spin_unlock_irqrestore(&priv->chip_lock, flags);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* If the next packet is owned by the ethernet device,
|
|
||||||
* then the tx ring is full and we can't add another
|
|
||||||
* packet.
|
|
||||||
*/
|
|
||||||
if (am_readword(dev, priv->txhdr + (priv->txhead << 3) + 2) & TMD_OWN)
|
|
||||||
netif_stop_queue(dev);
|
|
||||||
|
|
||||||
dev_consume_skb_any(skb);
|
|
||||||
|
|
||||||
return NETDEV_TX_OK;
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* If we have a good packet(s), get it/them out of the buffers.
|
|
||||||
*/
|
|
||||||
static void
|
|
||||||
am79c961_rx(struct net_device *dev, struct dev_priv *priv)
|
|
||||||
{
|
|
||||||
do {
|
|
||||||
struct sk_buff *skb;
|
|
||||||
u_int hdraddr;
|
|
||||||
u_int pktaddr;
|
|
||||||
u_int status;
|
|
||||||
int len;
|
|
||||||
|
|
||||||
hdraddr = priv->rxhdr + (priv->rxtail << 3);
|
|
||||||
pktaddr = priv->rxbuffer[priv->rxtail];
|
|
||||||
|
|
||||||
status = am_readword (dev, hdraddr + 2);
|
|
||||||
if (status & RMD_OWN) /* do we own it? */
|
|
||||||
break;
|
|
||||||
|
|
||||||
priv->rxtail ++;
|
|
||||||
if (priv->rxtail >= RX_BUFFERS)
|
|
||||||
priv->rxtail = 0;
|
|
||||||
|
|
||||||
if ((status & (RMD_ERR|RMD_STP|RMD_ENP)) != (RMD_STP|RMD_ENP)) {
|
|
||||||
am_writeword (dev, hdraddr + 2, RMD_OWN);
|
|
||||||
dev->stats.rx_errors++;
|
|
||||||
if (status & RMD_ERR) {
|
|
||||||
if (status & RMD_FRAM)
|
|
||||||
dev->stats.rx_frame_errors++;
|
|
||||||
if (status & RMD_CRC)
|
|
||||||
dev->stats.rx_crc_errors++;
|
|
||||||
} else if (status & RMD_STP)
|
|
||||||
dev->stats.rx_length_errors++;
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
len = am_readword(dev, hdraddr + 6);
|
|
||||||
skb = netdev_alloc_skb(dev, len + 2);
|
|
||||||
|
|
||||||
if (skb) {
|
|
||||||
skb_reserve(skb, 2);
|
|
||||||
|
|
||||||
am_readbuffer(dev, pktaddr, skb_put(skb, len), len);
|
|
||||||
am_writeword(dev, hdraddr + 2, RMD_OWN);
|
|
||||||
skb->protocol = eth_type_trans(skb, dev);
|
|
||||||
netif_rx(skb);
|
|
||||||
dev->stats.rx_bytes += len;
|
|
||||||
dev->stats.rx_packets++;
|
|
||||||
} else {
|
|
||||||
am_writeword (dev, hdraddr + 2, RMD_OWN);
|
|
||||||
dev->stats.rx_dropped++;
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
} while (1);
|
|
||||||
}
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Update stats for the transmitted packet
|
|
||||||
*/
|
|
||||||
static void
|
|
||||||
am79c961_tx(struct net_device *dev, struct dev_priv *priv)
|
|
||||||
{
|
|
||||||
do {
|
|
||||||
short len;
|
|
||||||
u_int hdraddr;
|
|
||||||
u_int status;
|
|
||||||
|
|
||||||
hdraddr = priv->txhdr + (priv->txtail << 3);
|
|
||||||
status = am_readword (dev, hdraddr + 2);
|
|
||||||
if (status & TMD_OWN)
|
|
||||||
break;
|
|
||||||
|
|
||||||
priv->txtail ++;
|
|
||||||
if (priv->txtail >= TX_BUFFERS)
|
|
||||||
priv->txtail = 0;
|
|
||||||
|
|
||||||
if (status & TMD_ERR) {
|
|
||||||
u_int status2;
|
|
||||||
|
|
||||||
dev->stats.tx_errors++;
|
|
||||||
|
|
||||||
status2 = am_readword (dev, hdraddr + 6);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Clear the error byte
|
|
||||||
*/
|
|
||||||
am_writeword (dev, hdraddr + 6, 0);
|
|
||||||
|
|
||||||
if (status2 & TST_RTRY)
|
|
||||||
dev->stats.collisions += 16;
|
|
||||||
if (status2 & TST_LCOL)
|
|
||||||
dev->stats.tx_window_errors++;
|
|
||||||
if (status2 & TST_LCAR)
|
|
||||||
dev->stats.tx_carrier_errors++;
|
|
||||||
if (status2 & TST_UFLO)
|
|
||||||
dev->stats.tx_fifo_errors++;
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
dev->stats.tx_packets++;
|
|
||||||
len = am_readword (dev, hdraddr + 4);
|
|
||||||
dev->stats.tx_bytes += -len;
|
|
||||||
} while (priv->txtail != priv->txhead);
|
|
||||||
|
|
||||||
netif_wake_queue(dev);
|
|
||||||
}
|
|
||||||
|
|
||||||
static irqreturn_t
|
|
||||||
am79c961_interrupt(int irq, void *dev_id)
|
|
||||||
{
|
|
||||||
struct net_device *dev = (struct net_device *)dev_id;
|
|
||||||
struct dev_priv *priv = netdev_priv(dev);
|
|
||||||
u_int status, n = 100;
|
|
||||||
int handled = 0;
|
|
||||||
|
|
||||||
do {
|
|
||||||
status = read_rreg(dev->base_addr, CSR0);
|
|
||||||
write_rreg(dev->base_addr, CSR0, status &
|
|
||||||
(CSR0_IENA|CSR0_TINT|CSR0_RINT|
|
|
||||||
CSR0_MERR|CSR0_MISS|CSR0_CERR|CSR0_BABL));
|
|
||||||
|
|
||||||
if (status & CSR0_RINT) {
|
|
||||||
handled = 1;
|
|
||||||
am79c961_rx(dev, priv);
|
|
||||||
}
|
|
||||||
if (status & CSR0_TINT) {
|
|
||||||
handled = 1;
|
|
||||||
am79c961_tx(dev, priv);
|
|
||||||
}
|
|
||||||
if (status & CSR0_MISS) {
|
|
||||||
handled = 1;
|
|
||||||
dev->stats.rx_dropped++;
|
|
||||||
}
|
|
||||||
if (status & CSR0_CERR) {
|
|
||||||
handled = 1;
|
|
||||||
mod_timer(&priv->timer, jiffies);
|
|
||||||
}
|
|
||||||
} while (--n && status & (CSR0_RINT | CSR0_TINT));
|
|
||||||
|
|
||||||
return IRQ_RETVAL(handled);
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
||||||
static void am79c961_poll_controller(struct net_device *dev)
|
|
||||||
{
|
|
||||||
unsigned long flags;
|
|
||||||
local_irq_save(flags);
|
|
||||||
am79c961_interrupt(dev->irq, dev);
|
|
||||||
local_irq_restore(flags);
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Initialise the chip. Note that we always expect
|
|
||||||
* to be entered with interrupts enabled.
|
|
||||||
*/
|
|
||||||
static int
|
|
||||||
am79c961_hw_init(struct net_device *dev)
|
|
||||||
{
|
|
||||||
struct dev_priv *priv = netdev_priv(dev);
|
|
||||||
|
|
||||||
spin_lock_irq(&priv->chip_lock);
|
|
||||||
write_rreg (dev->base_addr, CSR0, CSR0_STOP);
|
|
||||||
write_rreg (dev->base_addr, CSR3, CSR3_MASKALL);
|
|
||||||
spin_unlock_irq(&priv->chip_lock);
|
|
||||||
|
|
||||||
am79c961_ramtest(dev, 0x66);
|
|
||||||
am79c961_ramtest(dev, 0x99);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static void __init am79c961_banner(void)
|
|
||||||
{
|
|
||||||
static unsigned version_printed;
|
|
||||||
|
|
||||||
if (net_debug && version_printed++ == 0)
|
|
||||||
printk(KERN_INFO "%s", version);
|
|
||||||
}
|
|
||||||
static const struct net_device_ops am79c961_netdev_ops = {
|
|
||||||
.ndo_open = am79c961_open,
|
|
||||||
.ndo_stop = am79c961_close,
|
|
||||||
.ndo_start_xmit = am79c961_sendpacket,
|
|
||||||
.ndo_set_rx_mode = am79c961_setmulticastlist,
|
|
||||||
.ndo_tx_timeout = am79c961_timeout,
|
|
||||||
.ndo_validate_addr = eth_validate_addr,
|
|
||||||
.ndo_set_mac_address = eth_mac_addr,
|
|
||||||
#ifdef CONFIG_NET_POLL_CONTROLLER
|
|
||||||
.ndo_poll_controller = am79c961_poll_controller,
|
|
||||||
#endif
|
|
||||||
};
|
|
||||||
|
|
||||||
static int am79c961_probe(struct platform_device *pdev)
|
|
||||||
{
|
|
||||||
struct resource *res;
|
|
||||||
struct net_device *dev;
|
|
||||||
struct dev_priv *priv;
|
|
||||||
int i, ret;
|
|
||||||
|
|
||||||
res = platform_get_resource(pdev, IORESOURCE_IO, 0);
|
|
||||||
if (!res)
|
|
||||||
return -ENODEV;
|
|
||||||
|
|
||||||
dev = alloc_etherdev(sizeof(struct dev_priv));
|
|
||||||
ret = -ENOMEM;
|
|
||||||
if (!dev)
|
|
||||||
goto out;
|
|
||||||
|
|
||||||
SET_NETDEV_DEV(dev, &pdev->dev);
|
|
||||||
|
|
||||||
priv = netdev_priv(dev);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Fixed address and IRQ lines here.
|
|
||||||
* The PNP initialisation should have been
|
|
||||||
* done by the ether bootp loader.
|
|
||||||
*/
|
|
||||||
dev->base_addr = res->start;
|
|
||||||
ret = platform_get_irq(pdev, 0);
|
|
||||||
|
|
||||||
if (ret < 0) {
|
|
||||||
ret = -ENODEV;
|
|
||||||
goto nodev;
|
|
||||||
}
|
|
||||||
dev->irq = ret;
|
|
||||||
|
|
||||||
ret = -ENODEV;
|
|
||||||
if (!request_region(dev->base_addr, 0x18, dev->name))
|
|
||||||
goto nodev;
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Reset the device.
|
|
||||||
*/
|
|
||||||
inb(dev->base_addr + NET_RESET);
|
|
||||||
udelay(5);
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Check the manufacturer part of the
|
|
||||||
* ether address.
|
|
||||||
*/
|
|
||||||
if (inb(dev->base_addr) != 0x08 ||
|
|
||||||
inb(dev->base_addr + 2) != 0x00 ||
|
|
||||||
inb(dev->base_addr + 4) != 0x2b)
|
|
||||||
goto release;
|
|
||||||
|
|
||||||
for (i = 0; i < 6; i++)
|
|
||||||
dev->dev_addr[i] = inb(dev->base_addr + i * 2) & 0xff;
|
|
||||||
|
|
||||||
am79c961_banner();
|
|
||||||
|
|
||||||
spin_lock_init(&priv->chip_lock);
|
|
||||||
priv->dev = dev;
|
|
||||||
timer_setup(&priv->timer, am79c961_timer, 0);
|
|
||||||
|
|
||||||
if (am79c961_hw_init(dev))
|
|
||||||
goto release;
|
|
||||||
|
|
||||||
dev->netdev_ops = &am79c961_netdev_ops;
|
|
||||||
|
|
||||||
ret = register_netdev(dev);
|
|
||||||
if (ret == 0) {
|
|
||||||
printk(KERN_INFO "%s: ether address %pM\n",
|
|
||||||
dev->name, dev->dev_addr);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
release:
|
|
||||||
release_region(dev->base_addr, 0x18);
|
|
||||||
nodev:
|
|
||||||
free_netdev(dev);
|
|
||||||
out:
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
static struct platform_driver am79c961_driver = {
|
|
||||||
.probe = am79c961_probe,
|
|
||||||
.driver = {
|
|
||||||
.name = "am79c961",
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
static int __init am79c961_init(void)
|
|
||||||
{
|
|
||||||
return platform_driver_register(&am79c961_driver);
|
|
||||||
}
|
|
||||||
|
|
||||||
__initcall(am79c961_init);
|
|
||||||
@ -1,143 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0-only */
|
|
||||||
/*
|
|
||||||
* linux/drivers/net/ethernet/amd/am79c961a.h
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef _LINUX_am79c961a_H
|
|
||||||
#define _LINUX_am79c961a_H
|
|
||||||
|
|
||||||
/* use 0 for production, 1 for verification, >2 for debug. debug flags: */
|
|
||||||
#define DEBUG_TX 2
|
|
||||||
#define DEBUG_RX 4
|
|
||||||
#define DEBUG_INT 8
|
|
||||||
#define DEBUG_IC 16
|
|
||||||
#ifndef NET_DEBUG
|
|
||||||
#define NET_DEBUG 0
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#define NET_UID 0
|
|
||||||
#define NET_RDP 0x10
|
|
||||||
#define NET_RAP 0x12
|
|
||||||
#define NET_RESET 0x14
|
|
||||||
#define NET_IDP 0x16
|
|
||||||
|
|
||||||
/*
|
|
||||||
* RAP registers
|
|
||||||
*/
|
|
||||||
#define CSR0 0
|
|
||||||
#define CSR0_INIT 0x0001
|
|
||||||
#define CSR0_STRT 0x0002
|
|
||||||
#define CSR0_STOP 0x0004
|
|
||||||
#define CSR0_TDMD 0x0008
|
|
||||||
#define CSR0_TXON 0x0010
|
|
||||||
#define CSR0_RXON 0x0020
|
|
||||||
#define CSR0_IENA 0x0040
|
|
||||||
#define CSR0_INTR 0x0080
|
|
||||||
#define CSR0_IDON 0x0100
|
|
||||||
#define CSR0_TINT 0x0200
|
|
||||||
#define CSR0_RINT 0x0400
|
|
||||||
#define CSR0_MERR 0x0800
|
|
||||||
#define CSR0_MISS 0x1000
|
|
||||||
#define CSR0_CERR 0x2000
|
|
||||||
#define CSR0_BABL 0x4000
|
|
||||||
#define CSR0_ERR 0x8000
|
|
||||||
|
|
||||||
#define CSR3 3
|
|
||||||
#define CSR3_EMBA 0x0008
|
|
||||||
#define CSR3_DXMT2PD 0x0010
|
|
||||||
#define CSR3_LAPPEN 0x0020
|
|
||||||
#define CSR3_DXSUFLO 0x0040
|
|
||||||
#define CSR3_IDONM 0x0100
|
|
||||||
#define CSR3_TINTM 0x0200
|
|
||||||
#define CSR3_RINTM 0x0400
|
|
||||||
#define CSR3_MERRM 0x0800
|
|
||||||
#define CSR3_MISSM 0x1000
|
|
||||||
#define CSR3_BABLM 0x4000
|
|
||||||
#define CSR3_MASKALL 0x5F00
|
|
||||||
|
|
||||||
#define CSR4 4
|
|
||||||
#define CSR4_JABM 0x0001
|
|
||||||
#define CSR4_JAB 0x0002
|
|
||||||
#define CSR4_TXSTRTM 0x0004
|
|
||||||
#define CSR4_TXSTRT 0x0008
|
|
||||||
#define CSR4_RCVCCOM 0x0010
|
|
||||||
#define CSR4_RCVCCO 0x0020
|
|
||||||
#define CSR4_MFCOM 0x0100
|
|
||||||
#define CSR4_MFCO 0x0200
|
|
||||||
#define CSR4_ASTRP_RCV 0x0400
|
|
||||||
#define CSR4_APAD_XMIT 0x0800
|
|
||||||
|
|
||||||
#define CTRL1 5
|
|
||||||
#define CTRL1_SPND 0x0001
|
|
||||||
|
|
||||||
#define LADRL 8
|
|
||||||
#define LADRM1 9
|
|
||||||
#define LADRM2 10
|
|
||||||
#define LADRH 11
|
|
||||||
#define PADRL 12
|
|
||||||
#define PADRM 13
|
|
||||||
#define PADRH 14
|
|
||||||
|
|
||||||
#define MODE 15
|
|
||||||
#define MODE_DISRX 0x0001
|
|
||||||
#define MODE_DISTX 0x0002
|
|
||||||
#define MODE_LOOP 0x0004
|
|
||||||
#define MODE_DTCRC 0x0008
|
|
||||||
#define MODE_COLL 0x0010
|
|
||||||
#define MODE_DRETRY 0x0020
|
|
||||||
#define MODE_INTLOOP 0x0040
|
|
||||||
#define MODE_PORT_AUI 0x0000
|
|
||||||
#define MODE_PORT_10BT 0x0080
|
|
||||||
#define MODE_DRXPA 0x2000
|
|
||||||
#define MODE_DRXBA 0x4000
|
|
||||||
#define MODE_PROMISC 0x8000
|
|
||||||
|
|
||||||
#define BASERXL 24
|
|
||||||
#define BASERXH 25
|
|
||||||
#define BASETXL 30
|
|
||||||
#define BASETXH 31
|
|
||||||
|
|
||||||
#define POLLINT 47
|
|
||||||
|
|
||||||
#define SIZERXR 76
|
|
||||||
#define SIZETXR 78
|
|
||||||
|
|
||||||
#define CSR_MFC 112
|
|
||||||
|
|
||||||
#define RMD_ENP 0x0100
|
|
||||||
#define RMD_STP 0x0200
|
|
||||||
#define RMD_CRC 0x0800
|
|
||||||
#define RMD_FRAM 0x2000
|
|
||||||
#define RMD_ERR 0x4000
|
|
||||||
#define RMD_OWN 0x8000
|
|
||||||
|
|
||||||
#define TMD_ENP 0x0100
|
|
||||||
#define TMD_STP 0x0200
|
|
||||||
#define TMD_MORE 0x1000
|
|
||||||
#define TMD_ERR 0x4000
|
|
||||||
#define TMD_OWN 0x8000
|
|
||||||
|
|
||||||
#define TST_RTRY 0x0400
|
|
||||||
#define TST_LCAR 0x0800
|
|
||||||
#define TST_LCOL 0x1000
|
|
||||||
#define TST_UFLO 0x4000
|
|
||||||
#define TST_BUFF 0x8000
|
|
||||||
|
|
||||||
#define ISALED0 0x0004
|
|
||||||
#define ISALED0_LNKST 0x8000
|
|
||||||
|
|
||||||
struct dev_priv {
|
|
||||||
unsigned long rxbuffer[RX_BUFFERS];
|
|
||||||
unsigned long txbuffer[TX_BUFFERS];
|
|
||||||
unsigned char txhead;
|
|
||||||
unsigned char txtail;
|
|
||||||
unsigned char rxhead;
|
|
||||||
unsigned char rxtail;
|
|
||||||
unsigned long rxhdr;
|
|
||||||
unsigned long txhdr;
|
|
||||||
spinlock_t chip_lock;
|
|
||||||
struct timer_list timer;
|
|
||||||
struct net_device *dev;
|
|
||||||
};
|
|
||||||
|
|
||||||
#endif
|
|
||||||
@ -599,7 +599,7 @@ config K3_RTI_WATCHDOG
|
|||||||
|
|
||||||
config ORION_WATCHDOG
|
config ORION_WATCHDOG
|
||||||
tristate "Orion watchdog"
|
tristate "Orion watchdog"
|
||||||
depends on ARCH_ORION5X || ARCH_DOVE || MACH_DOVE || ARCH_MVEBU || (COMPILE_TEST && !ARCH_EBSA110)
|
depends on ARCH_ORION5X || ARCH_DOVE || MACH_DOVE || ARCH_MVEBU || COMPILE_TEST
|
||||||
depends on ARM
|
depends on ARM
|
||||||
select WATCHDOG_CORE
|
select WATCHDOG_CORE
|
||||||
help
|
help
|
||||||
|
|||||||
@ -21,19 +21,6 @@ extern time64_t mktime64(const unsigned int year, const unsigned int mon,
|
|||||||
const unsigned int day, const unsigned int hour,
|
const unsigned int day, const unsigned int hour,
|
||||||
const unsigned int min, const unsigned int sec);
|
const unsigned int min, const unsigned int sec);
|
||||||
|
|
||||||
/* Some architectures do not supply their own clocksource.
|
|
||||||
* This is mainly the case in architectures that get their
|
|
||||||
* inter-tick times by reading the counter on their interval
|
|
||||||
* timer. Since these timers wrap every tick, they're not really
|
|
||||||
* useful as clocksources. Wrapping them to act like one is possible
|
|
||||||
* but not very efficient. So we provide a callout these arches
|
|
||||||
* can implement for use with the jiffies clocksource to provide
|
|
||||||
* finer then tick granular time.
|
|
||||||
*/
|
|
||||||
#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
|
|
||||||
extern u32 (*arch_gettimeoffset)(void);
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#ifdef CONFIG_POSIX_TIMERS
|
#ifdef CONFIG_POSIX_TIMERS
|
||||||
extern void clear_itimer(void);
|
extern void clear_itimer(void);
|
||||||
#else
|
#else
|
||||||
|
|||||||
@ -10,8 +10,7 @@ void timekeeping_init(void);
|
|||||||
extern int timekeeping_suspended;
|
extern int timekeeping_suspended;
|
||||||
|
|
||||||
/* Architecture timer tick functions: */
|
/* Architecture timer tick functions: */
|
||||||
extern void update_process_times(int user);
|
extern void legacy_timer_tick(unsigned long ticks);
|
||||||
extern void xtime_update(unsigned long ticks);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Get and set timeofday
|
* Get and set timeofday
|
||||||
|
|||||||
@ -26,13 +26,9 @@ config CLOCKSOURCE_VALIDATE_LAST_CYCLE
|
|||||||
config GENERIC_TIME_VSYSCALL
|
config GENERIC_TIME_VSYSCALL
|
||||||
bool
|
bool
|
||||||
|
|
||||||
# Old style timekeeping
|
|
||||||
config ARCH_USES_GETTIMEOFFSET
|
|
||||||
bool
|
|
||||||
|
|
||||||
# The generic clock events infrastructure
|
# The generic clock events infrastructure
|
||||||
config GENERIC_CLOCKEVENTS
|
config GENERIC_CLOCKEVENTS
|
||||||
bool
|
def_bool !LEGACY_TIMER_TICK
|
||||||
|
|
||||||
# Architecture can handle broadcast in a driver-agnostic way
|
# Architecture can handle broadcast in a driver-agnostic way
|
||||||
config ARCH_HAS_TICK_BROADCAST
|
config ARCH_HAS_TICK_BROADCAST
|
||||||
@ -61,6 +57,13 @@ config POSIX_CPU_TIMERS_TASK_WORK
|
|||||||
bool
|
bool
|
||||||
default y if POSIX_TIMERS && HAVE_POSIX_CPU_TIMERS_TASK_WORK
|
default y if POSIX_TIMERS && HAVE_POSIX_CPU_TIMERS_TASK_WORK
|
||||||
|
|
||||||
|
config LEGACY_TIMER_TICK
|
||||||
|
bool
|
||||||
|
help
|
||||||
|
The legacy timer tick helper is used by platforms that
|
||||||
|
lack support for the generic clockevent framework.
|
||||||
|
New platforms should use generic clockevents instead.
|
||||||
|
|
||||||
if GENERIC_CLOCKEVENTS
|
if GENERIC_CLOCKEVENTS
|
||||||
menu "Timers subsystem"
|
menu "Timers subsystem"
|
||||||
|
|
||||||
@ -72,7 +75,6 @@ config TICK_ONESHOT
|
|||||||
|
|
||||||
config NO_HZ_COMMON
|
config NO_HZ_COMMON
|
||||||
bool
|
bool
|
||||||
depends on !ARCH_USES_GETTIMEOFFSET && GENERIC_CLOCKEVENTS
|
|
||||||
select TICK_ONESHOT
|
select TICK_ONESHOT
|
||||||
|
|
||||||
choice
|
choice
|
||||||
@ -87,7 +89,6 @@ config HZ_PERIODIC
|
|||||||
|
|
||||||
config NO_HZ_IDLE
|
config NO_HZ_IDLE
|
||||||
bool "Idle dynticks system (tickless idle)"
|
bool "Idle dynticks system (tickless idle)"
|
||||||
depends on !ARCH_USES_GETTIMEOFFSET && GENERIC_CLOCKEVENTS
|
|
||||||
select NO_HZ_COMMON
|
select NO_HZ_COMMON
|
||||||
help
|
help
|
||||||
This option enables a tickless idle system: timer interrupts
|
This option enables a tickless idle system: timer interrupts
|
||||||
@ -99,7 +100,6 @@ config NO_HZ_IDLE
|
|||||||
config NO_HZ_FULL
|
config NO_HZ_FULL
|
||||||
bool "Full dynticks system (tickless)"
|
bool "Full dynticks system (tickless)"
|
||||||
# NO_HZ_COMMON dependency
|
# NO_HZ_COMMON dependency
|
||||||
depends on !ARCH_USES_GETTIMEOFFSET && GENERIC_CLOCKEVENTS
|
|
||||||
# We need at least one periodic CPU for timekeeping
|
# We need at least one periodic CPU for timekeeping
|
||||||
depends on SMP
|
depends on SMP
|
||||||
depends on HAVE_CONTEXT_TRACKING
|
depends on HAVE_CONTEXT_TRACKING
|
||||||
@ -158,7 +158,6 @@ config CONTEXT_TRACKING_FORCE
|
|||||||
|
|
||||||
config NO_HZ
|
config NO_HZ
|
||||||
bool "Old Idle dynticks config"
|
bool "Old Idle dynticks config"
|
||||||
depends on !ARCH_USES_GETTIMEOFFSET && GENERIC_CLOCKEVENTS
|
|
||||||
help
|
help
|
||||||
This is the old config entry that enables dynticks idle.
|
This is the old config entry that enables dynticks idle.
|
||||||
We keep it around for a little while to enforce backward
|
We keep it around for a little while to enforce backward
|
||||||
@ -166,7 +165,6 @@ config NO_HZ
|
|||||||
|
|
||||||
config HIGH_RES_TIMERS
|
config HIGH_RES_TIMERS
|
||||||
bool "High Resolution Timer Support"
|
bool "High Resolution Timer Support"
|
||||||
depends on !ARCH_USES_GETTIMEOFFSET && GENERIC_CLOCKEVENTS
|
|
||||||
select TICK_ONESHOT
|
select TICK_ONESHOT
|
||||||
help
|
help
|
||||||
This option enables high resolution timer support. If your
|
This option enables high resolution timer support. If your
|
||||||
|
|||||||
@ -16,6 +16,7 @@ ifeq ($(CONFIG_GENERIC_CLOCKEVENTS_BROADCAST),y)
|
|||||||
endif
|
endif
|
||||||
obj-$(CONFIG_GENERIC_SCHED_CLOCK) += sched_clock.o
|
obj-$(CONFIG_GENERIC_SCHED_CLOCK) += sched_clock.o
|
||||||
obj-$(CONFIG_TICK_ONESHOT) += tick-oneshot.o tick-sched.o
|
obj-$(CONFIG_TICK_ONESHOT) += tick-oneshot.o tick-sched.o
|
||||||
|
obj-$(CONFIG_LEGACY_TIMER_TICK) += tick-legacy.o
|
||||||
obj-$(CONFIG_HAVE_GENERIC_VDSO) += vsyscall.o
|
obj-$(CONFIG_HAVE_GENERIC_VDSO) += vsyscall.o
|
||||||
obj-$(CONFIG_DEBUG_FS) += timekeeping_debug.o
|
obj-$(CONFIG_DEBUG_FS) += timekeeping_debug.o
|
||||||
obj-$(CONFIG_TEST_UDELAY) += test_udelay.o
|
obj-$(CONFIG_TEST_UDELAY) += test_udelay.o
|
||||||
|
|||||||
@ -705,8 +705,6 @@ static inline void clocksource_update_max_deferment(struct clocksource *cs)
|
|||||||
&cs->max_cycles);
|
&cs->max_cycles);
|
||||||
}
|
}
|
||||||
|
|
||||||
#ifndef CONFIG_ARCH_USES_GETTIMEOFFSET
|
|
||||||
|
|
||||||
static struct clocksource *clocksource_find_best(bool oneshot, bool skipcur)
|
static struct clocksource *clocksource_find_best(bool oneshot, bool skipcur)
|
||||||
{
|
{
|
||||||
struct clocksource *cs;
|
struct clocksource *cs;
|
||||||
@ -798,12 +796,6 @@ static void clocksource_select_fallback(void)
|
|||||||
__clocksource_select(true);
|
__clocksource_select(true);
|
||||||
}
|
}
|
||||||
|
|
||||||
#else /* !CONFIG_ARCH_USES_GETTIMEOFFSET */
|
|
||||||
static inline void clocksource_select(void) { }
|
|
||||||
static inline void clocksource_select_fallback(void) { }
|
|
||||||
|
|
||||||
#endif
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* clocksource_done_booting - Called near the end of core bootup
|
* clocksource_done_booting - Called near the end of core bootup
|
||||||
*
|
*
|
||||||
|
|||||||
37
kernel/time/tick-legacy.c
Normal file
37
kernel/time/tick-legacy.c
Normal file
@ -0,0 +1,37 @@
|
|||||||
|
// SPDX-License-Identifier: GPL-2.0
|
||||||
|
/*
|
||||||
|
* Timer tick function for architectures that lack generic clockevents,
|
||||||
|
* consolidated here from m68k/ia64/parisc/arm.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <linux/irq.h>
|
||||||
|
#include <linux/profile.h>
|
||||||
|
#include <linux/timekeeper_internal.h>
|
||||||
|
|
||||||
|
#include "tick-internal.h"
|
||||||
|
|
||||||
|
/**
|
||||||
|
* legacy_timer_tick() - advances the timekeeping infrastructure
|
||||||
|
* @ticks: number of ticks, that have elapsed since the last call.
|
||||||
|
*
|
||||||
|
* This is used by platforms that have not been converted to
|
||||||
|
* generic clockevents.
|
||||||
|
*
|
||||||
|
* If 'ticks' is zero, the CPU is not handling timekeeping, so
|
||||||
|
* only perform process accounting and profiling.
|
||||||
|
*
|
||||||
|
* Must be called with interrupts disabled.
|
||||||
|
*/
|
||||||
|
void legacy_timer_tick(unsigned long ticks)
|
||||||
|
{
|
||||||
|
if (ticks) {
|
||||||
|
raw_spin_lock(&jiffies_lock);
|
||||||
|
write_seqcount_begin(&jiffies_seq);
|
||||||
|
do_timer(ticks);
|
||||||
|
write_seqcount_end(&jiffies_seq);
|
||||||
|
raw_spin_unlock(&jiffies_lock);
|
||||||
|
update_wall_time();
|
||||||
|
}
|
||||||
|
update_process_times(user_mode(get_irq_regs()));
|
||||||
|
profile_tick(CPU_PROFILING);
|
||||||
|
}
|
||||||
@ -369,13 +369,6 @@ static void tk_setup_internals(struct timekeeper *tk, struct clocksource *clock)
|
|||||||
|
|
||||||
/* Timekeeper helper functions. */
|
/* Timekeeper helper functions. */
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
|
|
||||||
static u32 default_arch_gettimeoffset(void) { return 0; }
|
|
||||||
u32 (*arch_gettimeoffset)(void) = default_arch_gettimeoffset;
|
|
||||||
#else
|
|
||||||
static inline u32 arch_gettimeoffset(void) { return 0; }
|
|
||||||
#endif
|
|
||||||
|
|
||||||
static inline u64 timekeeping_delta_to_ns(const struct tk_read_base *tkr, u64 delta)
|
static inline u64 timekeeping_delta_to_ns(const struct tk_read_base *tkr, u64 delta)
|
||||||
{
|
{
|
||||||
u64 nsec;
|
u64 nsec;
|
||||||
@ -383,8 +376,7 @@ static inline u64 timekeeping_delta_to_ns(const struct tk_read_base *tkr, u64 de
|
|||||||
nsec = delta * tkr->mult + tkr->xtime_nsec;
|
nsec = delta * tkr->mult + tkr->xtime_nsec;
|
||||||
nsec >>= tkr->shift;
|
nsec >>= tkr->shift;
|
||||||
|
|
||||||
/* If arch requires, add in get_arch_timeoffset() */
|
return nsec;
|
||||||
return nsec + arch_gettimeoffset();
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static inline u64 timekeeping_get_ns(const struct tk_read_base *tkr)
|
static inline u64 timekeeping_get_ns(const struct tk_read_base *tkr)
|
||||||
@ -790,16 +782,8 @@ static void timekeeping_forward_now(struct timekeeper *tk)
|
|||||||
tk->tkr_raw.cycle_last = cycle_now;
|
tk->tkr_raw.cycle_last = cycle_now;
|
||||||
|
|
||||||
tk->tkr_mono.xtime_nsec += delta * tk->tkr_mono.mult;
|
tk->tkr_mono.xtime_nsec += delta * tk->tkr_mono.mult;
|
||||||
|
|
||||||
/* If arch requires, add in get_arch_timeoffset() */
|
|
||||||
tk->tkr_mono.xtime_nsec += (u64)arch_gettimeoffset() << tk->tkr_mono.shift;
|
|
||||||
|
|
||||||
|
|
||||||
tk->tkr_raw.xtime_nsec += delta * tk->tkr_raw.mult;
|
tk->tkr_raw.xtime_nsec += delta * tk->tkr_raw.mult;
|
||||||
|
|
||||||
/* If arch requires, add in get_arch_timeoffset() */
|
|
||||||
tk->tkr_raw.xtime_nsec += (u64)arch_gettimeoffset() << tk->tkr_raw.shift;
|
|
||||||
|
|
||||||
tk_normalize_xtime(tk);
|
tk_normalize_xtime(tk);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -2146,19 +2130,12 @@ static void timekeeping_advance(enum timekeeping_adv_mode mode)
|
|||||||
if (unlikely(timekeeping_suspended))
|
if (unlikely(timekeeping_suspended))
|
||||||
goto out;
|
goto out;
|
||||||
|
|
||||||
#ifdef CONFIG_ARCH_USES_GETTIMEOFFSET
|
|
||||||
offset = real_tk->cycle_interval;
|
|
||||||
|
|
||||||
if (mode != TK_ADV_TICK)
|
|
||||||
goto out;
|
|
||||||
#else
|
|
||||||
offset = clocksource_delta(tk_clock_read(&tk->tkr_mono),
|
offset = clocksource_delta(tk_clock_read(&tk->tkr_mono),
|
||||||
tk->tkr_mono.cycle_last, tk->tkr_mono.mask);
|
tk->tkr_mono.cycle_last, tk->tkr_mono.mask);
|
||||||
|
|
||||||
/* Check if there's really nothing to do */
|
/* Check if there's really nothing to do */
|
||||||
if (offset < real_tk->cycle_interval && mode == TK_ADV_TICK)
|
if (offset < real_tk->cycle_interval && mode == TK_ADV_TICK)
|
||||||
goto out;
|
goto out;
|
||||||
#endif
|
|
||||||
|
|
||||||
/* Do some additional sanity checking */
|
/* Do some additional sanity checking */
|
||||||
timekeeping_check_update(tk, offset);
|
timekeeping_check_update(tk, offset);
|
||||||
@ -2474,19 +2451,3 @@ void hardpps(const struct timespec64 *phase_ts, const struct timespec64 *raw_ts)
|
|||||||
}
|
}
|
||||||
EXPORT_SYMBOL(hardpps);
|
EXPORT_SYMBOL(hardpps);
|
||||||
#endif /* CONFIG_NTP_PPS */
|
#endif /* CONFIG_NTP_PPS */
|
||||||
|
|
||||||
/**
|
|
||||||
* xtime_update() - advances the timekeeping infrastructure
|
|
||||||
* @ticks: number of ticks, that have elapsed since the last call.
|
|
||||||
*
|
|
||||||
* Must be called with interrupts disabled.
|
|
||||||
*/
|
|
||||||
void xtime_update(unsigned long ticks)
|
|
||||||
{
|
|
||||||
raw_spin_lock(&jiffies_lock);
|
|
||||||
write_seqcount_begin(&jiffies_seq);
|
|
||||||
do_timer(ticks);
|
|
||||||
write_seqcount_end(&jiffies_seq);
|
|
||||||
raw_spin_unlock(&jiffies_lock);
|
|
||||||
update_wall_time();
|
|
||||||
}
|
|
||||||
|
|||||||
@ -22,6 +22,7 @@ static inline int sched_clock_suspend(void) { return 0; }
|
|||||||
static inline void sched_clock_resume(void) { }
|
static inline void sched_clock_resume(void) { }
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
extern void update_process_times(int user);
|
||||||
extern void do_timer(unsigned long ticks);
|
extern void do_timer(unsigned long ticks);
|
||||||
extern void update_wall_time(void);
|
extern void update_wall_time(void);
|
||||||
|
|
||||||
|
|||||||
@ -253,7 +253,6 @@ config IRQSOFF_TRACER
|
|||||||
bool "Interrupts-off Latency Tracer"
|
bool "Interrupts-off Latency Tracer"
|
||||||
default n
|
default n
|
||||||
depends on TRACE_IRQFLAGS_SUPPORT
|
depends on TRACE_IRQFLAGS_SUPPORT
|
||||||
depends on !ARCH_USES_GETTIMEOFFSET
|
|
||||||
select TRACE_IRQFLAGS
|
select TRACE_IRQFLAGS
|
||||||
select GENERIC_TRACER
|
select GENERIC_TRACER
|
||||||
select TRACER_MAX_TRACE
|
select TRACER_MAX_TRACE
|
||||||
@ -277,7 +276,6 @@ config IRQSOFF_TRACER
|
|||||||
config PREEMPT_TRACER
|
config PREEMPT_TRACER
|
||||||
bool "Preemption-off Latency Tracer"
|
bool "Preemption-off Latency Tracer"
|
||||||
default n
|
default n
|
||||||
depends on !ARCH_USES_GETTIMEOFFSET
|
|
||||||
depends on PREEMPTION
|
depends on PREEMPTION
|
||||||
select GENERIC_TRACER
|
select GENERIC_TRACER
|
||||||
select TRACER_MAX_TRACE
|
select TRACER_MAX_TRACE
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user