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powerpc64/bpf: Get rid of PPC_BPF_[LL|STL|STLU] macros

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All these macros now have a single user. Expand their usage in place.

Signed-off-by: Naveen N. Rao <naveen.n.rao@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/e0526fc7633a34f983a7a330712b55bdfaf20482.1644834730.git.naveen.n.rao@linux.vnet.ibm.com
This commit is contained in:
Naveen N. Rao 2022-02-14 16:11:46 +05:30 committed by Michael Ellerman
parent 391c271f4d
commit 794abc08d7
2 changed files with 15 additions and 28 deletions

22
arch/powerpc/net/bpf_jit64.h
View File

@ -64,28 +64,6 @@ const int b2p[MAX_BPF_JIT_REG + 2] = {
/* PPC NVR range -- update this if we ever use NVRs below r27 */
#define BPF_PPC_NVR_MIN 27
/*
* WARNING: These can use TMP_REG_2 if the offset is not at word boundary,
* so ensure that it isn't in use already.
*/
#define PPC_BPF_LL(r, base, i) do { \
if ((i) % 4) { \
EMIT(PPC_RAW_LI(b2p[TMP_REG_2], (i)));\
EMIT(PPC_RAW_LDX(r, base, \
b2p[TMP_REG_2])); \
} else \
EMIT(PPC_RAW_LD(r, base, i)); \
} while(0)
#define PPC_BPF_STL(r, base, i) do { \
if ((i) % 4) { \
EMIT(PPC_RAW_LI(b2p[TMP_REG_2], (i)));\
EMIT(PPC_RAW_STDX(r, base, \
b2p[TMP_REG_2])); \
} else \
EMIT(PPC_RAW_STD(r, base, i)); \
} while(0)
#define PPC_BPF_STLU(r, base, i) do { EMIT(PPC_RAW_STDU(r, base, i)); } while(0)
#endif /* !__ASSEMBLY__ */
#endif

21
arch/powerpc/net/bpf_jit_comp64.c
View File

@ -100,7 +100,7 @@ void bpf_jit_build_prologue(u32 *image, struct codegen_context *ctx)
EMIT(PPC_RAW_STD(0, 1, PPC_LR_STKOFF));
}
PPC_BPF_STLU(1, 1, -(BPF_PPC_STACKFRAME + ctx->stack_size));
EMIT(PPC_RAW_STDU(1, 1, -(BPF_PPC_STACKFRAME + ctx->stack_size)));
}
/*
@ -726,7 +726,12 @@ emit_clear:
PPC_LI32(b2p[TMP_REG_1], imm);
src_reg = b2p[TMP_REG_1];
}
PPC_BPF_STL(src_reg, dst_reg, off);
if (off % 4) {
EMIT(PPC_RAW_LI(b2p[TMP_REG_2], off));
EMIT(PPC_RAW_STDX(src_reg, dst_reg, b2p[TMP_REG_2]));
} else {
EMIT(PPC_RAW_STD(src_reg, dst_reg, off));
}
break;
/*
@ -802,9 +807,8 @@ emit_clear:
PPC_BCC_SHORT(COND_GT, (ctx->idx + 3) * 4);
EMIT(PPC_RAW_LI(dst_reg, 0));
/*
* Check if 'off' is word aligned because PPC_BPF_LL()
* (BPF_DW case) generates two instructions if 'off' is not
* word-aligned and one instruction otherwise.
* Check if 'off' is word aligned for BPF_DW, because
* we might generate two instructions.
*/
if (BPF_SIZE(code) == BPF_DW && (off & 3))
PPC_JMP((ctx->idx + 3) * 4);
@ -823,7 +827,12 @@ emit_clear:
EMIT(PPC_RAW_LWZ(dst_reg, src_reg, off));
break;
case BPF_DW:
PPC_BPF_LL(dst_reg, src_reg, off);
if (off % 4) {
EMIT(PPC_RAW_LI(b2p[TMP_REG_1], off));
EMIT(PPC_RAW_LDX(dst_reg, src_reg, b2p[TMP_REG_1]));
} else {
EMIT(PPC_RAW_LD(dst_reg, src_reg, off));
}
break;
}