rtw88: add interface config for 8822c

Some devices need to configure interface/HCI related reigsters
in power on flow. Add interface_cfg for HCI for the settings.

The driver only supports RTL8822BE/RTL8822CE now, and since
RTL8822BE does not need to configure PCIE, the configuration
is only added for RTL8822CE. Without it, some of the RTL8822CE
device can crash and disconnected to host in suspend/wowlan mode.

Signed-off-by: Tzu-En Huang <tehuang@realtek.com>
Signed-off-by: Yan-Hsuan Chuang <yhchuang@realtek.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Yan-Hsuan Chuang 2019-12-19 16:58:12 +08:00 committed by Kalle Valo
parent fd30e891e0
commit 786221048e
4 changed files with 27 additions and 0 deletions

View File

@ -15,6 +15,7 @@ struct rtw_hci_ops {
void (*stop)(struct rtw_dev *rtwdev);
void (*deep_ps)(struct rtw_dev *rtwdev, bool enter);
void (*link_ps)(struct rtw_dev *rtwdev, bool enter);
void (*interface_cfg)(struct rtw_dev *rtwdev);
int (*write_data_rsvd_page)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
int (*write_data_h2c)(struct rtw_dev *rtwdev, u8 *buf, u32 size);
@ -59,6 +60,11 @@ static inline void rtw_hci_link_ps(struct rtw_dev *rtwdev, bool enter)
rtwdev->hci.ops->link_ps(rtwdev, enter);
}
static inline void rtw_hci_interface_cfg(struct rtw_dev *rtwdev)
{
rtwdev->hci.ops->interface_cfg(rtwdev);
}
static inline int
rtw_hci_write_data_rsvd_page(struct rtw_dev *rtwdev, u8 *buf, u32 size)
{

View File

@ -1034,5 +1034,7 @@ int rtw_mac_init(struct rtw_dev *rtwdev)
if (ret)
return ret;
rtw_hci_interface_cfg(rtwdev);
return 0;
}

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@ -6,6 +6,7 @@
#include <linux/pci.h>
#include "main.h"
#include "pci.h"
#include "reg.h"
#include "tx.h"
#include "rx.h"
#include "fw.h"
@ -1224,6 +1225,21 @@ static void rtw_pci_link_cfg(struct rtw_dev *rtwdev)
rtwpci->link_ctrl = link_ctrl;
}
static void rtw_pci_interface_cfg(struct rtw_dev *rtwdev)
{
struct rtw_chip_info *chip = rtwdev->chip;
switch (chip->id) {
case RTW_CHIP_TYPE_8822C:
if (rtwdev->hal.cut_version >= RTW_CHIP_VER_CUT_D)
rtw_write32_mask(rtwdev, REG_HCI_MIX_CFG,
BIT_PCIE_EMAC_PDN_AUX_TO_FAST_CLK, 1);
break;
default:
break;
}
}
static void rtw_pci_phy_cfg(struct rtw_dev *rtwdev)
{
struct rtw_chip_info *chip = rtwdev->chip;
@ -1332,6 +1348,7 @@ static struct rtw_hci_ops rtw_pci_ops = {
.stop = rtw_pci_stop,
.deep_ps = rtw_pci_deep_ps,
.link_ps = rtw_pci_link_ps,
.interface_cfg = rtw_pci_interface_cfg,
.read8 = rtw_pci_read8,
.read16 = rtw_pci_read16,

View File

@ -194,6 +194,8 @@
#define REG_H2C_INFO 0x0254
#define REG_INT_MIG 0x0304
#define REG_HCI_MIX_CFG 0x03FC
#define BIT_PCIE_EMAC_PDN_AUX_TO_FAST_CLK BIT(26)
#define REG_FWHW_TXQ_CTRL 0x0420
#define BIT_EN_BCNQ_DL BIT(22)