Merge branch 'omap/soc' into arm/dt
Bringing in to resolve soc -> add/add conflicts locally * omap/soc: ARM: OMAP2+: use separate IOMMU pdata to fix DRA7 IPU1 boot ARM: OMAP2+: omap-iommu.c conversion to ti-sysc ARM: OMAP2+: Add workaround for DRA7 DSP MStandby errata i879 ARM: OMAP4+: remove pdata quirks for omap4+ iommus ARM: OMAP2+: pdata-quirks: add PRM data for reset support ARM: OMAP2+: am43xx: Add lcdc clockdomain Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
785ca50f8e
@ -84,6 +84,15 @@ static struct clockdomain l3s_tsc_43xx_clkdm = {
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain lcdc_43xx_clkdm = {
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.name = "lcdc_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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.prcm_partition = AM43XX_CM_PARTITION,
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.cm_inst = AM43XX_CM_PER_INST,
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.clkdm_offs = AM43XX_CM_PER_LCDC_CDOFFS,
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.flags = CLKDM_CAN_SWSUP,
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};
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static struct clockdomain dss_43xx_clkdm = {
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.name = "dss_clkdm",
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.pwrdm = { .name = "per_pwrdm" },
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@ -173,6 +182,7 @@ static struct clockdomain *clockdomains_am43xx[] __initdata = {
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&pruss_ocp_43xx_clkdm,
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&ocpwp_l3_43xx_clkdm,
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&l3s_tsc_43xx_clkdm,
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&lcdc_43xx_clkdm,
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&dss_43xx_clkdm,
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&l3_aon_43xx_clkdm,
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&emif_43xx_clkdm,
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@ -8,36 +8,134 @@
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#include <linux/platform_device.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/list.h>
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#include "omap_hwmod.h"
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#include "omap_device.h"
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#include "clockdomain.h"
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#include "powerdomain.h"
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struct pwrdm_link {
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struct device *dev;
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struct powerdomain *pwrdm;
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struct list_head node;
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};
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static DEFINE_SPINLOCK(iommu_lock);
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static struct clockdomain *emu_clkdm;
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static atomic_t emu_count;
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static void omap_iommu_dra7_emu_swsup_config(struct platform_device *pdev,
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bool enable)
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{
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struct device_node *np = pdev->dev.of_node;
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unsigned long flags;
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if (!of_device_is_compatible(np, "ti,dra7-dsp-iommu"))
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return;
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if (!emu_clkdm) {
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emu_clkdm = clkdm_lookup("emu_clkdm");
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if (WARN_ON_ONCE(!emu_clkdm))
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return;
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}
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spin_lock_irqsave(&iommu_lock, flags);
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if (enable && (atomic_inc_return(&emu_count) == 1))
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clkdm_deny_idle(emu_clkdm);
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else if (!enable && (atomic_dec_return(&emu_count) == 0))
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clkdm_allow_idle(emu_clkdm);
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spin_unlock_irqrestore(&iommu_lock, flags);
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}
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static struct powerdomain *_get_pwrdm(struct device *dev)
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{
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struct clk *clk;
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struct clk_hw_omap *hwclk;
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struct clockdomain *clkdm;
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struct powerdomain *pwrdm = NULL;
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struct pwrdm_link *entry;
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unsigned long flags;
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static LIST_HEAD(cache);
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spin_lock_irqsave(&iommu_lock, flags);
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list_for_each_entry(entry, &cache, node) {
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if (entry->dev == dev) {
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pwrdm = entry->pwrdm;
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break;
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}
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}
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spin_unlock_irqrestore(&iommu_lock, flags);
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if (pwrdm)
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return pwrdm;
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clk = of_clk_get(dev->of_node->parent, 0);
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if (!clk) {
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dev_err(dev, "no fck found\n");
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return NULL;
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}
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hwclk = to_clk_hw_omap(__clk_get_hw(clk));
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clk_put(clk);
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if (!hwclk || !hwclk->clkdm_name) {
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dev_err(dev, "no hwclk data\n");
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return NULL;
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}
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clkdm = clkdm_lookup(hwclk->clkdm_name);
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if (!clkdm) {
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dev_err(dev, "clkdm not found: %s\n", hwclk->clkdm_name);
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return NULL;
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}
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pwrdm = clkdm_get_pwrdm(clkdm);
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if (!pwrdm) {
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dev_err(dev, "pwrdm not found: %s\n", clkdm->name);
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return NULL;
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}
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entry = kmalloc(sizeof(*entry), GFP_KERNEL);
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if (entry) {
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entry->dev = dev;
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entry->pwrdm = pwrdm;
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spin_lock_irqsave(&iommu_lock, flags);
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list_add(&entry->node, &cache);
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spin_unlock_irqrestore(&iommu_lock, flags);
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}
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return pwrdm;
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}
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int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
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u8 *pwrst)
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{
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struct powerdomain *pwrdm;
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struct omap_device *od;
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u8 next_pwrst;
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int ret = 0;
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od = to_omap_device(pdev);
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if (!od)
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pwrdm = _get_pwrdm(&pdev->dev);
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if (!pwrdm)
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return -ENODEV;
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if (od->hwmods_cnt != 1)
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return -EINVAL;
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pwrdm = omap_hwmod_get_pwrdm(od->hwmods[0]);
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if (!pwrdm)
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return -EINVAL;
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if (request)
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if (request) {
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*pwrst = pwrdm_read_next_pwrst(pwrdm);
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omap_iommu_dra7_emu_swsup_config(pdev, true);
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}
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if (*pwrst > PWRDM_POWER_RET)
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return 0;
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goto out;
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next_pwrst = request ? PWRDM_POWER_ON : *pwrst;
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return pwrdm_set_next_pwrst(pwrdm, next_pwrst);
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ret = pwrdm_set_next_pwrst(pwrdm, next_pwrst);
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out:
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if (!request)
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omap_iommu_dra7_emu_swsup_config(pdev, false);
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return ret;
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}
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@ -23,6 +23,7 @@
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#include <linux/platform_data/ti-sysc.h>
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#include <linux/platform_data/wkup_m3.h>
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#include <linux/platform_data/asoc-ti-mcbsp.h>
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#include <linux/platform_data/ti-prm.h>
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#include "clockdomain.h"
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#include "common.h"
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@ -42,6 +43,17 @@ struct pdata_init {
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static struct of_dev_auxdata omap_auxdata_lookup[];
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static struct twl4030_gpio_platform_data twl_gpio_auxdata;
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#if IS_ENABLED(CONFIG_OMAP_IOMMU)
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int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev, bool request,
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u8 *pwrst);
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#else
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static inline int omap_iommu_set_pwrdm_constraint(struct platform_device *pdev,
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bool request, u8 *pwrst)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_MACH_NOKIA_N8X0
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static void __init omap2420_n8x0_legacy_init(void)
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{
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@ -260,16 +272,6 @@ static void __init omap3_pandora_legacy_init(void)
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}
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#endif /* CONFIG_ARCH_OMAP3 */
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
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static struct iommu_platform_data omap4_iommu_pdata = {
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.reset_name = "mmu_cache",
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.assert_reset = omap_device_assert_hardreset,
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.deassert_reset = omap_device_deassert_hardreset,
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.device_enable = omap_device_enable,
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.device_idle = omap_device_idle,
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};
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#endif
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#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
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static struct wkup_m3_platform_data wkup_m3_data = {
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.reset_name = "wkup_m3",
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@ -285,6 +287,10 @@ static void __init omap5_uevm_legacy_init(void)
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#endif
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#ifdef CONFIG_SOC_DRA7XX
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static struct iommu_platform_data dra7_ipu1_dsp_iommu_pdata = {
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.set_pwrdm_constraint = omap_iommu_set_pwrdm_constraint,
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};
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc1;
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc2;
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static struct omap_hsmmc_platform_data dra7_hsmmc_data_mmc3;
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@ -412,6 +418,12 @@ void omap_pcs_legacy_init(int irq, void (*rearm)(void))
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pcs_pdata.rearm = rearm;
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}
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static struct ti_prm_platform_data ti_prm_pdata = {
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.clkdm_deny_idle = clkdm_deny_idle,
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.clkdm_allow_idle = clkdm_allow_idle,
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.clkdm_lookup = clkdm_lookup,
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};
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/*
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* GPIOs for TWL are initialized by the I2C bus and need custom
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* handing until DSS has device tree bindings.
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@ -492,10 +504,6 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
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&wkup_m3_data),
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#endif
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#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
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OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
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&omap4_iommu_pdata),
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OF_DEV_AUXDATA("ti,omap4-iommu", 0x55082000, "55082000.mmu",
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&omap4_iommu_pdata),
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OF_DEV_AUXDATA("ti,omap4-smartreflex-iva", 0x4a0db000,
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"4a0db000.smartreflex", &omap_sr_pdata[OMAP_SR_IVA]),
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OF_DEV_AUXDATA("ti,omap4-smartreflex-core", 0x4a0dd000,
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@ -510,10 +518,17 @@ static struct of_dev_auxdata omap_auxdata_lookup[] = {
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&dra7_hsmmc_data_mmc2),
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OF_DEV_AUXDATA("ti,dra7-hsmmc", 0x480ad000, "480ad000.mmc",
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&dra7_hsmmc_data_mmc3),
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OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x40d01000, "40d01000.mmu",
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&dra7_ipu1_dsp_iommu_pdata),
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OF_DEV_AUXDATA("ti,dra7-dsp-iommu", 0x41501000, "41501000.mmu",
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&dra7_ipu1_dsp_iommu_pdata),
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OF_DEV_AUXDATA("ti,dra7-iommu", 0x58882000, "58882000.mmu",
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&dra7_ipu1_dsp_iommu_pdata),
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#endif
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/* Common auxdata */
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OF_DEV_AUXDATA("ti,sysc", 0, NULL, &ti_sysc_pdata),
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OF_DEV_AUXDATA("pinctrl-single", 0, NULL, &pcs_pdata),
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OF_DEV_AUXDATA("ti,omap-prm-inst", 0, NULL, &ti_prm_pdata),
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{ /* sentinel */ },
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};
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@ -68,6 +68,7 @@
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#define AM43XX_CM_PER_ICSS_CDOFFS 0x0300
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#define AM43XX_CM_PER_L4LS_CDOFFS 0x0400
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#define AM43XX_CM_PER_EMIF_CDOFFS 0x0700
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#define AM43XX_CM_PER_LCDC_CDOFFS 0x0800
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#define AM43XX_CM_PER_DSS_CDOFFS 0x0a00
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#define AM43XX_CM_PER_CPSW_CDOFFS 0x0b00
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#define AM43XX_CM_PER_OCPWP_L3_CDOFFS 0x0c00
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