drm/amdgpu: indirect register access for nv12 sriov
get pf2vf msg info at it's earliest time so that guest driver can use these info to decide whether register indirect access enabled. Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com> Reviewed-by: Emily.Deng <Emily.Deng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2080,6 +2080,11 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
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amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0);
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return r;
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}
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/*get pf2vf msg info at it's earliest time*/
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if (amdgpu_sriov_vf(adev))
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amdgpu_virt_init_data_exchange(adev);
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}
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}
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@ -617,6 +617,14 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev)
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if (adev->virt.ras_init_done)
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amdgpu_virt_add_bad_page(adev, bp_block_offset, bp_block_size);
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}
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} else if (adev->bios != NULL) {
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adev->virt.fw_reserve.p_pf2vf =
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(struct amd_sriov_msg_pf2vf_info_header *)
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(adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));
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amdgpu_virt_read_pf2vf_data(adev);
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return;
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}
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if (adev->virt.vf2pf_update_interval_ms != 0) {
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