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i915/perf: Store a mask of valid OA formats for a platform

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Validity of an OA format is checked by using a sparse array of formats
per gen. Instead maintain a mask of supported formats for a platform in
the perf object.

v2: Use set_bit and test_bit style for the format_mask (Chris)

Signed-off-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210208174029.45621-1-umesh.nerlige.ramappa@intel.com
This commit is contained in:
Umesh Nerlige Ramappa 2021-02-08 09:40:27 -08:00 committed by Lionel Landwerlin
parent e22fa6f0a9
commit 77892f4f05
2 changed files with 70 additions and 1 deletions
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63
drivers/gpu/drm/i915/i915_perf.c
View File

@ -3524,6 +3524,18 @@ static u64 oa_exponent_to_ns(struct i915_perf *perf, int exponent)
2ULL << exponent);
}
static __always_inline bool
oa_format_valid(struct i915_perf *perf, enum drm_i915_oa_format format)
{
return test_bit(format, perf->format_mask);
}
static __always_inline void
oa_format_add(struct i915_perf *perf, enum drm_i915_oa_format format)
{
__set_bit(format, perf->format_mask);
}
/**
* read_properties_unlocked - validate + copy userspace stream open properties
* @perf: i915 perf instance
@ -3615,7 +3627,7 @@ static int read_properties_unlocked(struct i915_perf *perf,
value);
return -EINVAL;
}
if (!perf->oa_formats[value].size) {
if (!oa_format_valid(perf, value)) {
DRM_DEBUG("Unsupported OA report format %llu\n",
value);
return -EINVAL;
@ -4259,6 +4271,53 @@ static struct ctl_table dev_root[] = {
{}
};
static void oa_init_supported_formats(struct i915_perf *perf)
{
struct drm_i915_private *i915 = perf->i915;
enum intel_platform platform = INTEL_INFO(i915)->platform;
switch (platform) {
case INTEL_HASWELL:
oa_format_add(perf, I915_OA_FORMAT_A13);
oa_format_add(perf, I915_OA_FORMAT_A13);
oa_format_add(perf, I915_OA_FORMAT_A29);
oa_format_add(perf, I915_OA_FORMAT_A13_B8_C8);
oa_format_add(perf, I915_OA_FORMAT_B4_C8);
oa_format_add(perf, I915_OA_FORMAT_A45_B8_C8);
oa_format_add(perf, I915_OA_FORMAT_B4_C8_A16);
oa_format_add(perf, I915_OA_FORMAT_C4_B8);
break;
case INTEL_BROADWELL:
case INTEL_CHERRYVIEW:
case INTEL_SKYLAKE:
case INTEL_BROXTON:
case INTEL_KABYLAKE:
case INTEL_GEMINILAKE:
case INTEL_COFFEELAKE:
case INTEL_COMETLAKE:
case INTEL_CANNONLAKE:
case INTEL_ICELAKE:
case INTEL_ELKHARTLAKE:
case INTEL_JASPERLAKE:
oa_format_add(perf, I915_OA_FORMAT_A12);
oa_format_add(perf, I915_OA_FORMAT_A12_B8_C8);
oa_format_add(perf, I915_OA_FORMAT_A32u40_A4u32_B8_C8);
oa_format_add(perf, I915_OA_FORMAT_C4_B8);
break;
case INTEL_TIGERLAKE:
case INTEL_ROCKETLAKE:
case INTEL_DG1:
case INTEL_ALDERLAKE_S:
oa_format_add(perf, I915_OA_FORMAT_A32u40_A4u32_B8_C8);
break;
default:
MISSING_CASE(platform);
}
}
/**
* i915_perf_init - initialize i915-perf state on module bind
* @i915: i915 device instance
@ -4408,6 +4467,8 @@ void i915_perf_init(struct drm_i915_private *i915)
500 * 1000 /* 500us */);
perf->i915 = i915;
oa_init_supported_formats(perf);
}
}

8
drivers/gpu/drm/i915/i915_perf_types.h
View File

@ -15,6 +15,7 @@
#include <linux/types.h>
#include <linux/uuid.h>
#include <linux/wait.h>
#include <uapi/drm/i915_drm.h>
#include "gt/intel_sseu.h"
#include "i915_reg.h"
@ -441,6 +442,13 @@ struct i915_perf {
struct i915_oa_ops ops;
const struct i915_oa_format *oa_formats;
/**
* Use a format mask to store the supported formats
* for a platform.
*/
#define FORMAT_MASK_SIZE DIV_ROUND_UP(I915_OA_FORMAT_MAX - 1, BITS_PER_LONG)
unsigned long format_mask[FORMAT_MASK_SIZE];
atomic64_t noa_programming_delay;
};