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drm/i915/display: Only write to register in intel_psr2_program_trans_man_trk_ctl()

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There is no support for two pipes one transcoder for PSR and if we had
that the current code should not use cpu_transcoder.
Also I can't see a scenario where crtc_state->enable_psr2_sel_fetch is
set and PSR is not enabled and if by a bug it happens PSR HW will just
ignore any value in set in PSR2_MAN_TRK_CTL.

So dropping all the rest and keeping the same behavior that we have
with intel_psr2_program_plane_sel_fetch().

Cc: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Gwan-gyeong Mun <gwan-gyeong.mun@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20210209181439.215104-2-jose.souza@intel.com
This commit is contained in:
José Roberto de Souza 2021-02-09 10:14:37 -08:00
parent a22af61d43
commit 774ab4ff15
1 changed files with 2 additions and 12 deletions
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14
drivers/gpu/drm/i915/display/intel_psr.c
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@ -1227,23 +1227,13 @@ void intel_psr2_program_plane_sel_fetch(struct intel_plane *plane,
void intel_psr2_program_trans_man_trk_ctl(const struct intel_crtc_state *crtc_state)
{
struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev);
struct intel_encoder *encoder;
if (!HAS_PSR2_SEL_FETCH(dev_priv) ||
!crtc_state->enable_psr2_sel_fetch)
return;
for_each_intel_encoder_mask_with_psr(&dev_priv->drm, encoder,
crtc_state->uapi.encoder_mask) {
struct intel_dp *intel_dp = enc_to_intel_dp(encoder);
if (!intel_dp->psr.enabled)
continue;
intel_de_write(dev_priv,
PSR2_MAN_TRK_CTL(crtc_state->cpu_transcoder),
crtc_state->psr2_man_track_ctl);
}
intel_de_write(dev_priv, PSR2_MAN_TRK_CTL(crtc_state->cpu_transcoder),
crtc_state->psr2_man_track_ctl);
}
static void psr2_man_trk_ctl_calc(struct intel_crtc_state *crtc_state,