KVM: PPC: Fix emulation of H_SET_DABR/X on POWER8
In the old DABR register, the BT (Breakpoint Translation) bit is bit number 61. In the new DAWRX register, the WT (Watchpoint Translation) bit is bit number 59. So to move the DABR-BT bit into the position of the DAWRX-WT bit, it has to be shifted by two, not only by one. This fixes hardware watchpoints in gdb of older guests that only use the H_SET_DABR/X interface instead of the new H_SET_MODE interface. Cc: stable@vger.kernel.org # v3.14+ Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Laurent Vivier <lvivier@redhat.com> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
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@ -2153,7 +2153,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
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/* Emulate H_SET_DABR/X on P8 for the sake of compat mode guests */
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2: rlwimi r5, r4, 5, DAWRX_DR | DAWRX_DW
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rlwimi r5, r4, 1, DAWRX_WT
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rlwimi r5, r4, 2, DAWRX_WT
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clrrdi r4, r4, 3
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std r4, VCPU_DAWR(r3)
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std r5, VCPU_DAWRX(r3)
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