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drm/amdgpu: fix the missed handling for SDMA2 and SDMA3

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There is no base reg offset or ip_version set for SDMA2
and SDMA3 on SIENNA_CICHLID, so add them.

Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Kevin Wang <kevinyang.wang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Guchun Chen
2021-11-26 13:06:15 +08:00
committed by Alex Deucher
parent 1053b9c948
commit 7551f70ab9
1 changed files with 2 additions and 0 deletions
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2
drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c
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@@ -157,6 +157,8 @@ static int hw_id_map[MAX_HWIP] = {
[HDP_HWIP] = HDP_HWID, [HDP_HWIP] = HDP_HWID,
[SDMA0_HWIP] = SDMA0_HWID, [SDMA0_HWIP] = SDMA0_HWID,
[SDMA1_HWIP] = SDMA1_HWID, [SDMA1_HWIP] = SDMA1_HWID,
[SDMA2_HWIP] = SDMA2_HWID,
[SDMA3_HWIP] = SDMA3_HWID,
[MMHUB_HWIP] = MMHUB_HWID, [MMHUB_HWIP] = MMHUB_HWID,
[ATHUB_HWIP] = ATHUB_HWID, [ATHUB_HWIP] = ATHUB_HWID,
[NBIO_HWIP] = NBIF_HWID, [NBIO_HWIP] = NBIF_HWID,