clk: imx: Rename the imx_clk_pllv4 to imply it's clk_hw based
Renaming the imx_clk_pllv4 register function to imx_clk_hw_pllv4 to be more obvious it is clk_hw based. Signed-off-by: Abel Vesa <abel.vesa@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -90,8 +90,8 @@ static void __init imx7ulp_clk_scg1_init(struct device_node *np)
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clks[IMX7ULP_CLK_SPLL_PRE_DIV] = imx_clk_hw_divider_flags("spll_pre_div", "spll_pre_sel", base + 0x608, 8, 3, CLK_SET_RATE_GATE);
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/* name parent_name base */
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clks[IMX7ULP_CLK_APLL] = imx_clk_pllv4("apll", "apll_pre_div", base + 0x500);
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clks[IMX7ULP_CLK_SPLL] = imx_clk_pllv4("spll", "spll_pre_div", base + 0x600);
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clks[IMX7ULP_CLK_APLL] = imx_clk_hw_pllv4("apll", "apll_pre_div", base + 0x500);
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clks[IMX7ULP_CLK_SPLL] = imx_clk_hw_pllv4("spll", "spll_pre_div", base + 0x600);
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/* APLL PFDs */
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clks[IMX7ULP_CLK_APLL_PFD0] = imx_clk_pfdv2("apll_pfd0", "apll", base + 0x50c, 0);
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@ -206,7 +206,7 @@ static const struct clk_ops clk_pllv4_ops = {
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.is_enabled = clk_pllv4_is_enabled,
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};
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struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name,
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struct clk_hw *imx_clk_hw_pllv4(const char *name, const char *parent_name,
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void __iomem *base)
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{
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struct clk_pllv4 *pll;
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@ -176,7 +176,7 @@ struct clk_hw *imx_clk_hw_pllv3(enum imx_pllv3_type type, const char *name,
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.kdiv = (_k), \
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}
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struct clk_hw *imx_clk_pllv4(const char *name, const char *parent_name,
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struct clk_hw *imx_clk_hw_pllv4(const char *name, const char *parent_name,
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void __iomem *base);
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struct clk_hw *clk_hw_register_gate2(struct device *dev, const char *name,
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