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drm/radeon: fix typo in finding PLL params

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Otherwise the limit is raised to high.

Signed-off-by: Christian König <christian.koenig@amd.com>
Tested-by: Ken Moffat <zarniwhoop@ntlworld.com>
This commit is contained in:
Christian König 2014-05-13 12:50:54 +02:00
parent 4955bb073f
commit 74ad54f249
1 changed files with 1 additions and 1 deletions
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drivers/gpu/drm/radeon/radeon_display.c
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@ -999,7 +999,7 @@ void radeon_compute_pll_avivo(struct radeon_pll *pll,
/* avoid high jitter with small fractional dividers */
if (pll->flags & RADEON_PLL_USE_FRAC_FB_DIV && (fb_div % 10)) {
fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 60);
fb_div_min = max(fb_div_min, (9 - (fb_div % 10)) * 20 + 50);
if (fb_div < fb_div_min) {
unsigned tmp = DIV_ROUND_UP(fb_div_min, fb_div);
fb_div *= tmp;