forked from Minki/linux
arch/tile: Use separate, better minsec values for clocksource and sched_clock.
We were using the same 5-sec minsec for the clocksource and sched_clock that we were using for the clock_event_device. For the clock_event_device that's exactly right since it has a short maximum countdown time. But for sched_clock we want to avoid wraparound when converting from ticks to nsec over a much longer window, so we force a shift of 10. And for clocksource it seems dodgy to use a 5-sec minsec as well, so we copy some other platforms and force a shift of 22. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
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@ -36,16 +36,6 @@
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/* How many cycles per second we are running at. */
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static cycles_t cycles_per_sec __write_once;
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/*
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* We set up shift and multiply values with a minsec of five seconds,
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* since our timer counter counts down 31 bits at a frequency of
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* no less than 500 MHz. See @minsec for clocks_calc_mult_shift().
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* We could use a different value for the 64-bit free-running
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* cycle counter, but we use the same one for consistency, and since
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* we will be reasonably precise with this value anyway.
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*/
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#define TILE_MINSEC 5
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cycles_t get_clock_rate(void)
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{
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return cycles_per_sec;
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@ -68,6 +58,14 @@ cycles_t get_cycles(void)
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}
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#endif
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/*
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* We use a relatively small shift value so that sched_clock()
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* won't wrap around very often.
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*/
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#define SCHED_CLOCK_SHIFT 10
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static unsigned long sched_clock_mult __write_once;
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static cycles_t clocksource_get_cycles(struct clocksource *cs)
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{
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return get_cycles();
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@ -78,6 +76,7 @@ static struct clocksource cycle_counter_cs = {
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.rating = 300,
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.read = clocksource_get_cycles,
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.mask = CLOCKSOURCE_MASK(64),
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.shift = 22, /* typical value, e.g. x86 tsc uses this */
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.flags = CLOCK_SOURCE_IS_CONTINUOUS,
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};
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@ -88,8 +87,10 @@ static struct clocksource cycle_counter_cs = {
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void __init setup_clock(void)
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{
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cycles_per_sec = hv_sysconf(HV_SYSCONF_CPU_SPEED);
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clocksource_calc_mult_shift(&cycle_counter_cs, cycles_per_sec,
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TILE_MINSEC);
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sched_clock_mult =
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clocksource_hz2mult(cycles_per_sec, SCHED_CLOCK_SHIFT);
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cycle_counter_cs.mult =
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clocksource_hz2mult(cycles_per_sec, cycle_counter_cs.shift);
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}
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void __init calibrate_delay(void)
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@ -117,9 +118,14 @@ void __init time_init(void)
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* counter, plus bit 31, which signifies that the counter has wrapped
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* from zero to (2**31) - 1. The INT_TILE_TIMER interrupt will be
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* raised as long as bit 31 is set.
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*
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* The TILE_MINSEC value represents the largest range of real-time
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* we can possibly cover with the timer, based on MAX_TICK combined
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* with the slowest reasonable clock rate we might run at.
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*/
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#define MAX_TICK 0x7fffffff /* we have 31 bits of countdown timer */
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#define TILE_MINSEC 5 /* timer covers no more than 5 seconds */
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static int tile_timer_set_next_event(unsigned long ticks,
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struct clock_event_device *evt)
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@ -211,8 +217,7 @@ void do_timer_interrupt(struct pt_regs *regs, int fault_num)
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unsigned long long sched_clock(void)
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{
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return clocksource_cyc2ns(get_cycles(),
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cycle_counter_cs.mult,
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cycle_counter_cs.shift);
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sched_clock_mult, SCHED_CLOCK_SHIFT);
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}
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int setup_profiling_timer(unsigned int multiplier)
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