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ARM: STi: DT: Add STiH407 family tsin0 pinctrl configuration

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tsin0 and be configured as either serial or parallel. This patch
adds the pinctrl config for both possiblities. On B2120 reference
design tsin0 is brought out as TSA on the NIMA slot of the B2004A
daughter board.

Signed-off-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
This commit is contained in:
Peter Griffin 2015-06-10 16:03:00 +02:00 committed by Maxime Coquelin
parent d770e558e2
commit 747d7e6e4c
1 changed files with 28 additions and 0 deletions
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28
arch/arm/boot/dts/stih407-pinctrl.dtsi
View File

@ -439,6 +439,34 @@
};
};
};
tsin0 {
pinctrl_tsin0_parallel: tsin0_parallel {
st,pins {
DATA7 = <&pio10 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
DATA6 = <&pio10 5 ALT1 IN SE_NICLK_IO 0 CLK_A>;
DATA5 = <&pio10 6 ALT1 IN SE_NICLK_IO 0 CLK_A>;
DATA4 = <&pio10 7 ALT1 IN SE_NICLK_IO 0 CLK_A>;
DATA3 = <&pio11 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
DATA2 = <&pio11 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
DATA1 = <&pio11 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
DATA0 = <&pio11 3 ALT1 IN SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio10 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
VALID = <&pio10 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio10 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio10 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
};
};
pinctrl_tsin0_serial: tsin0_serial {
st,pins {
DATA7 = <&pio10 4 ALT1 IN SE_NICLK_IO 0 CLK_A>;
CLKIN = <&pio10 3 ALT1 IN CLKNOTDATA 0 CLK_A>;
VALID = <&pio10 1 ALT1 IN SE_NICLK_IO 0 CLK_A>;
ERROR = <&pio10 0 ALT1 IN SE_NICLK_IO 0 CLK_A>;
PKCLK = <&pio10 2 ALT1 IN SE_NICLK_IO 0 CLK_A>;
};
};
};
};
pin-controller-front1 {