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drm/amdgpu: add BACO interfaces in pm and hwmgr function table

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Signed-off-by: Jim Qu <Jim.Qu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Jim Qu 2018-11-05 17:45:56 +08:00 committed by Alex Deucher
parent 58a50420aa
commit 7451ca88d5
2 changed files with 11 additions and 0 deletions
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3
drivers/gpu/drm/amd/include/kgd_pp_interface.h
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@ -281,6 +281,9 @@ struct amd_pm_funcs {
int (*set_hard_min_dcefclk_by_freq)(void *handle, uint32_t clock);
int (*set_hard_min_fclk_by_freq)(void *handle, uint32_t clock);
int (*set_min_deep_sleep_dcefclk)(void *handle, uint32_t clock);
int (*get_asic_baco_capability)(void *handle, bool *cap);
int (*get_asic_baco_state)(void *handle, int *state);
int (*set_asic_baco_state)(void *handle, int state);
};
#endif

8
drivers/gpu/drm/amd/powerplay/inc/hwmgr.h
View File

@ -47,6 +47,11 @@ enum DISPLAY_GAP {
};
typedef enum DISPLAY_GAP DISPLAY_GAP;
enum BACO_STATE {
BACO_STATE_OUT = 0,
BACO_STATE_IN,
};
struct vi_dpm_level {
bool enabled;
uint32_t value;
@ -333,6 +338,9 @@ struct pp_hwmgr_func {
int (*enable_mgpu_fan_boost)(struct pp_hwmgr *hwmgr);
int (*set_hard_min_dcefclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
int (*set_hard_min_fclk_by_freq)(struct pp_hwmgr *hwmgr, uint32_t clock);
int (*get_asic_baco_capability)(struct pp_hwmgr *hwmgr, bool *cap);
int (*get_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE *state);
int (*set_asic_baco_state)(struct pp_hwmgr *hwmgr, enum BACO_STATE state);
};
struct pp_table_func {