forked from Minki/linux
ASoC: rt5682: Add a new property for the DMIC clock driving
The patch adds a new property to set the DMIC clock driving. Signed-off-by: Oder Chiou <oder_chiou@realtek.com> Link: https://lore.kernel.org/r/20201113055400.11242-1-oder_chiou@realtek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -40,6 +40,7 @@ struct rt5682_platform_data {
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unsigned int btndet_delay;
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unsigned int btndet_delay;
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unsigned int dmic_clk_rate;
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unsigned int dmic_clk_rate;
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unsigned int dmic_delay;
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unsigned int dmic_delay;
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bool dmic_clk_driving_high;
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const char *dai_clk_names[RT5682_DAI_NUM_CLKS];
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const char *dai_clk_names[RT5682_DAI_NUM_CLKS];
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};
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};
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@ -221,6 +221,11 @@ static int rt5682_i2c_probe(struct i2c_client *i2c,
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case RT5682_DMIC1_CLK_GPIO3: /* share with BCLK2 */
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case RT5682_DMIC1_CLK_GPIO3: /* share with BCLK2 */
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regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
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regmap_update_bits(rt5682->regmap, RT5682_GPIO_CTRL_1,
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RT5682_GP3_PIN_MASK, RT5682_GP3_PIN_DMIC_CLK);
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RT5682_GP3_PIN_MASK, RT5682_GP3_PIN_DMIC_CLK);
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if (rt5682->pdata.dmic_clk_driving_high)
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regmap_update_bits(rt5682->regmap,
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RT5682_PAD_DRIVING_CTRL,
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RT5682_PAD_DRV_GP3_MASK,
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2 << RT5682_PAD_DRV_GP3_SFT);
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break;
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break;
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default:
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default:
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@ -2989,6 +2989,9 @@ int rt5682_parse_dt(struct rt5682_priv *rt5682, struct device *dev)
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rt5682->pdata.dai_clk_names[RT5682_DAI_WCLK_IDX],
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rt5682->pdata.dai_clk_names[RT5682_DAI_WCLK_IDX],
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rt5682->pdata.dai_clk_names[RT5682_DAI_BCLK_IDX]);
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rt5682->pdata.dai_clk_names[RT5682_DAI_BCLK_IDX]);
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rt5682->pdata.dmic_clk_driving_high = device_property_read_bool(dev,
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"realtek,dmic-clk-driving-high");
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return 0;
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return 0;
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}
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}
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EXPORT_SYMBOL_GPL(rt5682_parse_dt);
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EXPORT_SYMBOL_GPL(rt5682_parse_dt);
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@ -1271,6 +1271,20 @@
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#define RT5682_CP_CLK_HP_300KHZ (0x2 << 4)
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#define RT5682_CP_CLK_HP_300KHZ (0x2 << 4)
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#define RT5682_CP_CLK_HP_600KHZ (0x3 << 4)
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#define RT5682_CP_CLK_HP_600KHZ (0x3 << 4)
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/* Pad Driving Control (0x0136) */
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#define RT5682_PAD_DRV_GP1_MASK (0x3 << 14)
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#define RT5682_PAD_DRV_GP1_SFT 14
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#define RT5682_PAD_DRV_GP2_MASK (0x3 << 12)
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#define RT5682_PAD_DRV_GP2_SFT 12
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#define RT5682_PAD_DRV_GP3_MASK (0x3 << 10)
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#define RT5682_PAD_DRV_GP3_SFT 10
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#define RT5682_PAD_DRV_GP4_MASK (0x3 << 8)
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#define RT5682_PAD_DRV_GP4_SFT 8
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#define RT5682_PAD_DRV_GP5_MASK (0x3 << 6)
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#define RT5682_PAD_DRV_GP5_SFT 6
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#define RT5682_PAD_DRV_GP6_MASK (0x3 << 4)
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#define RT5682_PAD_DRV_GP6_SFT 4
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/* Chopper and Clock control for DAC (0x013a)*/
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/* Chopper and Clock control for DAC (0x013a)*/
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#define RT5682_CKXEN_DAC1_MASK (0x1 << 13)
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#define RT5682_CKXEN_DAC1_MASK (0x1 << 13)
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#define RT5682_CKXEN_DAC1_SFT 13
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#define RT5682_CKXEN_DAC1_SFT 13
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